15:28:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:28:39:ST3_Shared:INFO:	                       FEB-Microcable                       
15:28:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:28:39:febtest:INFO:	Testing FEB with SN 1231
15:28:41:smx_tester:INFO:	Scanning setup
15:28:41:elinks:INFO:	Disabling clock on downlink 0
15:28:41:elinks:INFO:	Disabling clock on downlink 1
15:28:41:elinks:INFO:	Disabling clock on downlink 2
15:28:41:elinks:INFO:	Disabling clock on downlink 3
15:28:41:elinks:INFO:	Disabling clock on downlink 4
15:28:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:28:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:28:41:elinks:INFO:	Disabling clock on downlink 0
15:28:41:elinks:INFO:	Disabling clock on downlink 1
15:28:41:elinks:INFO:	Disabling clock on downlink 2
15:28:41:elinks:INFO:	Disabling clock on downlink 3
15:28:41:elinks:INFO:	Disabling clock on downlink 4
15:28:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
15:28:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
15:28:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:28:41:elinks:INFO:	Disabling clock on downlink 0
15:28:41:elinks:INFO:	Disabling clock on downlink 1
15:28:41:elinks:INFO:	Disabling clock on downlink 2
15:28:41:elinks:INFO:	Disabling clock on downlink 3
15:28:41:elinks:INFO:	Disabling clock on downlink 4
15:28:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:28:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:28:41:elinks:INFO:	Disabling clock on downlink 0
15:28:41:elinks:INFO:	Disabling clock on downlink 1
15:28:41:elinks:INFO:	Disabling clock on downlink 2
15:28:41:elinks:INFO:	Disabling clock on downlink 3
15:28:41:elinks:INFO:	Disabling clock on downlink 4
15:28:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:28:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:28:41:elinks:INFO:	Disabling clock on downlink 0
15:28:41:elinks:INFO:	Disabling clock on downlink 1
15:28:41:elinks:INFO:	Disabling clock on downlink 2
15:28:41:elinks:INFO:	Disabling clock on downlink 3
15:28:41:elinks:INFO:	Disabling clock on downlink 4
15:28:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:28:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:28:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:28:42:setup_element:INFO:	Scanning clock phase
15:28:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:28:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:28:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
15:28:42:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 4 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:28:42:setup_element:INFO:	Eye window for uplink 5 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:28:42:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 8 : ___________________________________________________________________________XXX__
Clock Delay: 36
15:28:42:setup_element:INFO:	Eye window for uplink 9 : ___________________________________________________________________________XXX__
Clock Delay: 36
15:28:42:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:28:42:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:28:42:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:28:42:setup_element:INFO:	Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:28:42:setup_element:INFO:	Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:28:42:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
15:28:42:setup_element:INFO:	Scanning data phases
15:28:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:28:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:28:48:setup_element:INFO:	Data phase scan results for group 0, downlink 1
15:28:48:setup_element:INFO:	Eye window for uplink 0 : _______________XXXX_____________________
Data delay found: 36
15:28:48:setup_element:INFO:	Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
15:28:48:setup_element:INFO:	Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
15:28:48:setup_element:INFO:	Eye window for uplink 3 : ________XXXX____________________________
Data delay found: 29
15:28:48:setup_element:INFO:	Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
15:28:48:setup_element:INFO:	Eye window for uplink 5 : ______XXXX______________________________
Data delay found: 27
15:28:48:setup_element:INFO:	Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
15:28:48:setup_element:INFO:	Eye window for uplink 7 : XXX__________________________________XXX
Data delay found: 19
15:28:48:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
15:28:48:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXX______
Data delay found: 12
15:28:48:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
15:28:48:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
15:28:48:setup_element:INFO:	Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
15:28:48:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
15:28:48:setup_element:INFO:	Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
15:28:48:setup_element:INFO:	Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
15:28:48:setup_element:INFO:	Setting the data phase to 36 for uplink 0
15:28:48:setup_element:INFO:	Setting the data phase to 32 for uplink 1
15:28:48:setup_element:INFO:	Setting the data phase to 32 for uplink 2
15:28:48:setup_element:INFO:	Setting the data phase to 29 for uplink 3
15:28:48:setup_element:INFO:	Setting the data phase to 32 for uplink 4
15:28:48:setup_element:INFO:	Setting the data phase to 27 for uplink 5
15:28:48:setup_element:INFO:	Setting the data phase to 23 for uplink 6
15:28:48:setup_element:INFO:	Setting the data phase to 19 for uplink 7
15:28:48:setup_element:INFO:	Setting the data phase to 7 for uplink 8
15:28:48:setup_element:INFO:	Setting the data phase to 12 for uplink 9
15:28:48:setup_element:INFO:	Setting the data phase to 9 for uplink 10
15:28:48:setup_element:INFO:	Setting the data phase to 13 for uplink 11
15:28:48:setup_element:INFO:	Setting the data phase to 14 for uplink 12
15:28:48:setup_element:INFO:	Setting the data phase to 16 for uplink 13
15:28:48:setup_element:INFO:	Setting the data phase to 13 for uplink 14
15:28:48:setup_element:INFO:	Setting the data phase to 15 for uplink 15
15:28:48:setup_element:INFO:	Beginning SMX ASICs map scan
15:28:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:28:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:28:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
15:28:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
15:28:48:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:28:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:28:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:28:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:28:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:28:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:28:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:28:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:28:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:28:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:28:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:28:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:28:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:28:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:28:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:28:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:28:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:28:50:setup_element:INFO:	Performing Elink synchronization
15:28:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:28:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:28:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
15:28:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
15:28:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
15:28:50:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x0
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x1
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x2
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x3
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x4
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x5
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x6
15:28:51:ST3_emu_feb:DEBUG:	Chip address:  	0x7
15:28:51:febtest:INFO:	Init all SMX (CSA): 30
15:29:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:29:05:febtest:INFO:	01-00 | XA-000-08-003-000-005-195-00 |  34.6 | 1159.7
15:29:06:febtest:INFO:	08-01 | XA-000-08-003-000-005-171-11 |  25.1 | 1183.3
15:29:06:febtest:INFO:	03-02 | XA-000-08-003-000-005-177-12 |  25.1 | 1195.1
15:29:06:febtest:INFO:	10-03 | XA-000-08-003-000-006-051-08 |  37.7 | 1135.9
15:29:06:febtest:INFO:	05-04 | XA-000-08-003-000-005-169-11 |  25.1 | 1212.7
15:29:06:febtest:INFO:	12-05 | XA-000-08-003-000-005-193-00 |  37.7 | 1135.9
15:29:07:febtest:INFO:	07-06 | XA-000-08-003-000-005-181-12 |  21.9 | 1212.7
15:29:07:febtest:INFO:	14-07 | XA-000-08-003-000-005-192-00 |  25.1 | 1183.3
15:29:08:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:29:10:ST3_smx:INFO:	chip: 1-0 	 34.556970 C 	 1171.483840 mV
15:29:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:10:ST3_smx:INFO:		Electrons
15:29:10:ST3_smx:INFO:	# loops 0
15:29:12:ST3_smx:INFO:	# loops 1
15:29:13:ST3_smx:INFO:	# loops 2
15:29:15:ST3_smx:INFO:	Total # of broken channels: 0
15:29:15:ST3_smx:INFO:	List of broken channels: []
15:29:15:ST3_smx:INFO:	Total # of broken channels: 0
15:29:15:ST3_smx:INFO:	List of broken channels: []
15:29:17:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1195.082160 mV
15:29:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:17:ST3_smx:INFO:		Electrons
15:29:17:ST3_smx:INFO:	# loops 0
15:29:18:ST3_smx:INFO:	# loops 1
15:29:20:ST3_smx:INFO:	# loops 2
15:29:22:ST3_smx:INFO:	Total # of broken channels: 0
15:29:22:ST3_smx:INFO:	List of broken channels: []
15:29:22:ST3_smx:INFO:	Total # of broken channels: 23
15:29:22:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 46, 48]
15:29:23:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1206.851500 mV
15:29:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:23:ST3_smx:INFO:		Electrons
15:29:23:ST3_smx:INFO:	# loops 0
15:29:25:ST3_smx:INFO:	# loops 1
15:29:27:ST3_smx:INFO:	# loops 2
15:29:28:ST3_smx:INFO:	Total # of broken channels: 0
15:29:28:ST3_smx:INFO:	List of broken channels: []
15:29:28:ST3_smx:INFO:	Total # of broken channels: 0
15:29:28:ST3_smx:INFO:	List of broken channels: []
15:29:30:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1147.806000 mV
15:29:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:30:ST3_smx:INFO:		Electrons
15:29:30:ST3_smx:INFO:	# loops 0
15:29:32:ST3_smx:INFO:	# loops 1
15:29:33:ST3_smx:INFO:	# loops 2
15:29:35:ST3_smx:INFO:	Total # of broken channels: 0
15:29:35:ST3_smx:INFO:	List of broken channels: []
15:29:35:ST3_smx:INFO:	Total # of broken channels: 21
15:29:35:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 45]
15:29:36:ST3_smx:INFO:	chip: 5-4 	 25.062742 C 	 1230.330540 mV
15:29:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:36:ST3_smx:INFO:		Electrons
15:29:36:ST3_smx:INFO:	# loops 0
15:29:38:ST3_smx:INFO:	# loops 1
15:29:40:ST3_smx:INFO:	# loops 2
15:29:41:ST3_smx:INFO:	Total # of broken channels: 0
15:29:41:ST3_smx:INFO:	List of broken channels: []
15:29:41:ST3_smx:INFO:	Total # of broken channels: 12
15:29:41:ST3_smx:INFO:	List of broken channels: [68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90]
15:29:43:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1147.806000 mV
15:29:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:43:ST3_smx:INFO:		Electrons
15:29:43:ST3_smx:INFO:	# loops 0
15:29:45:ST3_smx:INFO:	# loops 1
15:29:46:ST3_smx:INFO:	# loops 2
15:29:48:ST3_smx:INFO:	Total # of broken channels: 0
15:29:48:ST3_smx:INFO:	List of broken channels: []
15:29:48:ST3_smx:INFO:	Total # of broken channels: 1
15:29:48:ST3_smx:INFO:	List of broken channels: [63]
15:29:49:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1224.468235 mV
15:29:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:49:ST3_smx:INFO:		Electrons
15:29:49:ST3_smx:INFO:	# loops 0
15:29:51:ST3_smx:INFO:	# loops 1
15:29:53:ST3_smx:INFO:	# loops 2
15:29:54:ST3_smx:INFO:	Total # of broken channels: 0
15:29:54:ST3_smx:INFO:	List of broken channels: []
15:29:54:ST3_smx:INFO:	Total # of broken channels: 0
15:29:54:ST3_smx:INFO:	List of broken channels: []
15:29:56:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1200.969315 mV
15:29:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:29:56:ST3_smx:INFO:		Electrons
15:29:56:ST3_smx:INFO:	# loops 0
15:29:58:ST3_smx:INFO:	# loops 1
15:29:59:ST3_smx:INFO:	# loops 2
15:30:01:ST3_smx:INFO:	Total # of broken channels: 1
15:30:01:ST3_smx:INFO:	List of broken channels: [38]
15:30:01:ST3_smx:INFO:	Total # of broken channels: 0
15:30:01:ST3_smx:INFO:	List of broken channels: []
15:30:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:30:01:febtest:INFO:	01-00 | XA-000-08-003-000-005-195-00 |  34.6 | 1195.1
15:30:02:febtest:INFO:	08-01 | XA-000-08-003-000-005-171-11 |  25.1 | 1230.3
15:30:02:febtest:INFO:	03-02 | XA-000-08-003-000-005-177-12 |  25.1 | 1230.3
15:30:02:febtest:INFO:	10-03 | XA-000-08-003-000-006-051-08 |  37.7 | 1171.5
15:30:02:febtest:INFO:	05-04 | XA-000-08-003-000-005-169-11 |  25.1 | 1277.1
15:30:02:febtest:INFO:	12-05 | XA-000-08-003-000-005-193-00 |  40.9 | 1171.5
15:30:03:febtest:INFO:	07-06 | XA-000-08-003-000-005-181-12 |  21.9 | 1247.9
15:30:03:febtest:INFO:	14-07 | XA-000-08-003-000-005-192-00 |  28.2 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_03-15_28_39
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1231| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5530', '1.849', '2.9580', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0200', '1.850', '2.4600', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0260', '1.850', '0.5315', '0.000', '0.0000', '0.000', '0.0000']