09:54:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:54:47:ST3_Shared:INFO:	                         FEB-Sensor                         
09:54:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:55:14:ST3_ModuleSelector:INFO:	M8UL0B0010600A2
09:55:14:ST3_ModuleSelector:INFO:	07122
09:55:14:febtest:INFO:	Testing FEB with SN 1231
09:55:16:smx_tester:INFO:	Scanning setup
09:55:16:elinks:INFO:	Disabling clock on downlink 0
09:55:16:elinks:INFO:	Disabling clock on downlink 1
09:55:16:elinks:INFO:	Disabling clock on downlink 2
09:55:16:elinks:INFO:	Disabling clock on downlink 3
09:55:16:elinks:INFO:	Disabling clock on downlink 4
09:55:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:55:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:55:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:55:16:elinks:INFO:	Disabling clock on downlink 0
09:55:16:elinks:INFO:	Disabling clock on downlink 1
09:55:16:elinks:INFO:	Disabling clock on downlink 2
09:55:16:elinks:INFO:	Disabling clock on downlink 3
09:55:16:elinks:INFO:	Disabling clock on downlink 4
09:55:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:55:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:55:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:55:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:55:16:elinks:INFO:	Disabling clock on downlink 0
09:55:16:elinks:INFO:	Disabling clock on downlink 1
09:55:16:elinks:INFO:	Disabling clock on downlink 2
09:55:16:elinks:INFO:	Disabling clock on downlink 3
09:55:16:elinks:INFO:	Disabling clock on downlink 4
09:55:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:55:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:55:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:55:16:elinks:INFO:	Disabling clock on downlink 0
09:55:16:elinks:INFO:	Disabling clock on downlink 1
09:55:16:elinks:INFO:	Disabling clock on downlink 2
09:55:16:elinks:INFO:	Disabling clock on downlink 3
09:55:16:elinks:INFO:	Disabling clock on downlink 4
09:55:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:55:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:55:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:55:16:elinks:INFO:	Disabling clock on downlink 0
09:55:16:elinks:INFO:	Disabling clock on downlink 1
09:55:16:elinks:INFO:	Disabling clock on downlink 2
09:55:16:elinks:INFO:	Disabling clock on downlink 3
09:55:16:elinks:INFO:	Disabling clock on downlink 4
09:55:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:55:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:55:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:55:17:setup_element:INFO:	Scanning clock phase
09:55:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:55:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:55:17:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:55:17:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:17:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:17:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 4 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
09:55:17:setup_element:INFO:	Eye window for uplink 5 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
09:55:17:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:17:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:17:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:55:17:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:55:17:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXXXX
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXXXX
Clock Delay: 34
09:55:17:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:17:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:17:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:55:17:setup_element:INFO:	Scanning data phases
09:55:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:55:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:55:23:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:55:23:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
09:55:23:setup_element:INFO:	Eye window for uplink 1 : _________XXXXXX_________________________
Data delay found: 31
09:55:23:setup_element:INFO:	Eye window for uplink 2 : __________XXXXXX________________________
Data delay found: 32
09:55:23:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXXX___________________________
Data delay found: 29
09:55:23:setup_element:INFO:	Eye window for uplink 4 : _________XXXXXX_________________________
Data delay found: 31
09:55:23:setup_element:INFO:	Eye window for uplink 5 : _____XXXXXX_____________________________
Data delay found: 27
09:55:23:setup_element:INFO:	Eye window for uplink 6 : _XXXXXX_________________________________
Data delay found: 23
09:55:23:setup_element:INFO:	Eye window for uplink 7 : XXXX________________________________XXXX
Data delay found: 19
09:55:23:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
09:55:23:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXXX____
Data delay found: 12
09:55:23:setup_element:INFO:	Eye window for uplink 10: ________________________X_XXXXXXX_______
Data delay found: 8
09:55:23:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXXXX___
Data delay found: 12
09:55:23:setup_element:INFO:	Eye window for uplink 12: _______________________________XXXXXX___
Data delay found: 13
09:55:23:setup_element:INFO:	Eye window for uplink 13: XX_______________________________XXXXXXX
Data delay found: 17
09:55:23:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXXXXX___
Data delay found: 12
09:55:23:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXXXXXX_
Data delay found: 14
09:55:23:setup_element:INFO:	Setting the data phase to 36 for uplink 0
09:55:23:setup_element:INFO:	Setting the data phase to 31 for uplink 1
09:55:23:setup_element:INFO:	Setting the data phase to 32 for uplink 2
09:55:23:setup_element:INFO:	Setting the data phase to 29 for uplink 3
09:55:23:setup_element:INFO:	Setting the data phase to 31 for uplink 4
09:55:23:setup_element:INFO:	Setting the data phase to 27 for uplink 5
09:55:23:setup_element:INFO:	Setting the data phase to 23 for uplink 6
09:55:23:setup_element:INFO:	Setting the data phase to 19 for uplink 7
09:55:23:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:55:23:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:55:23:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:55:23:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:55:23:setup_element:INFO:	Setting the data phase to 13 for uplink 12
09:55:23:setup_element:INFO:	Setting the data phase to 17 for uplink 13
09:55:23:setup_element:INFO:	Setting the data phase to 12 for uplink 14
09:55:23:setup_element:INFO:	Setting the data phase to 14 for uplink 15
09:55:23:setup_element:INFO:	Beginning SMX ASICs map scan
09:55:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:55:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:55:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:55:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:55:23:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:55:23:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:55:23:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:55:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:55:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:55:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:55:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:55:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:55:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:55:24:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:55:24:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:55:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:55:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:55:24:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:55:24:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:55:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:55:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:55:26:setup_element:INFO:	Performing Elink synchronization
09:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:55:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:55:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:55:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:55:26:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:55:26:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x0
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x2
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x4
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x6
09:55:26:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:55:27:febtest:INFO:	Init all SMX (CSA): 30
09:55:40:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:55:40:febtest:INFO:	01-00 | XA-000-08-003-000-005-195-00 |  25.1 | 1159.7
09:55:40:febtest:INFO:	08-01 | XA-000-08-003-000-005-171-11 |  15.6 | 1177.4
09:55:41:febtest:INFO:	03-02 | XA-000-08-003-000-005-177-12 |  12.4 | 1201.0
09:55:41:febtest:INFO:	10-03 | XA-000-08-003-000-006-051-08 |  31.4 | 1130.0
09:55:41:febtest:INFO:	05-04 | XA-000-08-003-000-005-169-11 |  15.6 | 1201.0
09:55:41:febtest:INFO:	12-05 | XA-000-08-003-000-005-193-00 |  28.2 | 1135.9
09:55:42:febtest:INFO:	07-06 | XA-000-08-003-000-005-181-12 |   6.1 | 1224.5
09:55:42:febtest:INFO:	14-07 | XA-000-08-003-000-005-192-00 |  15.6 | 1189.2
09:55:43:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:55:45:ST3_smx:INFO:	chip: 1-0 	 25.062742 C 	 1171.483840 mV
09:55:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:45:ST3_smx:INFO:		Electrons
09:55:45:ST3_smx:INFO:	# loops 0
09:55:47:ST3_smx:INFO:	# loops 1
09:55:48:ST3_smx:INFO:	# loops 2
09:55:50:ST3_smx:INFO:	# loops 3
09:55:51:ST3_smx:INFO:	# loops 4
09:55:53:ST3_smx:INFO:	Total # of broken channels: 0
09:55:53:ST3_smx:INFO:	List of broken channels: []
09:55:53:ST3_smx:INFO:	Total # of broken channels: 60
09:55:53:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
09:55:55:ST3_smx:INFO:	chip: 8-1 	 15.590880 C 	 1189.190035 mV
09:55:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:55:55:ST3_smx:INFO:		Electrons
09:55:55:ST3_smx:INFO:	# loops 0
09:55:56:ST3_smx:INFO:	# loops 1
09:55:58:ST3_smx:INFO:	# loops 2
09:55:59:ST3_smx:INFO:	# loops 3
09:56:01:ST3_smx:INFO:	# loops 4
09:56:02:ST3_smx:INFO:	Total # of broken channels: 1
09:56:02:ST3_smx:INFO:	List of broken channels: [46]
09:56:02:ST3_smx:INFO:	Total # of broken channels: 62
09:56:02:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 46, 47, 48, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
09:56:04:ST3_smx:INFO:	chip: 3-2 	 12.438562 C 	 1212.728715 mV
09:56:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:04:ST3_smx:INFO:		Electrons
09:56:04:ST3_smx:INFO:	# loops 0
09:56:06:ST3_smx:INFO:	# loops 1
09:56:07:ST3_smx:INFO:	# loops 2
09:56:09:ST3_smx:INFO:	# loops 3
09:56:10:ST3_smx:INFO:	# loops 4
09:56:12:ST3_smx:INFO:	Total # of broken channels: 0
09:56:12:ST3_smx:INFO:	List of broken channels: []
09:56:12:ST3_smx:INFO:	Total # of broken channels: 60
09:56:12:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
09:56:14:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1147.806000 mV
09:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:14:ST3_smx:INFO:		Electrons
09:56:14:ST3_smx:INFO:	# loops 0
09:56:15:ST3_smx:INFO:	# loops 1
09:56:17:ST3_smx:INFO:	# loops 2
09:56:18:ST3_smx:INFO:	# loops 3
09:56:20:ST3_smx:INFO:	# loops 4
09:56:21:ST3_smx:INFO:	Total # of broken channels: 0
09:56:21:ST3_smx:INFO:	List of broken channels: []
09:56:21:ST3_smx:INFO:	Total # of broken channels: 59
09:56:21:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
09:56:23:ST3_smx:INFO:	chip: 5-4 	 15.590880 C 	 1212.728715 mV
09:56:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:23:ST3_smx:INFO:		Electrons
09:56:23:ST3_smx:INFO:	# loops 0
09:56:25:ST3_smx:INFO:	# loops 1
09:56:26:ST3_smx:INFO:	# loops 2
09:56:28:ST3_smx:INFO:	# loops 3
09:56:29:ST3_smx:INFO:	# loops 4
09:56:31:ST3_smx:INFO:	Total # of broken channels: 0
09:56:31:ST3_smx:INFO:	List of broken channels: []
09:56:31:ST3_smx:INFO:	Total # of broken channels: 60
09:56:31:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
09:56:33:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1147.806000 mV
09:56:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:33:ST3_smx:INFO:		Electrons
09:56:33:ST3_smx:INFO:	# loops 0
09:56:34:ST3_smx:INFO:	# loops 1
09:56:36:ST3_smx:INFO:	# loops 2
09:56:37:ST3_smx:INFO:	# loops 3
09:56:39:ST3_smx:INFO:	# loops 4
09:56:40:ST3_smx:INFO:	Total # of broken channels: 1
09:56:40:ST3_smx:INFO:	List of broken channels: [63]
09:56:40:ST3_smx:INFO:	Total # of broken channels: 57
09:56:40:ST3_smx:INFO:	List of broken channels: [9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
09:56:42:ST3_smx:INFO:	chip: 7-6 	 6.141382 C 	 1236.187875 mV
09:56:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:42:ST3_smx:INFO:		Electrons
09:56:42:ST3_smx:INFO:	# loops 0
09:56:44:ST3_smx:INFO:	# loops 1
09:56:45:ST3_smx:INFO:	# loops 2
09:56:47:ST3_smx:INFO:	# loops 3
09:56:48:ST3_smx:INFO:	# loops 4
09:56:50:ST3_smx:INFO:	Total # of broken channels: 0
09:56:50:ST3_smx:INFO:	List of broken channels: []
09:56:50:ST3_smx:INFO:	Total # of broken channels: 60
09:56:50:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
09:56:52:ST3_smx:INFO:	chip: 14-7 	 15.590880 C 	 1200.969315 mV
09:56:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:56:52:ST3_smx:INFO:		Electrons
09:56:52:ST3_smx:INFO:	# loops 0
09:56:53:ST3_smx:INFO:	# loops 1
09:56:55:ST3_smx:INFO:	# loops 2
09:56:56:ST3_smx:INFO:	# loops 3
09:56:58:ST3_smx:INFO:	# loops 4
09:57:00:ST3_smx:INFO:	Total # of broken channels: 0
09:57:00:ST3_smx:INFO:	List of broken channels: []
09:57:00:ST3_smx:INFO:	Total # of broken channels: 19
09:57:00:ST3_smx:INFO:	List of broken channels: [87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
09:57:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:57:00:febtest:INFO:	01-00 | XA-000-08-003-000-005-195-00 |  28.2 | 1195.1
09:57:00:febtest:INFO:	08-01 | XA-000-08-003-000-005-171-11 |  15.6 | 1218.6
09:57:00:febtest:INFO:	03-02 | XA-000-08-003-000-005-177-12 |  15.6 | 1230.3
09:57:01:febtest:INFO:	10-03 | XA-000-08-003-000-006-051-08 |  31.4 | 1165.6
09:57:01:febtest:INFO:	05-04 | XA-000-08-003-000-005-169-11 |  15.6 | 1247.9
09:57:01:febtest:INFO:	12-05 | XA-000-08-003-000-005-193-00 |  31.4 | 1171.5
09:57:01:febtest:INFO:	07-06 | XA-000-08-003-000-005-181-12 |   9.3 | 1259.6
09:57:02:febtest:INFO:	14-07 | XA-000-08-003-000-005-192-00 |  15.6 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_11-09_54_47
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1231| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 07122 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL0B0010600A2
LADDER_NAME: L8UL001060
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0190', '1.849', '2.7660', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0150', '1.850', '2.4970', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0200', '1.850', '0.5295', '0.000', '0.0000', '0.000', '0.0000']