09:30:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:30:07:ST3_Shared:INFO:	                         FEB-Sensor                         
09:30:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:30:42:ST3_ModuleSelector:INFO:	M8UL6B2010242A2
09:30:42:ST3_ModuleSelector:INFO:	18084
09:30:42:febtest:INFO:	Testing FEB with SN 1232
09:30:43:smx_tester:INFO:	Scanning setup
09:30:43:elinks:INFO:	Disabling clock on downlink 0
09:30:43:elinks:INFO:	Disabling clock on downlink 1
09:30:43:elinks:INFO:	Disabling clock on downlink 2
09:30:43:elinks:INFO:	Disabling clock on downlink 3
09:30:43:elinks:INFO:	Disabling clock on downlink 4
09:30:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:30:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:30:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:30:43:elinks:INFO:	Disabling clock on downlink 0
09:30:43:elinks:INFO:	Disabling clock on downlink 1
09:30:43:elinks:INFO:	Disabling clock on downlink 2
09:30:43:elinks:INFO:	Disabling clock on downlink 3
09:30:43:elinks:INFO:	Disabling clock on downlink 4
09:30:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:30:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:30:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:30:43:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:30:44:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:30:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:30:44:elinks:INFO:	Disabling clock on downlink 0
09:30:44:elinks:INFO:	Disabling clock on downlink 1
09:30:44:elinks:INFO:	Disabling clock on downlink 2
09:30:44:elinks:INFO:	Disabling clock on downlink 3
09:30:44:elinks:INFO:	Disabling clock on downlink 4
09:30:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:30:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:30:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:30:44:elinks:INFO:	Disabling clock on downlink 0
09:30:44:elinks:INFO:	Disabling clock on downlink 1
09:30:44:elinks:INFO:	Disabling clock on downlink 2
09:30:44:elinks:INFO:	Disabling clock on downlink 3
09:30:44:elinks:INFO:	Disabling clock on downlink 4
09:30:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:30:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:30:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:30:44:elinks:INFO:	Disabling clock on downlink 0
09:30:44:elinks:INFO:	Disabling clock on downlink 1
09:30:44:elinks:INFO:	Disabling clock on downlink 2
09:30:44:elinks:INFO:	Disabling clock on downlink 3
09:30:44:elinks:INFO:	Disabling clock on downlink 4
09:30:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:30:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:30:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:30:44:setup_element:INFO:	Scanning clock phase
09:30:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:30:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:30:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:30:44:setup_element:INFO:	Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:30:44:setup_element:INFO:	Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:30:44:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:30:44:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:30:44:setup_element:INFO:	Eye window for uplink 4 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:30:44:setup_element:INFO:	Eye window for uplink 5 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:30:44:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:30:44:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:30:44:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:30:44:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:30:44:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:30:44:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:30:44:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:30:44:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:30:44:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:30:44:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:30:44:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:30:44:setup_element:INFO:	Scanning data phases
09:30:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:30:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:30:50:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:30:50:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXXXX___________________
Data delay found: 37
09:30:50:setup_element:INFO:	Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
09:30:50:setup_element:INFO:	Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
09:30:50:setup_element:INFO:	Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
09:30:50:setup_element:INFO:	Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
09:30:50:setup_element:INFO:	Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
09:30:50:setup_element:INFO:	Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
09:30:50:setup_element:INFO:	Eye window for uplink 7 : XXXX_________________________________XXX
Data delay found: 20
09:30:50:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
09:30:50:setup_element:INFO:	Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
09:30:50:setup_element:INFO:	Eye window for uplink 10: _______________________XXXXX____________
Data delay found: 5
09:30:50:setup_element:INFO:	Eye window for uplink 11: __________________________XXXXX_________
Data delay found: 8
09:30:50:setup_element:INFO:	Eye window for uplink 12: _________________________XXXXXX_________
Data delay found: 7
09:30:50:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXX______
Data delay found: 10
09:30:50:setup_element:INFO:	Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
09:30:50:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
09:30:50:setup_element:INFO:	Setting the data phase to 37 for uplink 0
09:30:50:setup_element:INFO:	Setting the data phase to 32 for uplink 1
09:30:50:setup_element:INFO:	Setting the data phase to 32 for uplink 2
09:30:50:setup_element:INFO:	Setting the data phase to 30 for uplink 3
09:30:50:setup_element:INFO:	Setting the data phase to 30 for uplink 4
09:30:50:setup_element:INFO:	Setting the data phase to 26 for uplink 5
09:30:50:setup_element:INFO:	Setting the data phase to 24 for uplink 6
09:30:50:setup_element:INFO:	Setting the data phase to 20 for uplink 7
09:30:50:setup_element:INFO:	Setting the data phase to 4 for uplink 8
09:30:50:setup_element:INFO:	Setting the data phase to 10 for uplink 9
09:30:50:setup_element:INFO:	Setting the data phase to 5 for uplink 10
09:30:50:setup_element:INFO:	Setting the data phase to 8 for uplink 11
09:30:50:setup_element:INFO:	Setting the data phase to 7 for uplink 12
09:30:50:setup_element:INFO:	Setting the data phase to 10 for uplink 13
09:30:50:setup_element:INFO:	Setting the data phase to 9 for uplink 14
09:30:50:setup_element:INFO:	Setting the data phase to 10 for uplink 15
09:30:50:setup_element:INFO:	Beginning SMX ASICs map scan
09:30:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:30:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:30:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:30:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:30:50:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:30:50:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:30:50:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:30:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:30:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:30:51:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:30:51:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:30:51:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:30:51:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:30:51:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:30:51:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:30:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:30:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:30:51:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:30:51:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:30:52:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:30:52:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:30:53:setup_element:INFO:	Performing Elink synchronization
09:30:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:30:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:30:53:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:30:53:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:30:53:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:30:53:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:30:53:ST3_emu_feb:DEBUG:	Chip address:  	0x0
09:30:53:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:30:53:ST3_emu_feb:DEBUG:	Chip address:  	0x2
09:30:53:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:30:54:ST3_emu_feb:DEBUG:	Chip address:  	0x4
09:30:54:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:30:54:ST3_emu_feb:DEBUG:	Chip address:  	0x6
09:30:54:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:30:54:febtest:INFO:	Init all SMX (CSA): 30
09:31:08:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:31:08:febtest:INFO:	01-00 | XA-000-08-002-000-008-169-06 |  44.1 | 1118.1
09:31:08:febtest:INFO:	08-01 | XA-000-08-002-003-007-087-05 |  37.7 | 1141.9
09:31:09:febtest:INFO:	03-02 | XA-000-08-002-000-008-164-06 |  37.7 | 1147.8
09:31:09:febtest:INFO:	10-03 | XA-000-08-002-003-007-088-05 |  28.2 | 1171.5
09:31:09:febtest:INFO:	05-04 | XA-000-08-002-002-008-237-10 |  44.1 | 1124.0
09:31:09:febtest:INFO:	12-05 | XA-000-08-002-003-007-089-05 |  53.6 | 1088.3
09:31:09:febtest:INFO:	07-06 | XA-000-08-002-000-008-150-15 |  44.1 | 1130.0
09:31:10:febtest:INFO:	14-07 | XA-000-08-002-000-008-051-11 |  21.9 | 1201.0
09:31:11:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:31:13:ST3_smx:INFO:	chip: 1-0 	 47.250730 C 	 1129.995435 mV
09:31:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:13:ST3_smx:INFO:		Electrons
09:31:13:ST3_smx:INFO:	# loops 0
09:31:14:ST3_smx:INFO:	# loops 1
09:31:16:ST3_smx:INFO:	# loops 2
09:31:17:ST3_smx:INFO:	# loops 3
09:31:19:ST3_smx:INFO:	# loops 4
09:31:21:ST3_smx:INFO:	Total # of broken channels: 0
09:31:21:ST3_smx:INFO:	List of broken channels: []
09:31:21:ST3_smx:INFO:	Total # of broken channels: 0
09:31:21:ST3_smx:INFO:	List of broken channels: []
09:31:22:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1153.732915 mV
09:31:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:23:ST3_smx:INFO:		Electrons
09:31:23:ST3_smx:INFO:	# loops 0
09:31:24:ST3_smx:INFO:	# loops 1
09:31:26:ST3_smx:INFO:	# loops 2
09:31:27:ST3_smx:INFO:	# loops 3
09:31:29:ST3_smx:INFO:	# loops 4
09:31:31:ST3_smx:INFO:	Total # of broken channels: 0
09:31:31:ST3_smx:INFO:	List of broken channels: []
09:31:31:ST3_smx:INFO:	Total # of broken channels: 0
09:31:31:ST3_smx:INFO:	List of broken channels: []
09:31:32:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1159.654860 mV
09:31:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:32:ST3_smx:INFO:		Electrons
09:31:32:ST3_smx:INFO:	# loops 0
09:31:34:ST3_smx:INFO:	# loops 1
09:31:36:ST3_smx:INFO:	# loops 2
09:31:37:ST3_smx:INFO:	# loops 3
09:31:39:ST3_smx:INFO:	# loops 4
09:31:41:ST3_smx:INFO:	Total # of broken channels: 0
09:31:41:ST3_smx:INFO:	List of broken channels: []
09:31:41:ST3_smx:INFO:	Total # of broken channels: 0
09:31:41:ST3_smx:INFO:	List of broken channels: []
09:31:42:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1183.292940 mV
09:31:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:42:ST3_smx:INFO:		Electrons
09:31:42:ST3_smx:INFO:	# loops 0
09:31:44:ST3_smx:INFO:	# loops 1
09:31:46:ST3_smx:INFO:	# loops 2
09:31:47:ST3_smx:INFO:	# loops 3
09:31:49:ST3_smx:INFO:	# loops 4
09:31:50:ST3_smx:INFO:	Total # of broken channels: 0
09:31:50:ST3_smx:INFO:	List of broken channels: []
09:31:50:ST3_smx:INFO:	Total # of broken channels: 4
09:31:50:ST3_smx:INFO:	List of broken channels: [120, 122, 124, 126]
09:31:52:ST3_smx:INFO:	chip: 5-4 	 47.250730 C 	 1135.937260 mV
09:31:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:31:52:ST3_smx:INFO:		Electrons
09:31:52:ST3_smx:INFO:	# loops 0
09:31:54:ST3_smx:INFO:	# loops 1
09:31:55:ST3_smx:INFO:	# loops 2
09:31:57:ST3_smx:INFO:	# loops 3
09:31:58:ST3_smx:INFO:	# loops 4
09:32:00:ST3_smx:INFO:	Total # of broken channels: 0
09:32:00:ST3_smx:INFO:	List of broken channels: []
09:32:00:ST3_smx:INFO:	Total # of broken channels: 0
09:32:00:ST3_smx:INFO:	List of broken channels: []
09:32:02:ST3_smx:INFO:	chip: 12-5 	 56.797143 C 	 1100.211760 mV
09:32:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:02:ST3_smx:INFO:		Electrons
09:32:02:ST3_smx:INFO:	# loops 0
09:32:03:ST3_smx:INFO:	# loops 1
09:32:05:ST3_smx:INFO:	# loops 2
09:32:07:ST3_smx:INFO:	# loops 3
09:32:08:ST3_smx:INFO:	# loops 4
09:32:10:ST3_smx:INFO:	Total # of broken channels: 0
09:32:10:ST3_smx:INFO:	List of broken channels: []
09:32:10:ST3_smx:INFO:	Total # of broken channels: 0
09:32:10:ST3_smx:INFO:	List of broken channels: []
09:32:12:ST3_smx:INFO:	chip: 7-6 	 47.250730 C 	 1141.874115 mV
09:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:12:ST3_smx:INFO:		Electrons
09:32:12:ST3_smx:INFO:	# loops 0
09:32:13:ST3_smx:INFO:	# loops 1
09:32:15:ST3_smx:INFO:	# loops 2
09:32:16:ST3_smx:INFO:	# loops 3
09:32:18:ST3_smx:INFO:	# loops 4
09:32:20:ST3_smx:INFO:	Total # of broken channels: 0
09:32:20:ST3_smx:INFO:	List of broken channels: []
09:32:20:ST3_smx:INFO:	Total # of broken channels: 0
09:32:20:ST3_smx:INFO:	List of broken channels: []
09:32:21:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1206.851500 mV
09:32:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:32:21:ST3_smx:INFO:		Electrons
09:32:21:ST3_smx:INFO:	# loops 0
09:32:23:ST3_smx:INFO:	# loops 1
09:32:24:ST3_smx:INFO:	# loops 2
09:32:26:ST3_smx:INFO:	# loops 3
09:32:28:ST3_smx:INFO:	# loops 4
09:32:29:ST3_smx:INFO:	Total # of broken channels: 0
09:32:29:ST3_smx:INFO:	List of broken channels: []
09:32:29:ST3_smx:INFO:	Total # of broken channels: 0
09:32:29:ST3_smx:INFO:	List of broken channels: []
09:32:30:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:32:30:febtest:INFO:	01-00 | XA-000-08-002-000-008-169-06 |  47.3 | 1153.7
09:32:30:febtest:INFO:	08-01 | XA-000-08-002-003-007-087-05 |  37.7 | 1171.5
09:32:30:febtest:INFO:	03-02 | XA-000-08-002-000-008-164-06 |  40.9 | 1183.3
09:32:30:febtest:INFO:	10-03 | XA-000-08-002-003-007-088-05 |  31.4 | 1201.0
09:32:31:febtest:INFO:	05-04 | XA-000-08-002-002-008-237-10 |  47.3 | 1159.7
09:32:31:febtest:INFO:	12-05 | XA-000-08-002-003-007-089-05 |  56.8 | 1124.0
09:32:31:febtest:INFO:	07-06 | XA-000-08-002-000-008-150-15 |  47.3 | 1159.7
09:32:31:febtest:INFO:	14-07 | XA-000-08-002-000-008-051-11 |  25.1 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_29-09_30_07
OPERATOR  : Olga B.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1232| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 18084 | SIZE: 62x124 | GRADE: C
MODULE_NAME: M8UL6B2010242A2
LADDER_NAME: L8UL601024
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5120', '1.848', '2.2630', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.1040', '1.850', '2.5080', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.5250', '0.000', '0.0000', '0.000', '0.0000']