
FEB_1233 29.08.24 13:29:19
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13:29:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:29:19:ST3_Shared:INFO: FEB-Microcable 13:29:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:29:19:febtest:INFO: Testing FEB with SN 1233 13:29:20:smx_tester:INFO: Scanning setup 13:29:20:elinks:INFO: Disabling clock on downlink 0 13:29:20:elinks:INFO: Disabling clock on downlink 1 13:29:20:elinks:INFO: Disabling clock on downlink 2 13:29:20:elinks:INFO: Disabling clock on downlink 3 13:29:20:elinks:INFO: Disabling clock on downlink 4 13:29:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:29:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:29:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:29:20:elinks:INFO: Disabling clock on downlink 0 13:29:20:elinks:INFO: Disabling clock on downlink 1 13:29:20:elinks:INFO: Disabling clock on downlink 2 13:29:20:elinks:INFO: Disabling clock on downlink 3 13:29:20:elinks:INFO: Disabling clock on downlink 4 13:29:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:29:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 13:29:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 13:29:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:29:21:elinks:INFO: Disabling clock on downlink 0 13:29:21:elinks:INFO: Disabling clock on downlink 1 13:29:21:elinks:INFO: Disabling clock on downlink 2 13:29:21:elinks:INFO: Disabling clock on downlink 3 13:29:21:elinks:INFO: Disabling clock on downlink 4 13:29:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:29:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:29:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:29:21:elinks:INFO: Disabling clock on downlink 0 13:29:21:elinks:INFO: Disabling clock on downlink 1 13:29:21:elinks:INFO: Disabling clock on downlink 2 13:29:21:elinks:INFO: Disabling clock on downlink 3 13:29:21:elinks:INFO: Disabling clock on downlink 4 13:29:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:29:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:29:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:29:21:elinks:INFO: Disabling clock on downlink 0 13:29:21:elinks:INFO: Disabling clock on downlink 1 13:29:21:elinks:INFO: Disabling clock on downlink 2 13:29:21:elinks:INFO: Disabling clock on downlink 3 13:29:21:elinks:INFO: Disabling clock on downlink 4 13:29:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:29:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:29:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:29:21:setup_element:INFO: Scanning clock phase 13:29:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:29:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:29:21:setup_element:INFO: Clock phase scan results for group 0, downlink 1 13:29:21:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:29:21:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:29:21:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:29:21:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 13:29:21:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 13:29:21:setup_element:INFO: Scanning data phases 13:29:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:29:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:29:27:setup_element:INFO: Data phase scan results for group 0, downlink 1 13:29:27:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________ Data delay found: 33 13:29:27:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________ Data delay found: 29 13:29:27:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 13:29:27:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________ Data delay found: 26 13:29:27:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX Data delay found: 19 13:29:27:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__ Data delay found: 15 13:29:27:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________ Data delay found: 6 13:29:27:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______ Data delay found: 11 13:29:27:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 13:29:27:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 13:29:27:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________ Data delay found: 8 13:29:27:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXXX______ Data delay found: 10 13:29:27:setup_element:INFO: Eye window for uplink 14: _________________________XXXXX__________ Data delay found: 7 13:29:27:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______ Data delay found: 10 13:29:27:setup_element:INFO: Setting the data phase to 33 for uplink 0 13:29:27:setup_element:INFO: Setting the data phase to 29 for uplink 1 13:29:27:setup_element:INFO: Setting the data phase to 29 for uplink 2 13:29:27:setup_element:INFO: Setting the data phase to 26 for uplink 3 13:29:27:setup_element:INFO: Setting the data phase to 19 for uplink 6 13:29:27:setup_element:INFO: Setting the data phase to 15 for uplink 7 13:29:27:setup_element:INFO: Setting the data phase to 6 for uplink 8 13:29:27:setup_element:INFO: Setting the data phase to 11 for uplink 9 13:29:27:setup_element:INFO: Setting the data phase to 8 for uplink 10 13:29:27:setup_element:INFO: Setting the data phase to 12 for uplink 11 13:29:27:setup_element:INFO: Setting the data phase to 8 for uplink 12 13:29:27:setup_element:INFO: Setting the data phase to 10 for uplink 13 13:29:27:setup_element:INFO: Setting the data phase to 7 for uplink 14 13:29:27:setup_element:INFO: Setting the data phase to 10 for uplink 15 13:29:27:setup_element:INFO: Beginning SMX ASICs map scan 13:29:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:29:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:29:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:29:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:29:27:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:29:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 13:29:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 13:29:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 13:29:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 13:29:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 13:29:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 13:29:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 13:29:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 13:29:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 13:29:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 13:29:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 13:29:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 13:29:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 13:29:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 13:29:30:setup_element:INFO: Performing Elink synchronization 13:29:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:29:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:29:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:29:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:29:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 13:29:30:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 13:29:30:ST3_emu_feb:DEBUG: Chip address: 0x0 13:29:30:ST3_emu_feb:DEBUG: Chip address: 0x1 13:29:30:ST3_emu_feb:DEBUG: Chip address: 0x2 13:29:30:ST3_emu_feb:DEBUG: Chip address: 0x3 13:29:30:ST3_emu_feb:DEBUG: Chip address: 0x5 13:29:31:ST3_emu_feb:DEBUG: Chip address: 0x6 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak). 13:29:31:ST3_emu_feb:DEBUG: Chip address: 0x7 13:29:31:febtest:INFO: Init all SMX (CSA): 30 13:29:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:29:43:febtest:INFO: 01-00 | XA-000-08-002-003-007-034-09 | 47.3 | 1130.0 13:29:43:febtest:INFO: 08-01 | XA-000-08-002-003-007-031-00 | 37.7 | 1153.7 13:29:43:febtest:INFO: 03-02 | XA-000-08-002-003-007-028-00 | 31.4 | 1195.1 13:29:44:febtest:INFO: 10-03 | XA-000-08-002-003-007-032-09 | 40.9 | 1135.9 13:29:44:febtest:INFO: 12-05 | XA-000-08-002-003-007-033-09 | 34.6 | 1165.6 13:29:44:febtest:INFO: 07-06 | XA-000-08-002-003-007-030-00 | 31.4 | 1183.3 13:29:44:febtest:INFO: 14-07 | XA-021-08-002-003-007-021-09 | 28.2 | 1183.3 13:29:45:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 13:29:46:febtest:ERROR: HW addres 5 != 4 13:29:50:ST3_smx:INFO: chip: 1-0 47.250730 C 1141.874115 mV 13:29:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:29:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:29:50:ST3_smx:INFO: Electrons 13:29:50:ST3_smx:INFO: # loops 0 13:29:52:ST3_smx:INFO: # loops 1 13:29:53:ST3_smx:INFO: # loops 2 13:29:55:ST3_smx:INFO: Total # of broken channels: 0 13:29:55:ST3_smx:INFO: List of broken channels: [] 13:29:55:ST3_smx:INFO: Total # of broken channels: 0 13:29:55:ST3_smx:INFO: List of broken channels: [] 13:29:57:ST3_smx:INFO: chip: 8-1 37.726682 C 1165.571835 mV 13:29:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:29:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:29:57:ST3_smx:INFO: Electrons 13:29:57:ST3_smx:INFO: # loops 0 13:29:58:ST3_smx:INFO: # loops 1 13:30:00:ST3_smx:INFO: # loops 2 13:30:01:ST3_smx:INFO: Total # of broken channels: 0 13:30:01:ST3_smx:INFO: List of broken channels: [] 13:30:01:ST3_smx:INFO: Total # of broken channels: 0 13:30:01:ST3_smx:INFO: List of broken channels: [] 13:30:03:ST3_smx:INFO: chip: 3-2 31.389742 C 1200.969315 mV 13:30:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:03:ST3_smx:INFO: Electrons 13:30:03:ST3_smx:INFO: # loops 0 13:30:05:ST3_smx:INFO: # loops 1 13:30:06:ST3_smx:INFO: # loops 2 13:30:08:ST3_smx:INFO: Total # of broken channels: 0 13:30:08:ST3_smx:INFO: List of broken channels: [] 13:30:08:ST3_smx:INFO: Total # of broken channels: 0 13:30:08:ST3_smx:INFO: List of broken channels: [] 13:30:10:ST3_smx:INFO: chip: 10-3 40.898880 C 1147.806000 mV 13:30:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:10:ST3_smx:INFO: Electrons 13:30:10:ST3_smx:INFO: # loops 0 13:30:11:ST3_smx:INFO: # loops 1 13:30:13:ST3_smx:INFO: # loops 2 13:30:14:ST3_smx:INFO: Total # of broken channels: 0 13:30:14:ST3_smx:INFO: List of broken channels: [] 13:30:14:ST3_smx:INFO: Total # of broken channels: 0 13:30:14:ST3_smx:INFO: List of broken channels: [] 13:30:16:ST3_smx:INFO: chip: 12-5 34.556970 C 1177.390875 mV 13:30:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:16:ST3_smx:INFO: Electrons 13:30:16:ST3_smx:INFO: # loops 0 13:30:18:ST3_smx:INFO: # loops 1 13:30:19:ST3_smx:INFO: # loops 2 13:30:21:ST3_smx:INFO: Total # of broken channels: 0 13:30:21:ST3_smx:INFO: List of broken channels: [] 13:30:21:ST3_smx:INFO: Total # of broken channels: 0 13:30:21:ST3_smx:INFO: List of broken channels: [] 13:30:23:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV 13:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:23:ST3_smx:INFO: Electrons 13:30:23:ST3_smx:INFO: # loops 0 13:30:24:ST3_smx:INFO: # loops 1 13:30:26:ST3_smx:INFO: # loops 2 13:30:27:ST3_smx:INFO: Total # of broken channels: 0 13:30:27:ST3_smx:INFO: List of broken channels: [] 13:30:27:ST3_smx:INFO: Total # of broken channels: 6 13:30:27:ST3_smx:INFO: List of broken channels: [110, 114, 116, 118, 120, 122] 13:30:29:ST3_smx:INFO: chip: 14-7 28.225000 C 1195.082160 mV 13:30:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:30:29:ST3_smx:INFO: Electrons 13:30:29:ST3_smx:INFO: # loops 0 13:30:31:ST3_smx:INFO: # loops 1 13:30:32:ST3_smx:INFO: # loops 2 13:30:34:ST3_smx:INFO: Total # of broken channels: 0 13:30:34:ST3_smx:INFO: List of broken channels: [] 13:30:34:ST3_smx:INFO: Total # of broken channels: 3 13:30:34:ST3_smx:INFO: List of broken channels: [16, 38, 42] 13:30:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:30:35:febtest:INFO: 01-00 | XA-000-08-002-003-007-034-09 | 47.3 | 1159.7 13:30:35:febtest:INFO: 08-01 | XA-000-08-002-003-007-031-00 | 37.7 | 1189.2 13:30:35:febtest:INFO: 03-02 | XA-000-08-002-003-007-028-00 | 31.4 | 1224.5 13:30:35:febtest:INFO: 10-03 | XA-000-08-002-003-007-032-09 | 44.1 | 1165.6 13:30:35:febtest:INFO: 12-05 | XA-000-08-002-003-007-033-09 | 34.6 | 1201.0 13:30:36:febtest:INFO: 07-06 | XA-000-08-002-003-007-030-00 | 34.6 | 1206.9 13:30:36:febtest:INFO: 14-07 | XA-021-08-002-003-007-021-09 | 31.4 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_08_29-13_29_19 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1233| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.449', '1.9200', '1.849', '2.1060', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9580', '1.850', '2.5960', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9570', '1.850', '0.8580', '0.000', '0.0000', '0.000', '0.0000']