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FEB_1233 03.09.24 10:03:33
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10:03:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:03:33:ST3_Shared:INFO: FEB-Microcable
10:03:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:03:33:febtest:INFO: Testing FEB with SN 1233
10:03:34:smx_tester:INFO: Scanning setup
10:03:34:elinks:INFO: Disabling clock on downlink 0
10:03:34:elinks:INFO: Disabling clock on downlink 1
10:03:34:elinks:INFO: Disabling clock on downlink 2
10:03:34:elinks:INFO: Disabling clock on downlink 3
10:03:34:elinks:INFO: Disabling clock on downlink 4
10:03:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:03:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:03:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:03:34:elinks:INFO: Disabling clock on downlink 0
10:03:34:elinks:INFO: Disabling clock on downlink 1
10:03:34:elinks:INFO: Disabling clock on downlink 2
10:03:34:elinks:INFO: Disabling clock on downlink 3
10:03:34:elinks:INFO: Disabling clock on downlink 4
10:03:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:03:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:03:35:elinks:INFO: Disabling clock on downlink 0
10:03:35:elinks:INFO: Disabling clock on downlink 1
10:03:35:elinks:INFO: Disabling clock on downlink 2
10:03:35:elinks:INFO: Disabling clock on downlink 3
10:03:35:elinks:INFO: Disabling clock on downlink 4
10:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:03:35:elinks:INFO: Disabling clock on downlink 0
10:03:35:elinks:INFO: Disabling clock on downlink 1
10:03:35:elinks:INFO: Disabling clock on downlink 2
10:03:35:elinks:INFO: Disabling clock on downlink 3
10:03:35:elinks:INFO: Disabling clock on downlink 4
10:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:03:35:elinks:INFO: Disabling clock on downlink 0
10:03:35:elinks:INFO: Disabling clock on downlink 1
10:03:35:elinks:INFO: Disabling clock on downlink 2
10:03:35:elinks:INFO: Disabling clock on downlink 3
10:03:35:elinks:INFO: Disabling clock on downlink 4
10:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:03:35:setup_element:INFO: Scanning clock phase
10:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:03:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:03:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:03:35:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:35:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:35:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:36:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:36:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:03:36:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:03:36:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:36:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:03:36:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:03:36:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:03:36:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:03:36:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:03:36:setup_element:INFO: Scanning data phases
10:03:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:03:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:03:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:03:41:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
10:03:41:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
10:03:41:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
10:03:41:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
10:03:41:setup_element:INFO: Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
10:03:41:setup_element:INFO: Eye window for uplink 5 : _____XXXX_______________________________
Data delay found: 26
10:03:41:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
10:03:41:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
10:03:41:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
10:03:41:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:03:41:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
10:03:41:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
10:03:41:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
10:03:41:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
10:03:41:setup_element:INFO: Eye window for uplink 14: _________________________XXXX___________
Data delay found: 6
10:03:41:setup_element:INFO: Eye window for uplink 15: ____________________________XXXX________
Data delay found: 9
10:03:41:setup_element:INFO: Setting the data phase to 32 for uplink 0
10:03:41:setup_element:INFO: Setting the data phase to 28 for uplink 1
10:03:41:setup_element:INFO: Setting the data phase to 28 for uplink 2
10:03:41:setup_element:INFO: Setting the data phase to 26 for uplink 3
10:03:41:setup_element:INFO: Setting the data phase to 31 for uplink 4
10:03:41:setup_element:INFO: Setting the data phase to 26 for uplink 5
10:03:41:setup_element:INFO: Setting the data phase to 19 for uplink 6
10:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 7
10:03:41:setup_element:INFO: Setting the data phase to 6 for uplink 8
10:03:41:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:03:41:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:03:41:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:03:41:setup_element:INFO: Setting the data phase to 8 for uplink 12
10:03:41:setup_element:INFO: Setting the data phase to 11 for uplink 13
10:03:41:setup_element:INFO: Setting the data phase to 6 for uplink 14
10:03:41:setup_element:INFO: Setting the data phase to 9 for uplink 15
10:03:41:setup_element:INFO: Beginning SMX ASICs map scan
10:03:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:03:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:03:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:03:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:03:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:03:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:03:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:03:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:03:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:03:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:03:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:03:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:03:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:03:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:03:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:03:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:03:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:03:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:03:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:03:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:03:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:03:44:setup_element:INFO: Performing Elink synchronization
10:03:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:03:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:03:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:03:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:03:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:03:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x0
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x1
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x2
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x3
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x4
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x5
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x6
10:03:45:ST3_emu_feb:DEBUG: Chip address: 0x7
10:03:45:febtest:INFO: Init all SMX (CSA): 30
10:03:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:03:59:febtest:INFO: 01-00 | XA-000-08-002-003-007-034-09 | 47.3 | 1130.0
10:03:59:febtest:INFO: 08-01 | XA-000-08-002-003-007-031-00 | 37.7 | 1147.8
10:03:59:febtest:INFO: 03-02 | XA-000-08-002-003-007-028-00 | 31.4 | 1195.1
10:03:59:febtest:INFO: 10-03 | XA-000-08-002-003-007-032-09 | 40.9 | 1135.9
10:04:00:febtest:INFO: 05-04 | XA-000-08-003-000-005-201-00 | 18.7 | 1206.9
10:04:00:febtest:INFO: 12-05 | XA-000-08-002-003-007-033-09 | 34.6 | 1159.7
10:04:00:febtest:INFO: 07-06 | XA-000-08-002-003-007-030-00 | 31.4 | 1177.4
10:04:00:febtest:INFO: 14-07 | XA-021-08-002-003-007-021-09 | 28.2 | 1183.3
10:04:01:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:04:03:ST3_smx:INFO: chip: 1-0 44.073563 C 1141.874115 mV
10:04:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:03:ST3_smx:INFO: Electrons
10:04:03:ST3_smx:INFO: # loops 0
10:04:05:ST3_smx:INFO: # loops 1
10:04:06:ST3_smx:INFO: # loops 2
10:04:08:ST3_smx:INFO: Total # of broken channels: 0
10:04:08:ST3_smx:INFO: List of broken channels: []
10:04:08:ST3_smx:INFO: Total # of broken channels: 0
10:04:08:ST3_smx:INFO: List of broken channels: []
10:04:10:ST3_smx:INFO: chip: 8-1 37.726682 C 1165.571835 mV
10:04:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:10:ST3_smx:INFO: Electrons
10:04:10:ST3_smx:INFO: # loops 0
10:04:11:ST3_smx:INFO: # loops 1
10:04:13:ST3_smx:INFO: # loops 2
10:04:14:ST3_smx:INFO: Total # of broken channels: 0
10:04:14:ST3_smx:INFO: List of broken channels: []
10:04:14:ST3_smx:INFO: Total # of broken channels: 0
10:04:14:ST3_smx:INFO: List of broken channels: []
10:04:16:ST3_smx:INFO: chip: 3-2 31.389742 C 1200.969315 mV
10:04:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:16:ST3_smx:INFO: Electrons
10:04:16:ST3_smx:INFO: # loops 0
10:04:18:ST3_smx:INFO: # loops 1
10:04:19:ST3_smx:INFO: # loops 2
10:04:21:ST3_smx:INFO: Total # of broken channels: 0
10:04:21:ST3_smx:INFO: List of broken channels: []
10:04:21:ST3_smx:INFO: Total # of broken channels: 0
10:04:21:ST3_smx:INFO: List of broken channels: []
10:04:23:ST3_smx:INFO: chip: 10-3 40.898880 C 1147.806000 mV
10:04:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:23:ST3_smx:INFO: Electrons
10:04:23:ST3_smx:INFO: # loops 0
10:04:24:ST3_smx:INFO: # loops 1
10:04:26:ST3_smx:INFO: # loops 2
10:04:27:ST3_smx:INFO: Total # of broken channels: 0
10:04:27:ST3_smx:INFO: List of broken channels: []
10:04:27:ST3_smx:INFO: Total # of broken channels: 0
10:04:27:ST3_smx:INFO: List of broken channels: []
10:04:29:ST3_smx:INFO: chip: 5-4 21.902970 C 1218.600960 mV
10:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:29:ST3_smx:INFO: Electrons
10:04:29:ST3_smx:INFO: # loops 0
10:04:31:ST3_smx:INFO: # loops 1
10:04:32:ST3_smx:INFO: # loops 2
10:04:34:ST3_smx:INFO: Total # of broken channels: 0
10:04:34:ST3_smx:INFO: List of broken channels: []
10:04:34:ST3_smx:INFO: Total # of broken channels: 35
10:04:34:ST3_smx:INFO: List of broken channels: [2, 6, 8, 10, 12, 20, 26, 30, 34, 40, 42, 44, 46, 48, 50, 52, 54, 58, 60, 62, 66, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96]
10:04:36:ST3_smx:INFO: chip: 12-5 34.556970 C 1177.390875 mV
10:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:36:ST3_smx:INFO: Electrons
10:04:36:ST3_smx:INFO: # loops 0
10:04:37:ST3_smx:INFO: # loops 1
10:04:39:ST3_smx:INFO: # loops 2
10:04:40:ST3_smx:INFO: Total # of broken channels: 0
10:04:40:ST3_smx:INFO: List of broken channels: []
10:04:40:ST3_smx:INFO: Total # of broken channels: 51
10:04:40:ST3_smx:INFO: List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 109]
10:04:42:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
10:04:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:42:ST3_smx:INFO: Electrons
10:04:42:ST3_smx:INFO: # loops 0
10:04:44:ST3_smx:INFO: # loops 1
10:04:45:ST3_smx:INFO: # loops 2
10:04:47:ST3_smx:INFO: Total # of broken channels: 1
10:04:47:ST3_smx:INFO: List of broken channels: [66]
10:04:47:ST3_smx:INFO: Total # of broken channels: 38
10:04:47:ST3_smx:INFO: List of broken channels: [18, 20, 22, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94]
10:04:48:ST3_smx:INFO: chip: 14-7 28.225000 C 1195.082160 mV
10:04:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:04:48:ST3_smx:INFO: Electrons
10:04:48:ST3_smx:INFO: # loops 0
10:04:50:ST3_smx:INFO: # loops 1
10:04:52:ST3_smx:INFO: # loops 2
10:04:53:ST3_smx:INFO: Total # of broken channels: 0
10:04:53:ST3_smx:INFO: List of broken channels: []
10:04:53:ST3_smx:INFO: Total # of broken channels: 3
10:04:53:ST3_smx:INFO: List of broken channels: [16, 38, 42]
10:04:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:04:54:febtest:INFO: 01-00 | XA-000-08-002-003-007-034-09 | 47.3 | 1165.6
10:04:54:febtest:INFO: 08-01 | XA-000-08-002-003-007-031-00 | 37.7 | 1189.2
10:04:54:febtest:INFO: 03-02 | XA-000-08-002-003-007-028-00 | 31.4 | 1230.3
10:04:54:febtest:INFO: 10-03 | XA-000-08-002-003-007-032-09 | 44.1 | 1165.6
10:04:55:febtest:INFO: 05-04 | XA-000-08-003-000-005-201-00 | 21.9 | 1236.2
10:04:55:febtest:INFO: 12-05 | XA-000-08-002-003-007-033-09 | 34.6 | 1195.1
10:04:55:febtest:INFO: 07-06 | XA-000-08-002-003-007-030-00 | 34.6 | 1206.9
10:04:55:febtest:INFO: 14-07 | XA-021-08-002-003-007-021-09 | 28.2 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_03-10_03_33
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1233| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4960', '1.849', '2.1530', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9800', '1.850', '2.4750', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9780', '1.850', '0.5229', '0.000', '0.0000', '0.000', '0.0000']