13:36:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:36:57:ST3_Shared:INFO:	                         FEB-Sensor                         
13:36:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:37:44:ST3_ModuleSelector:INFO:	M8UL4T4010224B2
13:37:44:ST3_ModuleSelector:INFO:	04254
13:37:44:febtest:INFO:	Testing FEB with SN 1238
13:37:45:smx_tester:INFO:	Scanning setup
13:37:45:elinks:INFO:	Disabling clock on downlink 0
13:37:45:elinks:INFO:	Disabling clock on downlink 1
13:37:45:elinks:INFO:	Disabling clock on downlink 2
13:37:45:elinks:INFO:	Disabling clock on downlink 3
13:37:45:elinks:INFO:	Disabling clock on downlink 4
13:37:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:46:elinks:INFO:	Disabling clock on downlink 0
13:37:46:elinks:INFO:	Disabling clock on downlink 1
13:37:46:elinks:INFO:	Disabling clock on downlink 2
13:37:46:elinks:INFO:	Disabling clock on downlink 3
13:37:46:elinks:INFO:	Disabling clock on downlink 4
13:37:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:37:46:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:37:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:46:elinks:INFO:	Disabling clock on downlink 0
13:37:46:elinks:INFO:	Disabling clock on downlink 1
13:37:46:elinks:INFO:	Disabling clock on downlink 2
13:37:46:elinks:INFO:	Disabling clock on downlink 3
13:37:46:elinks:INFO:	Disabling clock on downlink 4
13:37:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:37:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:46:elinks:INFO:	Disabling clock on downlink 0
13:37:46:elinks:INFO:	Disabling clock on downlink 1
13:37:46:elinks:INFO:	Disabling clock on downlink 2
13:37:46:elinks:INFO:	Disabling clock on downlink 3
13:37:46:elinks:INFO:	Disabling clock on downlink 4
13:37:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:37:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:46:elinks:INFO:	Disabling clock on downlink 0
13:37:46:elinks:INFO:	Disabling clock on downlink 1
13:37:46:elinks:INFO:	Disabling clock on downlink 2
13:37:46:elinks:INFO:	Disabling clock on downlink 3
13:37:46:elinks:INFO:	Disabling clock on downlink 4
13:37:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:37:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:46:setup_element:INFO:	Scanning clock phase
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:37:46:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:37:46:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 1 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 4 : __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:37:46:setup_element:INFO:	Eye window for uplink 5 : __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:37:46:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 8 : __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:37:46:setup_element:INFO:	Eye window for uplink 9 : __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:37:46:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXX______
Clock Delay: 30
13:37:46:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXX______
Clock Delay: 30
13:37:46:setup_element:INFO:	Eye window for uplink 12: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:37:46:setup_element:INFO:	Eye window for uplink 13: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:37:46:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:37:46:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 1
13:37:46:setup_element:INFO:	Scanning data phases
13:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:37:51:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:37:51:setup_element:INFO:	Eye window for uplink 0 : _______XXXXXX___________________________
Data delay found: 29
13:37:51:setup_element:INFO:	Eye window for uplink 1 : ___XXXXX________________________________
Data delay found: 25
13:37:51:setup_element:INFO:	Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
13:37:51:setup_element:INFO:	Eye window for uplink 3 : __XXXXXX________________________________
Data delay found: 24
13:37:51:setup_element:INFO:	Eye window for uplink 4 : XXX__________________________________XXX
Data delay found: 19
13:37:51:setup_element:INFO:	Eye window for uplink 5 : _________________________________XXXXX__
Data delay found: 15
13:37:51:setup_element:INFO:	Eye window for uplink 6 : X___________________________________XXXX
Data delay found: 18
13:37:51:setup_element:INFO:	Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
13:37:51:setup_element:INFO:	Eye window for uplink 8 : ___________________XXXXX________________
Data delay found: 1
13:37:51:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXX___________
Data delay found: 6
13:37:51:setup_element:INFO:	Eye window for uplink 10: ______________________XXXXXX____________
Data delay found: 4
13:37:51:setup_element:INFO:	Eye window for uplink 11: __________________________XXXXXX________
Data delay found: 8
13:37:51:setup_element:INFO:	Eye window for uplink 12: ________________________XXXXX___________
Data delay found: 6
13:37:51:setup_element:INFO:	Eye window for uplink 13: __________________________XXXXXX________
Data delay found: 8
13:37:51:setup_element:INFO:	Eye window for uplink 14: _________________________XXXXX__________
Data delay found: 7
13:37:51:setup_element:INFO:	Eye window for uplink 15: ___________________________XXXXX________
Data delay found: 9
13:37:51:setup_element:INFO:	Setting the data phase to 29 for uplink 0
13:37:51:setup_element:INFO:	Setting the data phase to 25 for uplink 1
13:37:51:setup_element:INFO:	Setting the data phase to 27 for uplink 2
13:37:51:setup_element:INFO:	Setting the data phase to 24 for uplink 3
13:37:51:setup_element:INFO:	Setting the data phase to 19 for uplink 4
13:37:51:setup_element:INFO:	Setting the data phase to 15 for uplink 5
13:37:51:setup_element:INFO:	Setting the data phase to 18 for uplink 6
13:37:52:setup_element:INFO:	Setting the data phase to 14 for uplink 7
13:37:52:setup_element:INFO:	Setting the data phase to 1 for uplink 8
13:37:52:setup_element:INFO:	Setting the data phase to 6 for uplink 9
13:37:52:setup_element:INFO:	Setting the data phase to 4 for uplink 10
13:37:52:setup_element:INFO:	Setting the data phase to 8 for uplink 11
13:37:52:setup_element:INFO:	Setting the data phase to 6 for uplink 12
13:37:52:setup_element:INFO:	Setting the data phase to 8 for uplink 13
13:37:52:setup_element:INFO:	Setting the data phase to 7 for uplink 14
13:37:52:setup_element:INFO:	Setting the data phase to 9 for uplink 15
13:37:52:setup_element:INFO:	Beginning SMX ASICs map scan
13:37:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:37:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:37:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:37:52:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:37:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:37:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:37:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:37:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:37:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:37:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:37:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:37:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:37:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:37:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:37:52:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:37:52:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:37:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:37:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:37:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:37:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:37:54:setup_element:INFO:	Performing Elink synchronization
13:37:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:37:54:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:37:54:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:37:54:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:37:54:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:37:55:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:37:55:febtest:INFO:	Init all SMX (CSA): 30
13:38:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:38:09:febtest:INFO:	01-00 | XA-102-08-002-003-007-021-15 |  44.1 | 1106.2
13:38:09:febtest:INFO:	08-01 | XA-000-08-002-003-007-021-00 |  44.1 | 1124.0
13:38:10:febtest:INFO:	03-02 | XA-000-08-002-003-007-021-00 |  44.1 | 1135.9
13:38:10:febtest:INFO:	10-03 | XA-000-08-002-003-007-021-00 |  40.9 | 1135.9
13:38:10:febtest:INFO:	05-04 | XA-000-08-002-003-007-021-00 |  47.3 | 1124.0
13:38:10:febtest:INFO:	12-05 | XA-000-08-002-003-007-057-14 |  56.8 | 1082.3
13:38:11:febtest:INFO:	07-06 | XA-000-08-002-003-007-021-00 |  40.9 | 1141.9
13:38:11:febtest:INFO:	14-07 | XA-000-08-002-003-007-021-00 |  50.4 | 1112.1
13:38:12:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:38:14:ST3_smx:INFO:	chip: 1-0 	 44.073563 C 	 1135.937260 mV
13:38:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:14:ST3_smx:INFO:		Electrons
13:38:14:ST3_smx:INFO:	# loops 0
13:38:16:ST3_smx:INFO:	# loops 1
13:38:17:ST3_smx:INFO:	# loops 2
13:38:19:ST3_smx:INFO:	# loops 3
13:38:20:ST3_smx:INFO:	# loops 4
13:38:22:ST3_smx:INFO:	Total # of broken channels: 0
13:38:22:ST3_smx:INFO:	List of broken channels: []
13:38:22:ST3_smx:INFO:	Total # of broken channels: 0
13:38:22:ST3_smx:INFO:	List of broken channels: []
13:38:24:ST3_smx:INFO:	chip: 8-1 	 44.073563 C 	 1135.937260 mV
13:38:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:24:ST3_smx:INFO:		Electrons
13:38:24:ST3_smx:INFO:	# loops 0
13:38:25:ST3_smx:INFO:	# loops 1
13:38:27:ST3_smx:INFO:	# loops 2
13:38:29:ST3_smx:INFO:	# loops 3
13:38:30:ST3_smx:INFO:	# loops 4
13:38:32:ST3_smx:INFO:	Total # of broken channels: 1
13:38:32:ST3_smx:INFO:	List of broken channels: [122]
13:38:32:ST3_smx:INFO:	Total # of broken channels: 1
13:38:32:ST3_smx:INFO:	List of broken channels: [122]
13:38:33:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1147.806000 mV
13:38:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:33:ST3_smx:INFO:		Electrons
13:38:34:ST3_smx:INFO:	# loops 0
13:38:35:ST3_smx:INFO:	# loops 1
13:38:37:ST3_smx:INFO:	# loops 2
13:38:38:ST3_smx:INFO:	# loops 3
13:38:40:ST3_smx:INFO:	# loops 4
13:38:41:ST3_smx:INFO:	Total # of broken channels: 0
13:38:41:ST3_smx:INFO:	List of broken channels: []
13:38:41:ST3_smx:INFO:	Total # of broken channels: 0
13:38:41:ST3_smx:INFO:	List of broken channels: []
13:38:43:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1147.806000 mV
13:38:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:43:ST3_smx:INFO:		Electrons
13:38:43:ST3_smx:INFO:	# loops 0
13:38:45:ST3_smx:INFO:	# loops 1
13:38:46:ST3_smx:INFO:	# loops 2
13:38:48:ST3_smx:INFO:	# loops 3
13:38:50:ST3_smx:INFO:	# loops 4
13:38:51:ST3_smx:INFO:	Total # of broken channels: 0
13:38:51:ST3_smx:INFO:	List of broken channels: []
13:38:51:ST3_smx:INFO:	Total # of broken channels: 0
13:38:51:ST3_smx:INFO:	List of broken channels: []
13:38:53:ST3_smx:INFO:	chip: 5-4 	 47.250730 C 	 1135.937260 mV
13:38:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:38:53:ST3_smx:INFO:		Electrons
13:38:53:ST3_smx:INFO:	# loops 0
13:38:55:ST3_smx:INFO:	# loops 1
13:38:56:ST3_smx:INFO:	# loops 2
13:38:58:ST3_smx:INFO:	# loops 3
13:38:59:ST3_smx:INFO:	# loops 4
13:39:01:ST3_smx:INFO:	Total # of broken channels: 0
13:39:01:ST3_smx:INFO:	List of broken channels: []
13:39:01:ST3_smx:INFO:	Total # of broken channels: 1
13:39:01:ST3_smx:INFO:	List of broken channels: [71]
13:39:03:ST3_smx:INFO:	chip: 12-5 	 56.797143 C 	 1094.240115 mV
13:39:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:03:ST3_smx:INFO:		Electrons
13:39:03:ST3_smx:INFO:	# loops 0
13:39:04:ST3_smx:INFO:	# loops 1
13:39:06:ST3_smx:INFO:	# loops 2
13:39:07:ST3_smx:INFO:	# loops 3
13:39:09:ST3_smx:INFO:	# loops 4
13:39:11:ST3_smx:INFO:	Total # of broken channels: 2
13:39:11:ST3_smx:INFO:	List of broken channels: [57, 77]
13:39:11:ST3_smx:INFO:	Total # of broken channels: 2
13:39:11:ST3_smx:INFO:	List of broken channels: [57, 77]
13:39:12:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1153.732915 mV
13:39:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:12:ST3_smx:INFO:		Electrons
13:39:12:ST3_smx:INFO:	# loops 0
13:39:14:ST3_smx:INFO:	# loops 1
13:39:16:ST3_smx:INFO:	# loops 2
13:39:17:ST3_smx:INFO:	# loops 3
13:39:19:ST3_smx:INFO:	# loops 4
13:39:20:ST3_smx:INFO:	Total # of broken channels: 0
13:39:20:ST3_smx:INFO:	List of broken channels: []
13:39:20:ST3_smx:INFO:	Total # of broken channels: 0
13:39:20:ST3_smx:INFO:	List of broken channels: []
13:39:22:ST3_smx:INFO:	chip: 14-7 	 53.612520 C 	 1118.096875 mV
13:39:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:39:22:ST3_smx:INFO:		Electrons
13:39:22:ST3_smx:INFO:	# loops 0
13:39:24:ST3_smx:INFO:	# loops 1
13:39:25:ST3_smx:INFO:	# loops 2
13:39:27:ST3_smx:INFO:	# loops 3
13:39:29:ST3_smx:INFO:	# loops 4
13:39:30:ST3_smx:INFO:	Total # of broken channels: 1
13:39:30:ST3_smx:INFO:	List of broken channels: [23]
13:39:30:ST3_smx:INFO:	Total # of broken channels: 1
13:39:30:ST3_smx:INFO:	List of broken channels: [23]
13:39:31:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:39:31:febtest:INFO:	01-00 | XA-102-08-002-003-007-021-15 |  47.3 | 1130.0
13:39:31:febtest:INFO:	08-01 | XA-000-08-002-003-007-021-00 |  47.3 | 1153.7
13:39:31:febtest:INFO:	03-02 | XA-000-08-002-003-007-021-00 |  47.3 | 1165.6
13:39:31:febtest:INFO:	10-03 | XA-000-08-002-003-007-021-00 |  40.9 | 1165.6
13:39:32:febtest:INFO:	05-04 | XA-000-08-002-003-007-021-00 |  50.4 | 1153.7
13:39:32:febtest:INFO:	12-05 | XA-000-08-002-003-007-057-14 |  56.8 | 1112.1
13:39:32:febtest:INFO:	07-06 | XA-000-08-002-003-007-021-00 |  44.1 | 1171.5
13:39:32:febtest:INFO:	14-07 | XA-000-08-002-003-007-021-00 |  53.6 | 1135.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_08-13_36_57
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1238| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 04254 | SIZE: 62x124 | GRADE: D
MODULE_NAME: M8UL4T4010224B2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6000', '1.849', '2.3860', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '2.5690', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9840', '1.850', '0.7741', '0.000', '0.0000', '0.000', '0.0000']