FEB_1240    23.09.24 13:58:25

TextEdit.txt
            13:58:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:25:ST3_Shared:INFO:	                       FEB-Microcable                       
13:58:25:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:25:febtest:INFO:	Testing FEB with SN 1240
13:58:26:smx_tester:INFO:	Scanning setup
13:58:26:elinks:INFO:	Disabling clock on downlink 0
13:58:26:elinks:INFO:	Disabling clock on downlink 1
13:58:26:elinks:INFO:	Disabling clock on downlink 2
13:58:26:elinks:INFO:	Disabling clock on downlink 3
13:58:26:elinks:INFO:	Disabling clock on downlink 4
13:58:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:58:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:27:elinks:INFO:	Disabling clock on downlink 0
13:58:27:elinks:INFO:	Disabling clock on downlink 1
13:58:27:elinks:INFO:	Disabling clock on downlink 2
13:58:27:elinks:INFO:	Disabling clock on downlink 3
13:58:27:elinks:INFO:	Disabling clock on downlink 4
13:58:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:58:27:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:58:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:27:elinks:INFO:	Disabling clock on downlink 0
13:58:27:elinks:INFO:	Disabling clock on downlink 1
13:58:27:elinks:INFO:	Disabling clock on downlink 2
13:58:27:elinks:INFO:	Disabling clock on downlink 3
13:58:27:elinks:INFO:	Disabling clock on downlink 4
13:58:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:27:elinks:INFO:	Disabling clock on downlink 0
13:58:27:elinks:INFO:	Disabling clock on downlink 1
13:58:27:elinks:INFO:	Disabling clock on downlink 2
13:58:27:elinks:INFO:	Disabling clock on downlink 3
13:58:27:elinks:INFO:	Disabling clock on downlink 4
13:58:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:58:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:27:elinks:INFO:	Disabling clock on downlink 0
13:58:27:elinks:INFO:	Disabling clock on downlink 1
13:58:27:elinks:INFO:	Disabling clock on downlink 2
13:58:27:elinks:INFO:	Disabling clock on downlink 3
13:58:27:elinks:INFO:	Disabling clock on downlink 4
13:58:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:58:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:27:setup_element:INFO:	Scanning clock phase
13:58:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:58:28:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:58:28:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:58:28:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:58:28:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:58:28:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:58:28:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:58:28:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:58:28:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:58:28:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
13:58:28:setup_element:INFO:	Scanning data phases
13:58:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:58:33:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:58:33:setup_element:INFO:	Eye window for uplink 2 : ______XXXXXX____________________________
Data delay found: 28
13:58:33:setup_element:INFO:	Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
13:58:33:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXX_____________________________
Data delay found: 27
13:58:33:setup_element:INFO:	Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
13:58:33:setup_element:INFO:	Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
13:58:33:setup_element:INFO:	Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
13:58:33:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
13:58:33:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXX_______
Data delay found: 10
13:58:33:setup_element:INFO:	Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
13:58:33:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
13:58:33:setup_element:INFO:	Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
13:58:33:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
13:58:33:setup_element:INFO:	Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
13:58:33:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
13:58:33:setup_element:INFO:	Setting the data phase to 28 for uplink 2
13:58:33:setup_element:INFO:	Setting the data phase to 26 for uplink 3
13:58:33:setup_element:INFO:	Setting the data phase to 27 for uplink 4
13:58:33:setup_element:INFO:	Setting the data phase to 23 for uplink 5
13:58:33:setup_element:INFO:	Setting the data phase to 22 for uplink 6
13:58:33:setup_element:INFO:	Setting the data phase to 18 for uplink 7
13:58:33:setup_element:INFO:	Setting the data phase to 5 for uplink 8
13:58:33:setup_element:INFO:	Setting the data phase to 10 for uplink 9
13:58:33:setup_element:INFO:	Setting the data phase to 10 for uplink 10
13:58:33:setup_element:INFO:	Setting the data phase to 13 for uplink 11
13:58:33:setup_element:INFO:	Setting the data phase to 13 for uplink 12
13:58:33:setup_element:INFO:	Setting the data phase to 16 for uplink 13
13:58:33:setup_element:INFO:	Setting the data phase to 12 for uplink 14
13:58:33:setup_element:INFO:	Setting the data phase to 13 for uplink 15
13:58:33:setup_element:INFO:	Beginning SMX ASICs map scan
13:58:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:58:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:58:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:58:33:uplink:INFO:	Setting uplinks mask [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:58:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:58:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:58:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:58:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:58:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:58:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:58:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:58:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:58:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:58:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:58:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:58:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:58:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:58:35:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:58:36:setup_element:INFO:	Performing Elink synchronization
13:58:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:58:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:58:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:58:36:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:58:36:uplink:INFO:	Enabling uplinks [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:58:36:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:58:36:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:58:37:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:58:37:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:58:37:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:58:37:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:58:37:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:58:37:febtest:INFO:	Init all SMX (CSA): 30
13:58:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:58:50:febtest:INFO:	08-01 | XA-000-09-004-003-008-018-14 |  25.1 | 1195.1
13:58:50:febtest:INFO:	03-02 | XA-000-09-004-006-015-009-02 |  31.4 | 1183.3
13:58:50:febtest:INFO:	10-03 | XA-000-09-004-003-008-022-14 |  37.7 | 1147.8
13:58:50:febtest:INFO:	05-04 | XA-000-09-004-006-006-013-03 |  44.1 | 1141.9
13:58:51:febtest:INFO:	12-05 | XA-000-09-004-003-009-026-03 |  31.4 | 1177.4
13:58:51:febtest:INFO:	07-06 | XA-000-08-002-003-007-132-13 |  34.6 | 1183.3
13:58:51:febtest:INFO:	14-07 | XA-000-09-004-003-008-019-14 |  53.6 | 1088.3
13:58:52:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:58:53:febtest:ERROR:	HW addres 1 != 0
13:58:57:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1206.851500 mV
13:58:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:58:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:58:57:ST3_smx:INFO:		Electrons
13:58:57:ST3_smx:INFO:	# loops 0
13:58:58:ST3_smx:INFO:	# loops 1
13:59:00:ST3_smx:INFO:	# loops 2
13:59:02:ST3_smx:INFO:	Total # of broken channels: 59
13:59:02:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 14, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115]
13:59:02:ST3_smx:INFO:	Total # of broken channels: 63
13:59:02:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 14, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
13:59:04:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1195.082160 mV
13:59:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:04:ST3_smx:INFO:		Electrons
13:59:04:ST3_smx:INFO:	# loops 0
13:59:05:ST3_smx:INFO:	# loops 1
13:59:07:ST3_smx:INFO:	# loops 2
13:59:09:ST3_smx:INFO:	Total # of broken channels: 55
13:59:09:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 55, 57, 59, 61, 65, 67, 71, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
13:59:09:ST3_smx:INFO:	Total # of broken channels: 64
13:59:09:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
13:59:10:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1165.571835 mV
13:59:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:10:ST3_smx:INFO:		Electrons
13:59:10:ST3_smx:INFO:	# loops 0
13:59:12:ST3_smx:INFO:	# loops 1
13:59:14:ST3_smx:INFO:	# loops 2
13:59:15:ST3_smx:INFO:	Total # of broken channels: 60
13:59:15:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
13:59:15:ST3_smx:INFO:	Total # of broken channels: 64
13:59:15:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
13:59:17:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1147.806000 mV
13:59:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:17:ST3_smx:INFO:		Electrons
13:59:17:ST3_smx:INFO:	# loops 0
13:59:19:ST3_smx:INFO:	# loops 1
13:59:20:ST3_smx:INFO:	# loops 2
13:59:22:ST3_smx:INFO:	Total # of broken channels: 2
13:59:22:ST3_smx:INFO:	List of broken channels: [111, 117]
13:59:22:ST3_smx:INFO:	Total # of broken channels: 78
13:59:22:ST3_smx:INFO:	List of broken channels: [34, 38, 39, 41, 45, 46, 47, 50, 51, 53, 54, 55, 56, 57, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125]
13:59:24:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1195.082160 mV
13:59:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:24:ST3_smx:INFO:		Electrons
13:59:24:ST3_smx:INFO:	# loops 0
13:59:25:ST3_smx:INFO:	# loops 1
13:59:27:ST3_smx:INFO:	# loops 2
13:59:29:ST3_smx:INFO:	Total # of broken channels: 81
13:59:29:ST3_smx:INFO:	List of broken channels: [4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 45, 46, 47, 49, 50, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
13:59:29:ST3_smx:INFO:	Total # of broken channels: 119
13:59:29:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 107, 108, 109, 111, 112, 113, 114, 115, 117, 119, 121, 123, 125, 127]
13:59:30:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1195.082160 mV
13:59:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:30:ST3_smx:INFO:		Electrons
13:59:30:ST3_smx:INFO:	# loops 0
13:59:32:ST3_smx:INFO:	# loops 1
13:59:34:ST3_smx:INFO:	# loops 2
13:59:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:35:ST3_smx:INFO:	Total # of broken channels: 215
13:59:35:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
13:59:35:ST3_smx:INFO:	Total # of broken channels: 235
13:59:35:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 81, 82, 83, 84, 85, 87, 89, 91, 92, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
13:59:37:ST3_smx:INFO:	chip: 14-7 	 53.612520 C 	 1100.211760 mV
13:59:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:37:ST3_smx:INFO:		Electrons
13:59:37:ST3_smx:INFO:	# loops 0
13:59:39:ST3_smx:INFO:	# loops 1
13:59:40:ST3_smx:INFO:	# loops 2
13:59:42:ST3_smx:INFO:	Total # of broken channels: 0
13:59:42:ST3_smx:INFO:	List of broken channels: []
13:59:42:ST3_smx:INFO:	Total # of broken channels: 64
13:59:42:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
13:59:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:59:42:febtest:INFO:	08-01 | XA-000-09-004-003-008-018-14 |  28.2 | 1230.3
13:59:43:febtest:INFO:	03-02 | XA-000-09-004-006-015-009-02 |  34.6 | 1218.6
13:59:43:febtest:INFO:	10-03 | XA-000-09-004-003-008-022-14 |  37.7 | 1183.3
13:59:43:febtest:INFO:	05-04 | XA-000-09-004-006-006-013-03 |  44.1 | 1165.6
13:59:43:febtest:INFO:	12-05 | XA-000-09-004-003-009-026-03 |  31.4 | 1259.6
13:59:43:febtest:INFO:	07-06 | XA-000-08-002-003-007-132-13 |  34.6 | 1218.6
13:59:44:febtest:INFO:	14-07 | XA-000-09-004-003-008-019-14 |  56.8 | 1124.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_23-13_58_25
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1240| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.3940', '1.849', '2.2160', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9550', '1.850', '2.4950', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9190', '1.850', '0.9353', '0.000', '0.0000', '0.000', '0.0000']