
FEB_1243 27.09.24 13:08:33
TextEdit.txt
13:08:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:08:33:ST3_Shared:INFO: FEB-Sensor 13:08:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:09:00:ST3_ModuleSelector:INFO: M8UL4T1010221B2 13:09:00:ST3_ModuleSelector:INFO: 07203 13:09:00:febtest:INFO: Testing FEB with SN 1243 13:09:02:smx_tester:INFO: Scanning setup 13:09:02:elinks:INFO: Disabling clock on downlink 0 13:09:02:elinks:INFO: Disabling clock on downlink 1 13:09:02:elinks:INFO: Disabling clock on downlink 2 13:09:02:elinks:INFO: Disabling clock on downlink 3 13:09:02:elinks:INFO: Disabling clock on downlink 4 13:09:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:09:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:09:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:09:02:elinks:INFO: Disabling clock on downlink 0 13:09:02:elinks:INFO: Disabling clock on downlink 1 13:09:02:elinks:INFO: Disabling clock on downlink 2 13:09:02:elinks:INFO: Disabling clock on downlink 3 13:09:02:elinks:INFO: Disabling clock on downlink 4 13:09:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:09:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 13:09:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 13:09:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:09:02:elinks:INFO: Disabling clock on downlink 0 13:09:02:elinks:INFO: Disabling clock on downlink 1 13:09:02:elinks:INFO: Disabling clock on downlink 2 13:09:02:elinks:INFO: Disabling clock on downlink 3 13:09:02:elinks:INFO: Disabling clock on downlink 4 13:09:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:09:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:09:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:09:02:elinks:INFO: Disabling clock on downlink 0 13:09:02:elinks:INFO: Disabling clock on downlink 1 13:09:02:elinks:INFO: Disabling clock on downlink 2 13:09:02:elinks:INFO: Disabling clock on downlink 3 13:09:02:elinks:INFO: Disabling clock on downlink 4 13:09:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:09:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:09:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:09:02:elinks:INFO: Disabling clock on downlink 0 13:09:02:elinks:INFO: Disabling clock on downlink 1 13:09:02:elinks:INFO: Disabling clock on downlink 2 13:09:02:elinks:INFO: Disabling clock on downlink 3 13:09:02:elinks:INFO: Disabling clock on downlink 4 13:09:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:09:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:09:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:09:03:setup_element:INFO: Scanning clock phase 13:09:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:09:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:09:03:setup_element:INFO: Clock phase scan results for group 0, downlink 1 13:09:03:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX Clock Delay: 37 13:09:03:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX Clock Delay: 37 13:09:03:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:09:03:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:09:03:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:09:03:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:09:03:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:09:03:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:09:03:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:09:03:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 13:09:03:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 13:09:03:setup_element:INFO: Scanning data phases 13:09:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:09:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:09:08:setup_element:INFO: Data phase scan results for group 0, downlink 1 13:09:08:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXX___________________ Data delay found: 37 13:09:08:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________ Data delay found: 33 13:09:08:setup_element:INFO: Eye window for uplink 2 : ______XXXXXXXXXXXXXXXXX_________________ Data delay found: 34 13:09:08:setup_element:INFO: Eye window for uplink 3 : ______XXXXXXXXXXXXXXXXX_________________ Data delay found: 34 13:09:08:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________ Data delay found: 28 13:09:08:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________ Data delay found: 24 13:09:08:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________ Data delay found: 22 13:09:08:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX Data delay found: 18 13:09:08:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________ Data delay found: 5 13:09:08:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXX_______ Data delay found: 10 13:09:08:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____ Data delay found: 12 13:09:08:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__ Data delay found: 15 13:09:08:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____ Data delay found: 12 13:09:08:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__ Data delay found: 15 13:09:08:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____ Data delay found: 12 13:09:08:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____ Data delay found: 13 13:09:08:setup_element:INFO: Setting the data phase to 37 for uplink 0 13:09:08:setup_element:INFO: Setting the data phase to 33 for uplink 1 13:09:08:setup_element:INFO: Setting the data phase to 34 for uplink 2 13:09:08:setup_element:INFO: Setting the data phase to 34 for uplink 3 13:09:08:setup_element:INFO: Setting the data phase to 28 for uplink 4 13:09:08:setup_element:INFO: Setting the data phase to 24 for uplink 5 13:09:08:setup_element:INFO: Setting the data phase to 22 for uplink 6 13:09:08:setup_element:INFO: Setting the data phase to 18 for uplink 7 13:09:08:setup_element:INFO: Setting the data phase to 5 for uplink 8 13:09:08:setup_element:INFO: Setting the data phase to 10 for uplink 9 13:09:08:setup_element:INFO: Setting the data phase to 12 for uplink 10 13:09:08:setup_element:INFO: Setting the data phase to 15 for uplink 11 13:09:08:setup_element:INFO: Setting the data phase to 12 for uplink 12 13:09:08:setup_element:INFO: Setting the data phase to 15 for uplink 13 13:09:08:setup_element:INFO: Setting the data phase to 12 for uplink 14 13:09:08:setup_element:INFO: Setting the data phase to 13 for uplink 15 13:09:08:setup_element:INFO: Beginning SMX ASICs map scan 13:09:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:09:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:09:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:09:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:09:09:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 13:09:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 13:09:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 13:09:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 13:09:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 13:09:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 13:09:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 13:09:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 13:09:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 13:09:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 13:09:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 13:09:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 13:09:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 13:09:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 13:09:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 13:09:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 13:09:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 13:09:11:setup_element:INFO: Performing Elink synchronization 13:09:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:09:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:09:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:09:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:09:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 13:09:11:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x0 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x1 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x2 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x3 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x4 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x5 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x6 13:09:12:ST3_emu_feb:DEBUG: Chip address: 0x7 13:09:12:febtest:INFO: Init all SMX (CSA): 30 13:09:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:09:26:febtest:INFO: 01-00 | XA-000-08-002-003-007-138-13 | 28.2 | 1141.9 13:09:27:febtest:INFO: 08-01 | XA-000-08-002-003-007-145-10 | 18.7 | 1177.4 13:09:27:febtest:INFO: 03-02 | XA-000-09-004-003-013-004-02 | 21.9 | 1165.6 13:09:27:febtest:INFO: 10-03 | XA-000-09-004-003-002-013-06 | 28.2 | 1141.9 13:09:27:febtest:INFO: 05-04 | XA-000-08-002-003-007-156-10 | 9.3 | 1218.6 13:09:28:febtest:INFO: 12-05 | XA-000-09-004-003-010-004-10 | 6.1 | 1206.9 13:09:28:febtest:INFO: 07-06 | XA-000-08-002-003-007-139-13 | 21.9 | 1165.6 13:09:28:febtest:INFO: 14-07 | XA-000-09-004-003-009-007-04 | 9.3 | 1206.9 13:09:29:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 13:09:31:ST3_smx:INFO: chip: 1-0 28.225000 C 1153.732915 mV 13:09:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:31:ST3_smx:INFO: Electrons 13:09:31:ST3_smx:INFO: # loops 0 13:09:33:ST3_smx:INFO: # loops 1 13:09:34:ST3_smx:INFO: # loops 2 13:09:36:ST3_smx:INFO: # loops 3 13:09:38:ST3_smx:INFO: # loops 4 13:09:39:ST3_smx:INFO: Total # of broken channels: 0 13:09:39:ST3_smx:INFO: List of broken channels: [] 13:09:39:ST3_smx:INFO: Total # of broken channels: 1 13:09:39:ST3_smx:INFO: List of broken channels: [107] 13:09:41:ST3_smx:INFO: chip: 8-1 18.745682 C 1189.190035 mV 13:09:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:41:ST3_smx:INFO: Electrons 13:09:41:ST3_smx:INFO: # loops 0 13:09:43:ST3_smx:INFO: # loops 1 13:09:44:ST3_smx:INFO: # loops 2 13:09:46:ST3_smx:INFO: # loops 3 13:09:47:ST3_smx:INFO: # loops 4 13:09:49:ST3_smx:INFO: Total # of broken channels: 0 13:09:49:ST3_smx:INFO: List of broken channels: [] 13:09:49:ST3_smx:INFO: Total # of broken channels: 0 13:09:49:ST3_smx:INFO: List of broken channels: [] 13:09:51:ST3_smx:INFO: chip: 3-2 25.062742 C 1177.390875 mV 13:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:09:51:ST3_smx:INFO: Electrons 13:09:51:ST3_smx:INFO: # loops 0 13:09:52:ST3_smx:INFO: # loops 1 13:09:54:ST3_smx:INFO: # loops 2 13:09:56:ST3_smx:INFO: # loops 3 13:09:57:ST3_smx:INFO: # loops 4 13:09:59:ST3_smx:INFO: Total # of broken channels: 1 13:09:59:ST3_smx:INFO: List of broken channels: [92] 13:09:59:ST3_smx:INFO: Total # of broken channels: 3 13:09:59:ST3_smx:INFO: List of broken channels: [70, 92, 127] 13:10:00:ST3_smx:INFO: chip: 10-3 28.225000 C 1153.732915 mV 13:10:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:00:ST3_smx:INFO: Electrons 13:10:00:ST3_smx:INFO: # loops 0 13:10:02:ST3_smx:INFO: # loops 1 13:10:04:ST3_smx:INFO: # loops 2 13:10:05:ST3_smx:INFO: # loops 3 13:10:07:ST3_smx:INFO: # loops 4 13:10:08:ST3_smx:INFO: Total # of broken channels: 0 13:10:08:ST3_smx:INFO: List of broken channels: [] 13:10:08:ST3_smx:INFO: Total # of broken channels: 2 13:10:08:ST3_smx:INFO: List of broken channels: [126, 127] 13:10:10:ST3_smx:INFO: chip: 5-4 9.288730 C 1230.330540 mV 13:10:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:10:ST3_smx:INFO: Electrons 13:10:10:ST3_smx:INFO: # loops 0 13:10:12:ST3_smx:INFO: # loops 1 13:10:13:ST3_smx:INFO: # loops 2 13:10:15:ST3_smx:INFO: # loops 3 13:10:17:ST3_smx:INFO: # loops 4 13:10:18:ST3_smx:INFO: Total # of broken channels: 0 13:10:18:ST3_smx:INFO: List of broken channels: [] 13:10:18:ST3_smx:INFO: Total # of broken channels: 0 13:10:18:ST3_smx:INFO: List of broken channels: [] 13:10:20:ST3_smx:INFO: chip: 12-5 9.288730 C 1218.600960 mV 13:10:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:20:ST3_smx:INFO: Electrons 13:10:20:ST3_smx:INFO: # loops 0 13:10:22:ST3_smx:INFO: # loops 1 13:10:23:ST3_smx:INFO: # loops 2 13:10:25:ST3_smx:INFO: # loops 3 13:10:26:ST3_smx:INFO: # loops 4 13:10:28:ST3_smx:INFO: Total # of broken channels: 0 13:10:28:ST3_smx:INFO: List of broken channels: [] 13:10:28:ST3_smx:INFO: Total # of broken channels: 0 13:10:28:ST3_smx:INFO: List of broken channels: [] 13:10:30:ST3_smx:INFO: chip: 7-6 25.062742 C 1177.390875 mV 13:10:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:30:ST3_smx:INFO: Electrons 13:10:30:ST3_smx:INFO: # loops 0 13:10:31:ST3_smx:INFO: # loops 1 13:10:33:ST3_smx:INFO: # loops 2 13:10:34:ST3_smx:INFO: # loops 3 13:10:36:ST3_smx:INFO: # loops 4 13:10:38:ST3_smx:INFO: Total # of broken channels: 0 13:10:38:ST3_smx:INFO: List of broken channels: [] 13:10:38:ST3_smx:INFO: Total # of broken channels: 0 13:10:38:ST3_smx:INFO: List of broken channels: [] 13:10:39:ST3_smx:INFO: chip: 14-7 12.438562 C 1218.600960 mV 13:10:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:10:39:ST3_smx:INFO: Electrons 13:10:39:ST3_smx:INFO: # loops 0 13:10:41:ST3_smx:INFO: # loops 1 13:10:43:ST3_smx:INFO: # loops 2 13:10:44:ST3_smx:INFO: # loops 3 13:10:46:ST3_smx:INFO: # loops 4 13:10:47:ST3_smx:INFO: Total # of broken channels: 0 13:10:47:ST3_smx:INFO: List of broken channels: [] 13:10:47:ST3_smx:INFO: Total # of broken channels: 0 13:10:47:ST3_smx:INFO: List of broken channels: [] 13:10:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:10:48:febtest:INFO: 01-00 | XA-000-08-002-003-007-138-13 | 31.4 | 1177.4 13:10:48:febtest:INFO: 08-01 | XA-000-08-002-003-007-145-10 | 21.9 | 1206.9 13:10:48:febtest:INFO: 03-02 | XA-000-09-004-003-013-004-02 | 25.1 | 1201.0 13:10:49:febtest:INFO: 10-03 | XA-000-09-004-003-002-013-06 | 31.4 | 1171.5 13:10:49:febtest:INFO: 05-04 | XA-000-08-002-003-007-156-10 | 12.4 | 1247.9 13:10:49:febtest:INFO: 12-05 | XA-000-09-004-003-010-004-10 | 9.3 | 1242.0 13:10:49:febtest:INFO: 07-06 | XA-000-08-002-003-007-139-13 | 25.1 | 1195.1 13:10:50:febtest:INFO: 14-07 | XA-000-09-004-003-009-007-04 | 12.4 | 1242.0 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_09_27-13_08_33 OPERATOR : Oleksandr S.; Ralf K.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1243| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ SENSOR_NAME: 07203 | SIZE: 62x62 | GRADE: A MODULE_NAME: M8UL4T1010221B2 LADDER_NAME: L8UL401022 ------------------------------------------------------------ VI_before_Init : ['2.449', '1.4150', '1.849', '2.3800', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9810', '1.850', '2.2670', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9470', '1.850', '0.5167', '0.000', '0.0000', '0.000', '0.0000']