14:53:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:53:41:ST3_Shared:INFO:	                       FEB-Microcable                       
14:53:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:53:41:febtest:INFO:	Testing FEB with SN 1243
14:53:42:smx_tester:INFO:	Scanning setup
14:53:42:elinks:INFO:	Disabling clock on downlink 0
14:53:42:elinks:INFO:	Disabling clock on downlink 1
14:53:42:elinks:INFO:	Disabling clock on downlink 2
14:53:42:elinks:INFO:	Disabling clock on downlink 3
14:53:42:elinks:INFO:	Disabling clock on downlink 4
14:53:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:53:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:42:elinks:INFO:	Disabling clock on downlink 0
14:53:42:elinks:INFO:	Disabling clock on downlink 1
14:53:42:elinks:INFO:	Disabling clock on downlink 2
14:53:42:elinks:INFO:	Disabling clock on downlink 3
14:53:42:elinks:INFO:	Disabling clock on downlink 4
14:53:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:53:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:53:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:42:elinks:INFO:	Disabling clock on downlink 0
14:53:42:elinks:INFO:	Disabling clock on downlink 1
14:53:43:elinks:INFO:	Disabling clock on downlink 2
14:53:43:elinks:INFO:	Disabling clock on downlink 3
14:53:43:elinks:INFO:	Disabling clock on downlink 4
14:53:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:53:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:43:elinks:INFO:	Disabling clock on downlink 0
14:53:43:elinks:INFO:	Disabling clock on downlink 1
14:53:43:elinks:INFO:	Disabling clock on downlink 2
14:53:43:elinks:INFO:	Disabling clock on downlink 3
14:53:43:elinks:INFO:	Disabling clock on downlink 4
14:53:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:53:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:43:elinks:INFO:	Disabling clock on downlink 0
14:53:43:elinks:INFO:	Disabling clock on downlink 1
14:53:43:elinks:INFO:	Disabling clock on downlink 2
14:53:43:elinks:INFO:	Disabling clock on downlink 3
14:53:43:elinks:INFO:	Disabling clock on downlink 4
14:53:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:53:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:43:setup_element:INFO:	Scanning clock phase
14:53:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:53:43:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:53:43:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:53:43:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:53:43:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:53:43:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 8 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:53:43:setup_element:INFO:	Eye window for uplink 9 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:53:43:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:53:43:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
14:53:43:setup_element:INFO:	Scanning data phases
14:53:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:49:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:53:49:setup_element:INFO:	Eye window for uplink 0 : _____________XXXXXXXXX__________________
Data delay found: 37
14:53:49:setup_element:INFO:	Eye window for uplink 1 : _________XXXXXXX________________________
Data delay found: 32
14:53:49:setup_element:INFO:	Eye window for uplink 2 : __________XXXXXXX_______________________
Data delay found: 33
14:53:49:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXXX___________________________
Data delay found: 29
14:53:49:setup_element:INFO:	Eye window for uplink 6 : _XXXXX__________________________________
Data delay found: 23
14:53:49:setup_element:INFO:	Eye window for uplink 7 : XXX________________________________XXXXX
Data delay found: 18
14:53:49:setup_element:INFO:	Eye window for uplink 8 : _______________________XXXX_____________
Data delay found: 4
14:53:49:setup_element:INFO:	Eye window for uplink 9 : ___________________________XXXXXXX______
Data delay found: 10
14:53:49:setup_element:INFO:	Eye window for uplink 10: ____________________________XXXXXXX_____
Data delay found: 11
14:53:49:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXXXXXX
Data delay found: 15
14:53:49:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXXXX_____
Data delay found: 10
14:53:49:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXXXXX__
Data delay found: 13
14:53:49:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXXXXX_____
Data delay found: 10
14:53:49:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXXXXXX__
Data delay found: 13
14:53:49:setup_element:INFO:	Setting the data phase to 37 for uplink 0
14:53:49:setup_element:INFO:	Setting the data phase to 32 for uplink 1
14:53:49:setup_element:INFO:	Setting the data phase to 33 for uplink 2
14:53:49:setup_element:INFO:	Setting the data phase to 29 for uplink 3
14:53:49:setup_element:INFO:	Setting the data phase to 23 for uplink 6
14:53:49:setup_element:INFO:	Setting the data phase to 18 for uplink 7
14:53:49:setup_element:INFO:	Setting the data phase to 4 for uplink 8
14:53:49:setup_element:INFO:	Setting the data phase to 10 for uplink 9
14:53:49:setup_element:INFO:	Setting the data phase to 11 for uplink 10
14:53:49:setup_element:INFO:	Setting the data phase to 15 for uplink 11
14:53:49:setup_element:INFO:	Setting the data phase to 10 for uplink 12
14:53:49:setup_element:INFO:	Setting the data phase to 13 for uplink 13
14:53:49:setup_element:INFO:	Setting the data phase to 10 for uplink 14
14:53:49:setup_element:INFO:	Setting the data phase to 13 for uplink 15
14:53:49:setup_element:INFO:	Beginning SMX ASICs map scan
14:53:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:53:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:53:49:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:53:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:53:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:53:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:53:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:53:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:53:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:53:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:53:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:53:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:53:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:53:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:53:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:53:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:53:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:53:52:setup_element:INFO:	Performing Elink synchronization
14:53:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:53:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:53:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:53:52:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x0
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x1
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x2
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x3
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x5
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x6
14:53:52:ST3_emu_feb:DEBUG:	Chip address:  	0x7
14:53:52:febtest:INFO:	Init all SMX (CSA): 30
14:54:04:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:54:04:febtest:INFO:	01-00 | XA-000-08-002-003-007-138-13 |  40.9 | 1141.9
14:54:04:febtest:INFO:	08-01 | XA-000-08-002-003-007-145-10 |  31.4 | 1165.6
14:54:05:febtest:INFO:	03-02 | XA-000-09-004-003-013-004-02 |  34.6 | 1165.6
14:54:05:febtest:INFO:	10-03 | XA-000-09-004-003-002-013-06 |  40.9 | 1135.9
14:54:05:febtest:INFO:	12-05 | XA-000-09-004-003-010-004-10 |  21.9 | 1206.9
14:54:05:febtest:INFO:	07-06 | XA-000-08-002-003-007-139-13 |  34.6 | 1171.5
14:54:06:febtest:INFO:	14-07 | XA-000-09-004-003-009-007-04 |  21.9 | 1206.9
14:54:07:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:54:07:febtest:ERROR:	HW addres 5 != 4
14:54:11:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1147.806000 mV
14:54:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:11:ST3_smx:INFO:		Electrons
14:54:11:ST3_smx:INFO:	# loops 0
14:54:13:ST3_smx:INFO:	# loops 1
14:54:15:ST3_smx:INFO:	# loops 2
14:54:16:ST3_smx:INFO:	Total # of broken channels: 0
14:54:16:ST3_smx:INFO:	List of broken channels: []
14:54:16:ST3_smx:INFO:	Total # of broken channels: 0
14:54:16:ST3_smx:INFO:	List of broken channels: []
14:54:18:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1183.292940 mV
14:54:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:18:ST3_smx:INFO:		Electrons
14:54:18:ST3_smx:INFO:	# loops 0
14:54:20:ST3_smx:INFO:	# loops 1
14:54:21:ST3_smx:INFO:	# loops 2
14:54:22:ST3_smx:INFO:	Total # of broken channels: 0
14:54:22:ST3_smx:INFO:	List of broken channels: []
14:54:23:ST3_smx:INFO:	Total # of broken channels: 62
14:54:23:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
14:54:24:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1177.390875 mV
14:54:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:24:ST3_smx:INFO:		Electrons
14:54:24:ST3_smx:INFO:	# loops 0
14:54:26:ST3_smx:INFO:	# loops 1
14:54:27:ST3_smx:INFO:	# loops 2
14:54:29:ST3_smx:INFO:	Total # of broken channels: 0
14:54:29:ST3_smx:INFO:	List of broken channels: []
14:54:29:ST3_smx:INFO:	Total # of broken channels: 4
14:54:29:ST3_smx:INFO:	List of broken channels: [4, 6, 70, 92]
14:54:31:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1153.732915 mV
14:54:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:31:ST3_smx:INFO:		Electrons
14:54:31:ST3_smx:INFO:	# loops 0
14:54:32:ST3_smx:INFO:	# loops 1
14:54:33:ST3_smx:INFO:	# loops 2
14:54:35:ST3_smx:INFO:	Total # of broken channels: 0
14:54:35:ST3_smx:INFO:	List of broken channels: []
14:54:35:ST3_smx:INFO:	Total # of broken channels: 0
14:54:35:ST3_smx:INFO:	List of broken channels: []
14:54:37:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1218.600960 mV
14:54:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:37:ST3_smx:INFO:		Electrons
14:54:37:ST3_smx:INFO:	# loops 0
14:54:38:ST3_smx:INFO:	# loops 1
14:54:40:ST3_smx:INFO:	# loops 2
14:54:41:ST3_smx:INFO:	Total # of broken channels: 0
14:54:41:ST3_smx:INFO:	List of broken channels: []
14:54:41:ST3_smx:INFO:	Total # of broken channels: 0
14:54:41:ST3_smx:INFO:	List of broken channels: []
14:54:43:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1177.390875 mV
14:54:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:43:ST3_smx:INFO:		Electrons
14:54:43:ST3_smx:INFO:	# loops 0
14:54:45:ST3_smx:INFO:	# loops 1
14:54:46:ST3_smx:INFO:	# loops 2
14:54:48:ST3_smx:INFO:	Total # of broken channels: 0
14:54:48:ST3_smx:INFO:	List of broken channels: []
14:54:48:ST3_smx:INFO:	Total # of broken channels: 0
14:54:48:ST3_smx:INFO:	List of broken channels: []
14:54:49:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1218.600960 mV
14:54:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:54:49:ST3_smx:INFO:		Electrons
14:54:49:ST3_smx:INFO:	# loops 0
14:54:51:ST3_smx:INFO:	# loops 1
14:54:52:ST3_smx:INFO:	# loops 2
14:54:54:ST3_smx:INFO:	Total # of broken channels: 0
14:54:54:ST3_smx:INFO:	List of broken channels: []
14:54:54:ST3_smx:INFO:	Total # of broken channels: 0
14:54:54:ST3_smx:INFO:	List of broken channels: []
14:54:54:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:54:54:febtest:INFO:	01-00 | XA-000-08-002-003-007-138-13 |  40.9 | 1165.6
14:54:55:febtest:INFO:	08-01 | XA-000-08-002-003-007-145-10 |  31.4 | 1206.9
14:54:55:febtest:INFO:	03-02 | XA-000-09-004-003-013-004-02 |  37.7 | 1195.1
14:54:55:febtest:INFO:	10-03 | XA-000-09-004-003-002-013-06 |  40.9 | 1171.5
14:54:55:febtest:INFO:	12-05 | XA-000-09-004-003-010-004-10 |  21.9 | 1236.2
14:54:56:febtest:INFO:	07-06 | XA-000-08-002-003-007-139-13 |  34.6 | 1195.1
14:54:56:febtest:INFO:	14-07 | XA-000-09-004-003-009-007-04 |  25.1 | 1242.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_19-14_53_41
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1243| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5270', '1.848', '2.5360', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9510', '1.850', '2.2720', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9240', '1.850', '0.7781', '0.000', '0.0000', '0.000', '0.0000']