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FEB_1244 17.09.24 11:27:17
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11:27:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:27:17:ST3_Shared:INFO: FEB-Microcable
11:27:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:27:17:febtest:INFO: Testing FEB with SN 1244
11:27:19:smx_tester:INFO: Scanning setup
11:27:19:elinks:INFO: Disabling clock on downlink 0
11:27:19:elinks:INFO: Disabling clock on downlink 1
11:27:19:elinks:INFO: Disabling clock on downlink 2
11:27:19:elinks:INFO: Disabling clock on downlink 3
11:27:19:elinks:INFO: Disabling clock on downlink 4
11:27:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:27:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:27:19:elinks:INFO: Disabling clock on downlink 0
11:27:19:elinks:INFO: Disabling clock on downlink 1
11:27:19:elinks:INFO: Disabling clock on downlink 2
11:27:19:elinks:INFO: Disabling clock on downlink 3
11:27:19:elinks:INFO: Disabling clock on downlink 4
11:27:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:27:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:27:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:27:19:elinks:INFO: Disabling clock on downlink 0
11:27:19:elinks:INFO: Disabling clock on downlink 1
11:27:19:elinks:INFO: Disabling clock on downlink 2
11:27:19:elinks:INFO: Disabling clock on downlink 3
11:27:19:elinks:INFO: Disabling clock on downlink 4
11:27:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:27:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:27:19:elinks:INFO: Disabling clock on downlink 0
11:27:19:elinks:INFO: Disabling clock on downlink 1
11:27:19:elinks:INFO: Disabling clock on downlink 2
11:27:19:elinks:INFO: Disabling clock on downlink 3
11:27:19:elinks:INFO: Disabling clock on downlink 4
11:27:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:27:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:27:19:elinks:INFO: Disabling clock on downlink 0
11:27:19:elinks:INFO: Disabling clock on downlink 1
11:27:19:elinks:INFO: Disabling clock on downlink 2
11:27:19:elinks:INFO: Disabling clock on downlink 3
11:27:19:elinks:INFO: Disabling clock on downlink 4
11:27:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:27:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:27:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:27:20:setup_element:INFO: Scanning clock phase
11:27:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:27:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:27:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:27:20:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:27:20:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:27:20:setup_element:INFO: Eye window for uplink 4 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:27:20:setup_element:INFO: Eye window for uplink 5 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:27:20:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:27:20:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:27:20:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:27:20:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:27:20:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:27:20:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:27:20:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
11:27:20:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
11:27:20:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:27:20:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:27:20:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
11:27:20:setup_element:INFO: Scanning data phases
11:27:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:27:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:27:25:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:27:25:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________
Data delay found: 27
11:27:25:setup_element:INFO: Eye window for uplink 3 : _XXXXXXX________________________________
Data delay found: 24
11:27:26:setup_element:INFO: Eye window for uplink 4 : XXXXX________________________________XXX
Data delay found: 20
11:27:26:setup_element:INFO: Eye window for uplink 5 : X________________________________XXXXXX_
Data delay found: 16
11:27:26:setup_element:INFO: Eye window for uplink 6 : ___XXXXXXXX_____________________________
Data delay found: 26
11:27:26:setup_element:INFO: Eye window for uplink 7 : XXXXXXX_______________________________XX
Data delay found: 22
11:27:26:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXX__________
Data delay found: 6
11:27:26:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXXXX____
Data delay found: 11
11:27:26:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXX_________
Data delay found: 7
11:27:26:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXXXX_____
Data delay found: 10
11:27:26:setup_element:INFO: Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
11:27:26:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXXXX_____
Data delay found: 11
11:27:26:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXXXXX_____
Data delay found: 10
11:27:26:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXXXXX___
Data delay found: 12
11:27:26:setup_element:INFO: Setting the data phase to 27 for uplink 2
11:27:26:setup_element:INFO: Setting the data phase to 24 for uplink 3
11:27:26:setup_element:INFO: Setting the data phase to 20 for uplink 4
11:27:26:setup_element:INFO: Setting the data phase to 16 for uplink 5
11:27:26:setup_element:INFO: Setting the data phase to 26 for uplink 6
11:27:26:setup_element:INFO: Setting the data phase to 22 for uplink 7
11:27:26:setup_element:INFO: Setting the data phase to 6 for uplink 8
11:27:26:setup_element:INFO: Setting the data phase to 11 for uplink 9
11:27:26:setup_element:INFO: Setting the data phase to 7 for uplink 10
11:27:26:setup_element:INFO: Setting the data phase to 10 for uplink 11
11:27:26:setup_element:INFO: Setting the data phase to 8 for uplink 12
11:27:26:setup_element:INFO: Setting the data phase to 11 for uplink 13
11:27:26:setup_element:INFO: Setting the data phase to 10 for uplink 14
11:27:26:setup_element:INFO: Setting the data phase to 12 for uplink 15
11:27:26:setup_element:INFO: Beginning SMX ASICs map scan
11:27:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:27:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:27:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:27:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:27:26:uplink:INFO: Setting uplinks mask [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:27:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:27:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:27:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:27:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:27:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:27:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:27:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:27:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:27:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:27:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:27:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:27:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:27:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:27:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:27:28:setup_element:INFO: Performing Elink synchronization
11:27:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:27:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:27:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:27:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:27:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:27:28:uplink:INFO: Enabling uplinks [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x1
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x2
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x3
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x4
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x5
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x6
11:27:29:ST3_emu_feb:DEBUG: Chip address: 0x7
11:27:29:febtest:INFO: Init all SMX (CSA): 30
11:27:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:27:42:febtest:INFO: 08-01 | XA-000-08-002-003-007-092-05 | 37.7 | 1141.9
11:27:43:febtest:INFO: 03-02 | XA-000-08-002-003-007-093-05 | 44.1 | 1124.0
11:27:43:febtest:INFO: 10-03 | XA-000-08-002-003-007-091-05 | 34.6 | 1147.8
11:27:43:febtest:INFO: 05-04 | XA-000-08-002-003-007-061-14 | 53.6 | 1118.1
11:27:43:febtest:INFO: 12-05 | XA-000-08-002-003-007-096-12 | 44.1 | 1112.1
11:27:43:febtest:INFO: 07-06 | XA-000-09-004-003-017-022-03 | 18.7 | 1206.9
11:27:44:febtest:INFO: 14-07 | XA-000-08-002-003-007-095-05 | 31.4 | 1165.6
11:27:45:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:27:45:febtest:ERROR: HW addres 1 != 0
11:27:49:ST3_smx:INFO: chip: 8-1 37.726682 C 1153.732915 mV
11:27:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:49:ST3_smx:INFO: Electrons
11:27:49:ST3_smx:INFO: # loops 0
11:27:51:ST3_smx:INFO: # loops 1
11:27:52:ST3_smx:INFO: # loops 2
11:27:54:ST3_smx:INFO: Total # of broken channels: 0
11:27:54:ST3_smx:INFO: List of broken channels: []
11:27:54:ST3_smx:INFO: Total # of broken channels: 3
11:27:54:ST3_smx:INFO: List of broken channels: [0, 2, 4]
11:27:56:ST3_smx:INFO: chip: 3-2 44.073563 C 1135.937260 mV
11:27:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:56:ST3_smx:INFO: Electrons
11:27:56:ST3_smx:INFO: # loops 0
11:27:57:ST3_smx:INFO: # loops 1
11:27:59:ST3_smx:INFO: # loops 2
11:28:01:ST3_smx:INFO: Total # of broken channels: 0
11:28:01:ST3_smx:INFO: List of broken channels: []
11:28:01:ST3_smx:INFO: Total # of broken channels: 1
11:28:01:ST3_smx:INFO: List of broken channels: [6]
11:28:02:ST3_smx:INFO: chip: 10-3 34.556970 C 1165.571835 mV
11:28:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:02:ST3_smx:INFO: Electrons
11:28:02:ST3_smx:INFO: # loops 0
11:28:04:ST3_smx:INFO: # loops 1
11:28:06:ST3_smx:INFO: # loops 2
11:28:07:ST3_smx:INFO: Total # of broken channels: 1
11:28:07:ST3_smx:INFO: List of broken channels: [94]
11:28:07:ST3_smx:INFO: Total # of broken channels: 0
11:28:07:ST3_smx:INFO: List of broken channels: []
11:28:09:ST3_smx:INFO: chip: 5-4 53.612520 C 1124.048640 mV
11:28:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:09:ST3_smx:INFO: Electrons
11:28:09:ST3_smx:INFO: # loops 0
11:28:11:ST3_smx:INFO: # loops 1
11:28:12:ST3_smx:INFO: # loops 2
11:28:14:ST3_smx:INFO: Total # of broken channels: 0
11:28:14:ST3_smx:INFO: List of broken channels: []
11:28:14:ST3_smx:INFO: Total # of broken channels: 3
11:28:14:ST3_smx:INFO: List of broken channels: [6, 8, 10]
11:28:16:ST3_smx:INFO: chip: 12-5 44.073563 C 1124.048640 mV
11:28:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:16:ST3_smx:INFO: Electrons
11:28:16:ST3_smx:INFO: # loops 0
11:28:17:ST3_smx:INFO: # loops 1
11:28:19:ST3_smx:INFO: # loops 2
11:28:21:ST3_smx:INFO: Total # of broken channels: 0
11:28:21:ST3_smx:INFO: List of broken channels: []
11:28:21:ST3_smx:INFO: Total # of broken channels: 0
11:28:21:ST3_smx:INFO: List of broken channels: []
11:28:22:ST3_smx:INFO: chip: 7-6 18.745682 C 1218.600960 mV
11:28:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:22:ST3_smx:INFO: Electrons
11:28:22:ST3_smx:INFO: # loops 0
11:28:24:ST3_smx:INFO: # loops 1
11:28:26:ST3_smx:INFO: # loops 2
11:28:27:ST3_smx:INFO: Total # of broken channels: 0
11:28:27:ST3_smx:INFO: List of broken channels: []
11:28:27:ST3_smx:INFO: Total # of broken channels: 4
11:28:27:ST3_smx:INFO: List of broken channels: [6, 10, 110, 125]
11:28:29:ST3_smx:INFO: chip: 14-7 31.389742 C 1177.390875 mV
11:28:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:28:29:ST3_smx:INFO: Electrons
11:28:29:ST3_smx:INFO: # loops 0
11:28:31:ST3_smx:INFO: # loops 1
11:28:32:ST3_smx:INFO: # loops 2
11:28:34:ST3_smx:INFO: Total # of broken channels: 0
11:28:34:ST3_smx:INFO: List of broken channels: []
11:28:34:ST3_smx:INFO: Total # of broken channels: 2
11:28:34:ST3_smx:INFO: List of broken channels: [25, 27]
11:28:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:28:34:febtest:INFO: 08-01 | XA-000-08-002-003-007-092-05 | 37.7 | 1177.4
11:28:35:febtest:INFO: 03-02 | XA-000-08-002-003-007-093-05 | 47.3 | 1153.7
11:28:35:febtest:INFO: 10-03 | XA-000-08-002-003-007-091-05 | 37.7 | 1189.2
11:28:35:febtest:INFO: 05-04 | XA-000-08-002-003-007-061-14 | 53.6 | 1147.8
11:28:35:febtest:INFO: 12-05 | XA-000-08-002-003-007-096-12 | 47.3 | 1147.8
11:28:35:febtest:INFO: 07-06 | XA-000-09-004-003-017-022-03 | 18.7 | 1236.2
11:28:36:febtest:INFO: 14-07 | XA-000-08-002-003-007-095-05 | 34.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_17-11_27_17
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1244| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3990', '1.849', '2.2730', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9480', '1.850', '2.4260', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9110', '1.850', '0.8038', '0.000', '0.0000', '0.000', '0.0000']