13:49:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:49:45:ST3_Shared:INFO:	                       FEB-Microcable                       
13:49:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:49:45:febtest:INFO:	Testing FEB with SN 1244
13:49:47:smx_tester:INFO:	Scanning setup
13:49:47:elinks:INFO:	Disabling clock on downlink 0
13:49:47:elinks:INFO:	Disabling clock on downlink 1
13:49:47:elinks:INFO:	Disabling clock on downlink 2
13:49:47:elinks:INFO:	Disabling clock on downlink 3
13:49:47:elinks:INFO:	Disabling clock on downlink 4
13:49:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:49:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:49:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:49:47:elinks:INFO:	Disabling clock on downlink 0
13:49:47:elinks:INFO:	Disabling clock on downlink 1
13:49:47:elinks:INFO:	Disabling clock on downlink 2
13:49:47:elinks:INFO:	Disabling clock on downlink 3
13:49:47:elinks:INFO:	Disabling clock on downlink 4
13:49:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:49:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:49:47:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:49:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:49:47:elinks:INFO:	Disabling clock on downlink 0
13:49:47:elinks:INFO:	Disabling clock on downlink 1
13:49:47:elinks:INFO:	Disabling clock on downlink 2
13:49:47:elinks:INFO:	Disabling clock on downlink 3
13:49:47:elinks:INFO:	Disabling clock on downlink 4
13:49:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:49:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:49:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:49:47:elinks:INFO:	Disabling clock on downlink 0
13:49:47:elinks:INFO:	Disabling clock on downlink 1
13:49:47:elinks:INFO:	Disabling clock on downlink 2
13:49:47:elinks:INFO:	Disabling clock on downlink 3
13:49:47:elinks:INFO:	Disabling clock on downlink 4
13:49:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:49:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:49:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:49:47:elinks:INFO:	Disabling clock on downlink 0
13:49:47:elinks:INFO:	Disabling clock on downlink 1
13:49:47:elinks:INFO:	Disabling clock on downlink 2
13:49:47:elinks:INFO:	Disabling clock on downlink 3
13:49:47:elinks:INFO:	Disabling clock on downlink 4
13:49:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:49:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:49:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:49:48:setup_element:INFO:	Scanning clock phase
13:49:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:49:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:49:48:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:49:48:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 4 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:49:48:setup_element:INFO:	Eye window for uplink 5 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:49:48:setup_element:INFO:	Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
13:49:48:setup_element:INFO:	Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
13:49:48:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:49:48:setup_element:INFO:	Eye window for uplink 12: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
13:49:48:setup_element:INFO:	Eye window for uplink 13: ___________________________________________________________________XXXXXXXXXX___
Clock Delay: 31
13:49:48:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:49:48:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:49:48:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
13:49:48:setup_element:INFO:	Scanning data phases
13:49:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:49:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:49:54:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:49:54:setup_element:INFO:	Eye window for uplink 2 : ____XXXXXXX_____________________________
Data delay found: 27
13:49:54:setup_element:INFO:	Eye window for uplink 3 : _XXXXXXX________________________________
Data delay found: 24
13:49:54:setup_element:INFO:	Eye window for uplink 4 : XXXXX________________________________XXX
Data delay found: 20
13:49:54:setup_element:INFO:	Eye window for uplink 5 : X________________________________XXXXXX_
Data delay found: 16
13:49:54:setup_element:INFO:	Eye window for uplink 6 : ____XXXXXXX_____________________________
Data delay found: 27
13:49:54:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXX______________________________XX
Data delay found: 22
13:49:54:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXXXXX_________
Data delay found: 7
13:49:54:setup_element:INFO:	Eye window for uplink 9 : ____________________________XXXXXXXX____
Data delay found: 11
13:49:54:setup_element:INFO:	Eye window for uplink 10: ________________________XXXXXXXX________
Data delay found: 7
13:49:54:setup_element:INFO:	Eye window for uplink 11: ___________________________XXXXXXXXX____
Data delay found: 11
13:49:54:setup_element:INFO:	Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
13:49:54:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXXX_____
Data delay found: 11
13:49:54:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXX______
Data delay found: 10
13:49:54:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXXXXX___
Data delay found: 12
13:49:54:setup_element:INFO:	Setting the data phase to 27 for uplink 2
13:49:54:setup_element:INFO:	Setting the data phase to 24 for uplink 3
13:49:54:setup_element:INFO:	Setting the data phase to 20 for uplink 4
13:49:54:setup_element:INFO:	Setting the data phase to 16 for uplink 5
13:49:54:setup_element:INFO:	Setting the data phase to 27 for uplink 6
13:49:54:setup_element:INFO:	Setting the data phase to 22 for uplink 7
13:49:54:setup_element:INFO:	Setting the data phase to 7 for uplink 8
13:49:54:setup_element:INFO:	Setting the data phase to 11 for uplink 9
13:49:54:setup_element:INFO:	Setting the data phase to 7 for uplink 10
13:49:54:setup_element:INFO:	Setting the data phase to 11 for uplink 11
13:49:54:setup_element:INFO:	Setting the data phase to 8 for uplink 12
13:49:54:setup_element:INFO:	Setting the data phase to 11 for uplink 13
13:49:54:setup_element:INFO:	Setting the data phase to 10 for uplink 14
13:49:54:setup_element:INFO:	Setting the data phase to 12 for uplink 15
13:49:54:setup_element:INFO:	Beginning SMX ASICs map scan
13:49:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:49:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:49:54:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:49:54:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:49:54:uplink:INFO:	Setting uplinks mask [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:49:54:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:49:54:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:49:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:49:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:49:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:49:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:49:55:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:49:55:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:49:55:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:49:55:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:49:55:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:49:55:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:49:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:49:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:49:57:setup_element:INFO:	Performing Elink synchronization
13:49:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:49:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:49:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:49:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:49:57:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:49:57:uplink:INFO:	Enabling uplinks [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:49:57:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:49:57:febtest:INFO:	Init all SMX (CSA): 30
13:50:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:50:10:febtest:INFO:	08-01 | XA-000-08-002-003-007-092-05 |  40.9 | 1141.9
13:50:10:febtest:INFO:	03-02 | XA-000-08-002-003-007-093-05 |  47.3 | 1130.0
13:50:10:febtest:INFO:	10-03 | XA-000-08-002-003-007-091-05 |  37.7 | 1153.7
13:50:10:febtest:INFO:	05-04 | XA-000-08-002-003-007-061-14 |  56.8 | 1124.0
13:50:10:febtest:INFO:	12-05 | XA-000-08-002-003-007-096-12 |  47.3 | 1112.1
13:50:11:febtest:INFO:	07-06 | XA-000-09-004-003-017-022-03 |  18.7 | 1212.7
13:50:11:febtest:INFO:	14-07 | XA-000-08-002-003-007-095-05 |  34.6 | 1165.6
13:50:12:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:50:13:febtest:ERROR:	HW addres 1 != 0
13:50:17:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1153.732915 mV
13:50:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:17:ST3_smx:INFO:		Electrons
13:50:17:ST3_smx:INFO:	# loops 0
13:50:18:ST3_smx:INFO:	# loops 1
13:50:20:ST3_smx:INFO:	# loops 2
13:50:21:ST3_smx:INFO:	Total # of broken channels: 0
13:50:21:ST3_smx:INFO:	List of broken channels: []
13:50:21:ST3_smx:INFO:	Total # of broken channels: 3
13:50:21:ST3_smx:INFO:	List of broken channels: [0, 2, 4]
13:50:23:ST3_smx:INFO:	chip: 3-2 	 47.250730 C 	 1135.937260 mV
13:50:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:23:ST3_smx:INFO:		Electrons
13:50:23:ST3_smx:INFO:	# loops 0
13:50:25:ST3_smx:INFO:	# loops 1
13:50:26:ST3_smx:INFO:	# loops 2
13:50:28:ST3_smx:INFO:	Total # of broken channels: 0
13:50:28:ST3_smx:INFO:	List of broken channels: []
13:50:28:ST3_smx:INFO:	Total # of broken channels: 2
13:50:28:ST3_smx:INFO:	List of broken channels: [1, 5]
13:50:30:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1165.571835 mV
13:50:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:30:ST3_smx:INFO:		Electrons
13:50:30:ST3_smx:INFO:	# loops 0
13:50:32:ST3_smx:INFO:	# loops 1
13:50:33:ST3_smx:INFO:	# loops 2
13:50:35:ST3_smx:INFO:	Total # of broken channels: 0
13:50:35:ST3_smx:INFO:	List of broken channels: []
13:50:35:ST3_smx:INFO:	Total # of broken channels: 1
13:50:35:ST3_smx:INFO:	List of broken channels: [127]
13:50:37:ST3_smx:INFO:	chip: 5-4 	 56.797143 C 	 1129.995435 mV
13:50:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:37:ST3_smx:INFO:		Electrons
13:50:37:ST3_smx:INFO:	# loops 0
13:50:38:ST3_smx:INFO:	# loops 1
13:50:40:ST3_smx:INFO:	# loops 2
13:50:41:ST3_smx:INFO:	Total # of broken channels: 0
13:50:41:ST3_smx:INFO:	List of broken channels: []
13:50:41:ST3_smx:INFO:	Total # of broken channels: 8
13:50:41:ST3_smx:INFO:	List of broken channels: [8, 10, 12, 14, 16, 18, 20, 30]
13:50:43:ST3_smx:INFO:	chip: 12-5 	 47.250730 C 	 1124.048640 mV
13:50:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:43:ST3_smx:INFO:		Electrons
13:50:43:ST3_smx:INFO:	# loops 0
13:50:45:ST3_smx:INFO:	# loops 1
13:50:46:ST3_smx:INFO:	# loops 2
13:50:48:ST3_smx:INFO:	Total # of broken channels: 0
13:50:48:ST3_smx:INFO:	List of broken channels: []
13:50:48:ST3_smx:INFO:	Total # of broken channels: 7
13:50:48:ST3_smx:INFO:	List of broken channels: [109, 113, 115, 117, 119, 121, 123]
13:50:50:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1218.600960 mV
13:50:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:50:ST3_smx:INFO:		Electrons
13:50:50:ST3_smx:INFO:	# loops 0
13:50:51:ST3_smx:INFO:	# loops 1
13:50:53:ST3_smx:INFO:	# loops 2
13:50:54:ST3_smx:INFO:	Total # of broken channels: 0
13:50:54:ST3_smx:INFO:	List of broken channels: []
13:50:54:ST3_smx:INFO:	Total # of broken channels: 1
13:50:54:ST3_smx:INFO:	List of broken channels: [125]
13:50:56:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1177.390875 mV
13:50:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:50:56:ST3_smx:INFO:		Electrons
13:50:56:ST3_smx:INFO:	# loops 0
13:50:58:ST3_smx:INFO:	# loops 1
13:50:59:ST3_smx:INFO:	# loops 2
13:51:01:ST3_smx:INFO:	Total # of broken channels: 0
13:51:01:ST3_smx:INFO:	List of broken channels: []
13:51:01:ST3_smx:INFO:	Total # of broken channels: 0
13:51:01:ST3_smx:INFO:	List of broken channels: []
13:51:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:01:febtest:INFO:	08-01 | XA-000-08-002-003-007-092-05 |  40.9 | 1177.4
13:51:02:febtest:INFO:	03-02 | XA-000-08-002-003-007-093-05 |  47.3 | 1153.7
13:51:02:febtest:INFO:	10-03 | XA-000-08-002-003-007-091-05 |  37.7 | 1189.2
13:51:02:febtest:INFO:	05-04 | XA-000-08-002-003-007-061-14 |  56.8 | 1147.8
13:51:02:febtest:INFO:	12-05 | XA-000-08-002-003-007-096-12 |  50.4 | 1147.8
13:51:03:febtest:INFO:	07-06 | XA-000-09-004-003-017-022-03 |  21.9 | 1236.2
13:51:03:febtest:INFO:	14-07 | XA-000-08-002-003-007-095-05 |  37.7 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_17-13_49_45
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1244| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.6550', '1.849', '2.0790', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.7940', '1.850', '2.1990', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.7430', '1.850', '0.4695', '0.000', '0.0000', '0.000', '0.0000']