FEB_1245    17.09.24 11:30:22

TextEdit.txt
            11:30:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:30:22:ST3_Shared:INFO:	                       FEB-Microcable                       
11:30:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:30:22:febtest:INFO:	Testing FEB with SN 1245
11:30:24:smx_tester:INFO:	Scanning setup
11:30:24:elinks:INFO:	Disabling clock on downlink 0
11:30:24:elinks:INFO:	Disabling clock on downlink 1
11:30:24:elinks:INFO:	Disabling clock on downlink 2
11:30:24:elinks:INFO:	Disabling clock on downlink 3
11:30:24:elinks:INFO:	Disabling clock on downlink 4
11:30:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:30:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:30:24:elinks:INFO:	Disabling clock on downlink 0
11:30:24:elinks:INFO:	Disabling clock on downlink 1
11:30:24:elinks:INFO:	Disabling clock on downlink 2
11:30:24:elinks:INFO:	Disabling clock on downlink 3
11:30:24:elinks:INFO:	Disabling clock on downlink 4
11:30:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:30:24:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:30:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:30:24:elinks:INFO:	Disabling clock on downlink 0
11:30:24:elinks:INFO:	Disabling clock on downlink 1
11:30:24:elinks:INFO:	Disabling clock on downlink 2
11:30:24:elinks:INFO:	Disabling clock on downlink 3
11:30:24:elinks:INFO:	Disabling clock on downlink 4
11:30:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:30:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:30:24:elinks:INFO:	Disabling clock on downlink 0
11:30:24:elinks:INFO:	Disabling clock on downlink 1
11:30:24:elinks:INFO:	Disabling clock on downlink 2
11:30:24:elinks:INFO:	Disabling clock on downlink 3
11:30:24:elinks:INFO:	Disabling clock on downlink 4
11:30:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:30:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:30:24:elinks:INFO:	Disabling clock on downlink 0
11:30:24:elinks:INFO:	Disabling clock on downlink 1
11:30:24:elinks:INFO:	Disabling clock on downlink 2
11:30:24:elinks:INFO:	Disabling clock on downlink 3
11:30:24:elinks:INFO:	Disabling clock on downlink 4
11:30:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:30:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:30:24:setup_element:INFO:	Scanning clock phase
11:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:30:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:25:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:30:25:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:25:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:25:setup_element:INFO:	Eye window for uplink 14: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:30:25:setup_element:INFO:	Eye window for uplink 15: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:30:25:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
11:30:25:setup_element:INFO:	Scanning data phases
11:30:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:30:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:30:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:30:30:setup_element:INFO:	Eye window for uplink 0 : __________XXXXXXX_______________________
Data delay found: 33
11:30:30:setup_element:INFO:	Eye window for uplink 1 : ______XXXXXX____________________________
Data delay found: 28
11:30:30:setup_element:INFO:	Eye window for uplink 2 : ______XXXXXXXX__________________________
Data delay found: 29
11:30:30:setup_element:INFO:	Eye window for uplink 3 : __XXXXXXXXXX____________________________
Data delay found: 26
11:30:30:setup_element:INFO:	Eye window for uplink 4 : ____XXXXXXXX____________________________
Data delay found: 27
11:30:30:setup_element:INFO:	Eye window for uplink 5 : XXXXXX_________________________________X
Data delay found: 22
11:30:30:setup_element:INFO:	Eye window for uplink 6 : XXXXXXX________________________________X
Data delay found: 22
11:30:30:setup_element:INFO:	Eye window for uplink 7 : XXXX______________________________XXXXXX
Data delay found: 18
11:30:30:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXXXX________
Data delay found: 8
11:30:30:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
11:30:30:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXXXX______
Data delay found: 10
11:30:30:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXXXXX__
Data delay found: 13
11:30:30:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXXXX_____
Data delay found: 10
11:30:30:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXXXXXX_
Data delay found: 14
11:30:30:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXXX_______
Data delay found: 9
11:30:30:setup_element:INFO:	Eye window for uplink 15: ___________________________XXXXXXXX_____
Data delay found: 10
11:30:30:setup_element:INFO:	Setting the data phase to 33 for uplink 0
11:30:30:setup_element:INFO:	Setting the data phase to 28 for uplink 1
11:30:30:setup_element:INFO:	Setting the data phase to 29 for uplink 2
11:30:30:setup_element:INFO:	Setting the data phase to 26 for uplink 3
11:30:30:setup_element:INFO:	Setting the data phase to 27 for uplink 4
11:30:30:setup_element:INFO:	Setting the data phase to 22 for uplink 5
11:30:30:setup_element:INFO:	Setting the data phase to 22 for uplink 6
11:30:30:setup_element:INFO:	Setting the data phase to 18 for uplink 7
11:30:30:setup_element:INFO:	Setting the data phase to 8 for uplink 8
11:30:30:setup_element:INFO:	Setting the data phase to 13 for uplink 9
11:30:30:setup_element:INFO:	Setting the data phase to 10 for uplink 10
11:30:30:setup_element:INFO:	Setting the data phase to 13 for uplink 11
11:30:30:setup_element:INFO:	Setting the data phase to 10 for uplink 12
11:30:30:setup_element:INFO:	Setting the data phase to 14 for uplink 13
11:30:30:setup_element:INFO:	Setting the data phase to 9 for uplink 14
11:30:30:setup_element:INFO:	Setting the data phase to 10 for uplink 15
11:30:30:setup_element:INFO:	Beginning SMX ASICs map scan
11:30:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:30:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:30:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:30:30:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:30:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:30:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:30:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:30:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:30:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:30:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:30:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:30:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:30:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:30:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:30:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:30:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:30:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:30:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:30:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:30:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:30:33:setup_element:INFO:	Performing Elink synchronization
11:30:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:30:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:30:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:30:33:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:30:33:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:30:33:ST3_emu_feb:DEBUG:	Chip address:  	0x0
11:30:33:ST3_emu_feb:DEBUG:	Chip address:  	0x1
11:30:33:ST3_emu_feb:DEBUG:	Chip address:  	0x2
11:30:34:ST3_emu_feb:DEBUG:	Chip address:  	0x3
11:30:34:ST3_emu_feb:DEBUG:	Chip address:  	0x4
11:30:34:ST3_emu_feb:DEBUG:	Chip address:  	0x5
11:30:34:ST3_emu_feb:DEBUG:	Chip address:  	0x6
11:30:34:ST3_emu_feb:DEBUG:	Chip address:  	0x7
11:30:34:febtest:INFO:	Init all SMX (CSA): 30
11:30:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:30:48:febtest:INFO:	01-00 | XA-000-09-004-003-015-015-01 |  28.2 | 1165.6
11:30:49:febtest:INFO:	08-01 | XA-000-09-004-003-012-017-08 |  34.6 | 1147.8
11:30:49:febtest:INFO:	03-02 | XA-000-09-004-003-009-006-04 |  37.7 | 1141.9
11:30:49:febtest:INFO:	10-03 | XA-000-08-002-003-007-155-10 |  31.4 | 1159.7
11:30:49:febtest:INFO:	05-04 | XA-000-09-004-003-010-003-10 |  28.2 | 1195.1
11:30:49:febtest:INFO:	12-05 | XA-000-09-004-003-014-016-11 |  25.1 | 1189.2
11:30:50:febtest:INFO:	07-06 | XA-000-09-004-003-010-007-10 |  21.9 | 1201.0
11:30:50:febtest:INFO:	14-07 | XA-000-09-004-003-014-015-12 |  28.2 | 1165.6
11:30:51:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:30:53:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1183.292940 mV
11:30:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:30:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:30:53:ST3_smx:INFO:		Electrons
11:30:53:ST3_smx:INFO:	# loops 0
11:30:55:ST3_smx:INFO:	# loops 1
11:30:56:ST3_smx:INFO:	# loops 2
11:30:58:ST3_smx:INFO:	Total # of broken channels: 0
11:30:58:ST3_smx:INFO:	List of broken channels: []
11:30:58:ST3_smx:INFO:	Total # of broken channels: 9
11:30:58:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 21]
11:31:00:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1159.654860 mV
11:31:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:00:ST3_smx:INFO:		Electrons
11:31:00:ST3_smx:INFO:	# loops 0
11:31:01:ST3_smx:INFO:	# loops 1
11:31:03:ST3_smx:INFO:	# loops 2
11:31:05:ST3_smx:INFO:	Total # of broken channels: 0
11:31:05:ST3_smx:INFO:	List of broken channels: []
11:31:05:ST3_smx:INFO:	Total # of broken channels: 0
11:31:05:ST3_smx:INFO:	List of broken channels: []
11:31:06:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1153.732915 mV
11:31:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:06:ST3_smx:INFO:		Electrons
11:31:06:ST3_smx:INFO:	# loops 0
11:31:08:ST3_smx:INFO:	# loops 1
11:31:10:ST3_smx:INFO:	# loops 2
11:31:11:ST3_smx:INFO:	Total # of broken channels: 0
11:31:11:ST3_smx:INFO:	List of broken channels: []
11:31:11:ST3_smx:INFO:	Total # of broken channels: 19
11:31:11:ST3_smx:INFO:	List of broken channels: [50, 82, 86, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120]
11:31:13:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1177.390875 mV
11:31:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:13:ST3_smx:INFO:		Electrons
11:31:13:ST3_smx:INFO:	# loops 0
11:31:15:ST3_smx:INFO:	# loops 1
11:31:17:ST3_smx:INFO:	# loops 2
11:31:18:ST3_smx:INFO:	Total # of broken channels: 0
11:31:18:ST3_smx:INFO:	List of broken channels: []
11:31:18:ST3_smx:INFO:	Total # of broken channels: 0
11:31:18:ST3_smx:INFO:	List of broken channels: []
11:31:20:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1206.851500 mV
11:31:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:20:ST3_smx:INFO:		Electrons
11:31:20:ST3_smx:INFO:	# loops 0
11:31:22:ST3_smx:INFO:	# loops 1
11:31:23:ST3_smx:INFO:	# loops 2
11:31:25:ST3_smx:INFO:	Total # of broken channels: 0
11:31:25:ST3_smx:INFO:	List of broken channels: []
11:31:25:ST3_smx:INFO:	Total # of broken channels: 56
11:31:25:ST3_smx:INFO:	List of broken channels: [6, 8, 14, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122]
11:31:27:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1200.969315 mV
11:31:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:27:ST3_smx:INFO:		Electrons
11:31:27:ST3_smx:INFO:	# loops 0
11:31:28:ST3_smx:INFO:	# loops 1
11:31:30:ST3_smx:INFO:	# loops 2
11:31:32:ST3_smx:INFO:	Total # of broken channels: 0
11:31:32:ST3_smx:INFO:	List of broken channels: []
11:31:32:ST3_smx:INFO:	Total # of broken channels: 0
11:31:32:ST3_smx:INFO:	List of broken channels: []
11:31:33:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1212.728715 mV
11:31:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:33:ST3_smx:INFO:		Electrons
11:31:33:ST3_smx:INFO:	# loops 0
11:31:35:ST3_smx:INFO:	# loops 1
11:31:37:ST3_smx:INFO:	# loops 2
11:31:38:ST3_smx:INFO:	Total # of broken channels: 0
11:31:38:ST3_smx:INFO:	List of broken channels: []
11:31:38:ST3_smx:INFO:	Total # of broken channels: 4
11:31:38:ST3_smx:INFO:	List of broken channels: [15, 19, 116, 120]
11:31:40:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1177.390875 mV
11:31:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:31:40:ST3_smx:INFO:		Electrons
11:31:40:ST3_smx:INFO:	# loops 0
11:31:42:ST3_smx:INFO:	# loops 1
11:31:43:ST3_smx:INFO:	# loops 2
11:31:45:ST3_smx:INFO:	Total # of broken channels: 0
11:31:45:ST3_smx:INFO:	List of broken channels: []
11:31:45:ST3_smx:INFO:	Total # of broken channels: 0
11:31:45:ST3_smx:INFO:	List of broken channels: []
11:31:45:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:31:45:febtest:INFO:	01-00 | XA-000-09-004-003-015-015-01 |  31.4 | 1201.0
11:31:46:febtest:INFO:	08-01 | XA-000-09-004-003-012-017-08 |  37.7 | 1183.3
11:31:46:febtest:INFO:	03-02 | XA-000-09-004-003-009-006-04 |  37.7 | 1177.4
11:31:46:febtest:INFO:	10-03 | XA-000-08-002-003-007-155-10 |  31.4 | 1195.1
11:31:46:febtest:INFO:	05-04 | XA-000-09-004-003-010-003-10 |  25.1 | 1236.2
11:31:46:febtest:INFO:	12-05 | XA-000-09-004-003-014-016-11 |  25.1 | 1224.5
11:31:47:febtest:INFO:	07-06 | XA-000-09-004-003-010-007-10 |  25.1 | 1230.3
11:31:47:febtest:INFO:	14-07 | XA-000-09-004-003-014-015-12 |  31.4 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_17-11_30_22
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1245| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9290', '1.849', '2.4690', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0190', '1.850', '2.2900', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9760', '1.850', '0.5255', '0.000', '0.0000', '0.000', '0.0000']