
FEB_1246 10.09.24 14:07:02
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14:07:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:07:02:ST3_Shared:INFO: FEB-Microcable 14:07:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:07:02:febtest:INFO: Testing FEB with SN 1246 14:07:04:smx_tester:INFO: Scanning setup 14:07:04:elinks:INFO: Disabling clock on downlink 0 14:07:04:elinks:INFO: Disabling clock on downlink 1 14:07:04:elinks:INFO: Disabling clock on downlink 2 14:07:04:elinks:INFO: Disabling clock on downlink 3 14:07:04:elinks:INFO: Disabling clock on downlink 4 14:07:04:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:07:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:07:04:elinks:INFO: Disabling clock on downlink 0 14:07:04:elinks:INFO: Disabling clock on downlink 1 14:07:04:elinks:INFO: Disabling clock on downlink 2 14:07:04:elinks:INFO: Disabling clock on downlink 3 14:07:04:elinks:INFO: Disabling clock on downlink 4 14:07:04:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 14:07:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 14:07:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:07:04:elinks:INFO: Disabling clock on downlink 0 14:07:04:elinks:INFO: Disabling clock on downlink 1 14:07:04:elinks:INFO: Disabling clock on downlink 2 14:07:04:elinks:INFO: Disabling clock on downlink 3 14:07:04:elinks:INFO: Disabling clock on downlink 4 14:07:04:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:07:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:07:04:elinks:INFO: Disabling clock on downlink 0 14:07:04:elinks:INFO: Disabling clock on downlink 1 14:07:04:elinks:INFO: Disabling clock on downlink 2 14:07:04:elinks:INFO: Disabling clock on downlink 3 14:07:04:elinks:INFO: Disabling clock on downlink 4 14:07:04:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:07:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:07:04:elinks:INFO: Disabling clock on downlink 0 14:07:04:elinks:INFO: Disabling clock on downlink 1 14:07:04:elinks:INFO: Disabling clock on downlink 2 14:07:04:elinks:INFO: Disabling clock on downlink 3 14:07:04:elinks:INFO: Disabling clock on downlink 4 14:07:04:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:07:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:07:04:setup_element:INFO: Scanning clock phase 14:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:07:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:07:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1 14:07:05:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:07:05:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:07:05:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:07:05:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:07:05:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:07:05:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:07:05:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 14:07:05:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 14:07:05:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 14:07:05:setup_element:INFO: Scanning data phases 14:07:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:07:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:07:10:setup_element:INFO: Data phase scan results for group 0, downlink 1 14:07:10:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXX______ Data delay found: 11 14:07:10:setup_element:INFO: Eye window for uplink 9 : X__________________________________XXXXX Data delay found: 17 14:07:10:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______ Data delay found: 10 14:07:10:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___ Data delay found: 14 14:07:10:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____ Data delay found: 13 14:07:10:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXXX Data delay found: 16 14:07:10:setup_element:INFO: Eye window for uplink 14: X__________________________________XXXXX Data delay found: 17 14:07:10:setup_element:INFO: Eye window for uplink 15: XXXX_________________________________XXX Data delay found: 20 14:07:10:setup_element:INFO: Setting the data phase to 11 for uplink 8 14:07:10:setup_element:INFO: Setting the data phase to 17 for uplink 9 14:07:10:setup_element:INFO: Setting the data phase to 10 for uplink 10 14:07:10:setup_element:INFO: Setting the data phase to 14 for uplink 11 14:07:10:setup_element:INFO: Setting the data phase to 13 for uplink 12 14:07:10:setup_element:INFO: Setting the data phase to 16 for uplink 13 14:07:10:setup_element:INFO: Setting the data phase to 17 for uplink 14 14:07:10:setup_element:INFO: Setting the data phase to 20 for uplink 15 14:07:10:setup_element:INFO: Beginning SMX ASICs map scan 14:07:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:07:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:07:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:07:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:07:10:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 14:07:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 14:07:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 14:07:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 14:07:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 14:07:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 14:07:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 14:07:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 14:07:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 14:07:13:setup_element:INFO: Performing Elink synchronization 14:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:07:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:07:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:07:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:07:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 14:07:13:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 14:07:13:ST3_emu_feb:DEBUG: Chip address: 0x1 14:07:13:ST3_emu_feb:DEBUG: Chip address: 0x3 14:07:13:ST3_emu_feb:DEBUG: Chip address: 0x5 14:07:13:ST3_emu_feb:DEBUG: Chip address: 0x7 14:07:13:febtest:INFO: Init all SMX (CSA): 30 14:07:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:07:21:febtest:INFO: 08-01 | XA-000-09-004-003-016-014-09 | 28.2 | 1177.4 14:07:21:febtest:INFO: 10-03 | XA-000-09-004-003-013-012-02 | 37.7 | 1135.9 14:07:21:febtest:INFO: 12-05 | XA-000-09-004-003-014-013-12 | 18.7 | 1212.7 14:07:22:febtest:INFO: 14-07 | XA-000-09-004-003-017-014-04 | 25.1 | 1201.0 14:07:23:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 14:07:25:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV 14:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:25:ST3_smx:INFO: Electrons 14:07:25:ST3_smx:INFO: # loops 0 14:07:26:ST3_smx:INFO: # loops 1 14:07:28:ST3_smx:INFO: # loops 2 14:07:30:ST3_smx:INFO: Total # of broken channels: 0 14:07:30:ST3_smx:INFO: List of broken channels: [] 14:07:30:ST3_smx:INFO: Total # of broken channels: 0 14:07:30:ST3_smx:INFO: List of broken channels: [] 14:07:31:ST3_smx:INFO: chip: 10-3 37.726682 C 1147.806000 mV 14:07:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:31:ST3_smx:INFO: Electrons 14:07:31:ST3_smx:INFO: # loops 0 14:07:33:ST3_smx:INFO: # loops 1 14:07:35:ST3_smx:INFO: # loops 2 14:07:36:ST3_smx:INFO: Total # of broken channels: 0 14:07:36:ST3_smx:INFO: List of broken channels: [] 14:07:36:ST3_smx:INFO: Total # of broken channels: 0 14:07:36:ST3_smx:INFO: List of broken channels: [] 14:07:38:ST3_smx:INFO: chip: 12-5 18.745682 C 1224.468235 mV 14:07:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:38:ST3_smx:INFO: Electrons 14:07:38:ST3_smx:INFO: # loops 0 14:07:40:ST3_smx:INFO: # loops 1 14:07:41:ST3_smx:INFO: # loops 2 14:07:43:ST3_smx:INFO: Total # of broken channels: 0 14:07:43:ST3_smx:INFO: List of broken channels: [] 14:07:43:ST3_smx:INFO: Total # of broken channels: 0 14:07:43:ST3_smx:INFO: List of broken channels: [] 14:07:45:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV 14:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:07:45:ST3_smx:INFO: Electrons 14:07:45:ST3_smx:INFO: # loops 0 14:07:46:ST3_smx:INFO: # loops 1 14:07:48:ST3_smx:INFO: # loops 2 14:07:50:ST3_smx:INFO: Total # of broken channels: 0 14:07:50:ST3_smx:INFO: List of broken channels: [] 14:07:50:ST3_smx:INFO: Total # of broken channels: 0 14:07:50:ST3_smx:INFO: List of broken channels: [] 14:07:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:07:50:febtest:INFO: 08-01 | XA-000-09-004-003-016-014-09 | 28.2 | 1206.9 14:07:50:febtest:INFO: 10-03 | XA-000-09-004-003-013-012-02 | 40.9 | 1171.5 14:07:51:febtest:INFO: 12-05 | XA-000-09-004-003-014-013-12 | 18.7 | 1247.9 14:07:51:febtest:INFO: 14-07 | XA-000-09-004-003-017-014-04 | 28.2 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_09_10-14_07_02 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1246| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.449', '0.6703', '1.849', '1.4420', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0200', '1.850', '1.0130', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9877', '1.850', '0.2678', '0.000', '0.0000', '0.000', '0.0000']