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LDO/GSI
LDO/KIT

FEB_1246    13.09.24 08:24:37

Ladder: L8UL401022
Module: M8UL4B0010220A2
Sensor: 15422
link: XA-000-09-004-003-016-014-09
SMX_1
...SMX_1.root
link: XA-000-09-004-003-013-012-02
SMX_3
...SMX_3.root
link: XA-000-09-004-003-014-013-12
SMX_5
...SMX_5.root
link: XA-000-09-004-003-017-014-04
SMX_7
...SMX_7.root
link: XA-000-09-004-003-015-013-01
SMX_0
...SMX_0.root
link: XA-000-09-004-003-012-012-15
SMX_2
...SMX_2.root
link: XA-000-09-004-003-010-011-10
SMX_4
...SMX_4.root
link: XA-000-09-004-003-014-014-12
SMX_6
...SMX_6.root
link: XA-000-09-004-003-014-014-12
VddmCSAstatus.png
...VddmCSAstatus.root
TextEdit.txt 
            08:24:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:24:37:ST3_Shared:INFO:	                         FEB-Sensor                         
08:24:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:24:40:ST3_ModuleSelector:INFO:	M8UL4B0010220A2
08:24:40:ST3_ModuleSelector:INFO:	15422
08:24:40:febtest:INFO:	Testing FEB with SN 1246
08:24:42:smx_tester:INFO:	Scanning setup
08:24:42:elinks:INFO:	Disabling clock on downlink 0
08:24:42:elinks:INFO:	Disabling clock on downlink 1
08:24:42:elinks:INFO:	Disabling clock on downlink 2
08:24:42:elinks:INFO:	Disabling clock on downlink 3
08:24:42:elinks:INFO:	Disabling clock on downlink 4
08:24:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:24:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:24:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:24:42:elinks:INFO:	Disabling clock on downlink 0
08:24:42:elinks:INFO:	Disabling clock on downlink 1
08:24:42:elinks:INFO:	Disabling clock on downlink 2
08:24:42:elinks:INFO:	Disabling clock on downlink 3
08:24:42:elinks:INFO:	Disabling clock on downlink 4
08:24:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:24:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:24:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:24:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:24:42:elinks:INFO:	Disabling clock on downlink 0
08:24:42:elinks:INFO:	Disabling clock on downlink 1
08:24:42:elinks:INFO:	Disabling clock on downlink 2
08:24:42:elinks:INFO:	Disabling clock on downlink 3
08:24:42:elinks:INFO:	Disabling clock on downlink 4
08:24:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:24:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:24:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:24:43:elinks:INFO:	Disabling clock on downlink 0
08:24:43:elinks:INFO:	Disabling clock on downlink 1
08:24:43:elinks:INFO:	Disabling clock on downlink 2
08:24:43:elinks:INFO:	Disabling clock on downlink 3
08:24:43:elinks:INFO:	Disabling clock on downlink 4
08:24:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:24:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:24:43:elinks:INFO:	Disabling clock on downlink 0
08:24:43:elinks:INFO:	Disabling clock on downlink 1
08:24:43:elinks:INFO:	Disabling clock on downlink 2
08:24:43:elinks:INFO:	Disabling clock on downlink 3
08:24:43:elinks:INFO:	Disabling clock on downlink 4
08:24:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:24:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:24:43:setup_element:INFO:	Scanning clock phase
08:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:24:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:24:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:24:43:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:24:43:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:24:43:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:24:43:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:24:43:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:24:43:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:24:43:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:24:43:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:24:43:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:43:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:24:43:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:24:43:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
08:24:43:setup_element:INFO:	Scanning data phases
08:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:24:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:24:49:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:24:49:setup_element:INFO:	Eye window for uplink 0 : ___________XXXXXXX______________________
Data delay found: 34
08:24:49:setup_element:INFO:	Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
08:24:49:setup_element:INFO:	Eye window for uplink 2 : ____XXXXXXXX____________________________
Data delay found: 27
08:24:49:setup_element:INFO:	Eye window for uplink 3 : _XXXXXXXX_______________________________
Data delay found: 24
08:24:49:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXXX____________________________
Data delay found: 28
08:24:49:setup_element:INFO:	Eye window for uplink 5 : XXXXXXX_________________________________
Data delay found: 23
08:24:49:setup_element:INFO:	Eye window for uplink 6 : XXXXX_________________________________XX
Data delay found: 21
08:24:49:setup_element:INFO:	Eye window for uplink 7 : XX________________________________XXXXXX
Data delay found: 17
08:24:49:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
08:24:49:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
08:24:49:setup_element:INFO:	Eye window for uplink 10: ______________________XXXXXXXX__________
Data delay found: 5
08:24:49:setup_element:INFO:	Eye window for uplink 11: __________________________XXXXXXXX______
Data delay found: 9
08:24:49:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXXX______
Data delay found: 10
08:24:49:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
08:24:49:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXXXXXXX__
Data delay found: 13
08:24:49:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXXXXXXX
Data delay found: 14
08:24:49:setup_element:INFO:	Setting the data phase to 34 for uplink 0
08:24:49:setup_element:INFO:	Setting the data phase to 30 for uplink 1
08:24:49:setup_element:INFO:	Setting the data phase to 27 for uplink 2
08:24:49:setup_element:INFO:	Setting the data phase to 24 for uplink 3
08:24:49:setup_element:INFO:	Setting the data phase to 28 for uplink 4
08:24:49:setup_element:INFO:	Setting the data phase to 23 for uplink 5
08:24:49:setup_element:INFO:	Setting the data phase to 21 for uplink 6
08:24:49:setup_element:INFO:	Setting the data phase to 17 for uplink 7
08:24:49:setup_element:INFO:	Setting the data phase to 8 for uplink 8
08:24:49:setup_element:INFO:	Setting the data phase to 13 for uplink 9
08:24:49:setup_element:INFO:	Setting the data phase to 5 for uplink 10
08:24:49:setup_element:INFO:	Setting the data phase to 9 for uplink 11
08:24:49:setup_element:INFO:	Setting the data phase to 10 for uplink 12
08:24:49:setup_element:INFO:	Setting the data phase to 12 for uplink 13
08:24:49:setup_element:INFO:	Setting the data phase to 13 for uplink 14
08:24:49:setup_element:INFO:	Setting the data phase to 14 for uplink 15
08:24:49:setup_element:INFO:	Beginning SMX ASICs map scan
08:24:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:24:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:24:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:24:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:24:49:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:24:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:24:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:24:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:24:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:24:50:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:24:50:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:24:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:24:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:24:50:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:24:50:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:24:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:24:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:24:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:24:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:24:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:24:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:24:52:setup_element:INFO:	Performing Elink synchronization
08:24:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:24:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:24:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:24:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:24:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:24:52:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x0
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x1
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x2
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x3
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x4
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x5
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x6
08:24:53:ST3_emu_feb:DEBUG:	Chip address:  	0x7
08:24:53:febtest:INFO:	Init all SMX (CSA): 30
08:25:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:25:06:febtest:INFO:	01-00 | XA-000-09-004-003-015-013-01 |  21.9 | 1165.6
08:25:07:febtest:INFO:	08-01 | XA-000-09-004-003-016-014-09 |  21.9 | 1177.4
08:25:07:febtest:INFO:	03-02 | XA-000-09-004-003-012-012-15 |  28.2 | 1147.8
08:25:07:febtest:INFO:	10-03 | XA-000-09-004-003-013-012-02 |  34.6 | 1135.9
08:25:07:febtest:INFO:	05-04 | XA-000-09-004-003-010-011-10 |  28.2 | 1159.7
08:25:08:febtest:INFO:	12-05 | XA-000-09-004-003-014-013-12 |  12.4 | 1212.7
08:25:08:febtest:INFO:	07-06 | XA-000-09-004-003-014-014-12 |  15.6 | 1201.0
08:25:08:febtest:INFO:	14-07 | XA-000-09-004-003-017-014-04 |  18.7 | 1206.9
08:25:09:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:25:11:ST3_smx:INFO:	chip: 1-0 	 21.902970 C 	 1183.292940 mV
08:25:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:11:ST3_smx:INFO:		Electrons
08:25:11:ST3_smx:INFO:	# loops 0
08:25:13:ST3_smx:INFO:	# loops 1
08:25:14:ST3_smx:INFO:	# loops 2
08:25:16:ST3_smx:INFO:	# loops 3
08:25:17:ST3_smx:INFO:	# loops 4
08:25:19:ST3_smx:INFO:	Total # of broken channels: 0
08:25:19:ST3_smx:INFO:	List of broken channels: []
08:25:19:ST3_smx:INFO:	Total # of broken channels: 31
08:25:19:ST3_smx:INFO:	List of broken channels: [27, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 85, 89, 93, 97, 101, 103, 105, 107, 111, 117]
08:25:21:ST3_smx:INFO:	chip: 8-1 	 21.902970 C 	 1189.190035 mV
08:25:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:21:ST3_smx:INFO:		Electrons
08:25:21:ST3_smx:INFO:	# loops 0
08:25:22:ST3_smx:INFO:	# loops 1
08:25:24:ST3_smx:INFO:	# loops 2
08:25:26:ST3_smx:INFO:	# loops 3
08:25:27:ST3_smx:INFO:	# loops 4
08:25:29:ST3_smx:INFO:	Total # of broken channels: 0
08:25:29:ST3_smx:INFO:	List of broken channels: []
08:25:29:ST3_smx:INFO:	Total # of broken channels: 36
08:25:29:ST3_smx:INFO:	List of broken channels: [7, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 57, 59, 61, 70, 73, 75, 77, 79, 81, 83, 85, 89, 91]
08:25:30:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1159.654860 mV
08:25:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:30:ST3_smx:INFO:		Electrons
08:25:30:ST3_smx:INFO:	# loops 0
08:25:32:ST3_smx:INFO:	# loops 1
08:25:34:ST3_smx:INFO:	# loops 2
08:25:35:ST3_smx:INFO:	# loops 3
08:25:37:ST3_smx:INFO:	# loops 4
08:25:38:ST3_smx:INFO:	Total # of broken channels: 0
08:25:38:ST3_smx:INFO:	List of broken channels: []
08:25:38:ST3_smx:INFO:	Total # of broken channels: 42
08:25:38:ST3_smx:INFO:	List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 89, 93, 115]
08:25:40:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1147.806000 mV
08:25:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:40:ST3_smx:INFO:		Electrons
08:25:40:ST3_smx:INFO:	# loops 0
08:25:42:ST3_smx:INFO:	# loops 1
08:25:43:ST3_smx:INFO:	# loops 2
08:25:45:ST3_smx:INFO:	# loops 3
08:25:46:ST3_smx:INFO:	# loops 4
08:25:48:ST3_smx:INFO:	Total # of broken channels: 0
08:25:48:ST3_smx:INFO:	List of broken channels: []
08:25:48:ST3_smx:INFO:	Total # of broken channels: 47
08:25:48:ST3_smx:INFO:	List of broken channels: [9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 48, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 97, 99, 101]
08:25:50:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1171.483840 mV
08:25:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:50:ST3_smx:INFO:		Electrons
08:25:50:ST3_smx:INFO:	# loops 0
08:25:51:ST3_smx:INFO:	# loops 1
08:25:53:ST3_smx:INFO:	# loops 2
08:25:54:ST3_smx:INFO:	# loops 3
08:25:56:ST3_smx:INFO:	# loops 4
08:25:57:ST3_smx:INFO:	Total # of broken channels: 0
08:25:57:ST3_smx:INFO:	List of broken channels: []
08:25:57:ST3_smx:INFO:	Total # of broken channels: 49
08:25:57:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97]
08:25:59:ST3_smx:INFO:	chip: 12-5 	 12.438562 C 	 1224.468235 mV
08:25:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:25:59:ST3_smx:INFO:		Electrons
08:25:59:ST3_smx:INFO:	# loops 0
08:26:01:ST3_smx:INFO:	# loops 1
08:26:02:ST3_smx:INFO:	# loops 2
08:26:04:ST3_smx:INFO:	# loops 3
08:26:05:ST3_smx:INFO:	# loops 4
08:26:07:ST3_smx:INFO:	Total # of broken channels: 0
08:26:07:ST3_smx:INFO:	List of broken channels: []
08:26:07:ST3_smx:INFO:	Total # of broken channels: 51
08:26:07:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 107, 111]
08:26:09:ST3_smx:INFO:	chip: 7-6 	 15.590880 C 	 1212.728715 mV
08:26:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:26:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:26:09:ST3_smx:INFO:		Electrons
08:26:09:ST3_smx:INFO:	# loops 0
08:26:10:ST3_smx:INFO:	# loops 1
08:26:12:ST3_smx:INFO:	# loops 2
08:26:13:ST3_smx:INFO:	# loops 3
08:26:15:ST3_smx:INFO:	# loops 4
08:26:16:ST3_smx:INFO:	Total # of broken channels: 0
08:26:16:ST3_smx:INFO:	List of broken channels: []
08:26:16:ST3_smx:INFO:	Total # of broken channels: 40
08:26:16:ST3_smx:INFO:	List of broken channels: [13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 75, 77, 79, 81, 83, 85, 89, 91, 93, 95]
08:26:18:ST3_smx:INFO:	chip: 14-7 	 18.745682 C 	 1218.600960 mV
08:26:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:26:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:26:18:ST3_smx:INFO:		Electrons
08:26:18:ST3_smx:INFO:	# loops 0
08:26:19:ST3_smx:INFO:	# loops 1
08:26:21:ST3_smx:INFO:	# loops 2
08:26:22:ST3_smx:INFO:	# loops 3
08:26:24:ST3_smx:INFO:	# loops 4
08:26:25:ST3_smx:INFO:	Total # of broken channels: 1
08:26:25:ST3_smx:INFO:	List of broken channels: [58]
08:26:25:ST3_smx:INFO:	Total # of broken channels: 20
08:26:25:ST3_smx:INFO:	List of broken channels: [5, 58, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
08:26:26:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:26:26:febtest:INFO:	01-00 | XA-000-09-004-003-015-013-01 |  21.9 | 1206.9
08:26:26:febtest:INFO:	08-01 | XA-000-09-004-003-016-014-09 |  25.1 | 1206.9
08:26:26:febtest:INFO:	03-02 | XA-000-09-004-003-012-012-15 |  31.4 | 1177.4
08:26:27:febtest:INFO:	10-03 | XA-000-09-004-003-013-012-02 |  34.6 | 1165.6
08:26:27:febtest:INFO:	05-04 | XA-000-09-004-003-010-011-10 |  28.2 | 1195.1
08:26:27:febtest:INFO:	12-05 | XA-000-09-004-003-014-013-12 |  15.6 | 1247.9
08:26:27:febtest:INFO:	07-06 | XA-000-09-004-003-014-014-12 |  18.7 | 1230.3
08:26:27:febtest:INFO:	14-07 | XA-000-09-004-003-017-014-04 |  21.9 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_13-08_24_37
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1246| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 15422 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL4B0010220A2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4280', '1.849', '2.5780', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0090', '1.850', '2.5020', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5268', '0.000', '0.0000', '0.000', '0.0000']
Comment.txt