Go Back
FEB_1252 19.09.24 08:32:46
TextEdit.txt
08:32:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:46:ST3_Shared:INFO: FEB-Sensor
08:32:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:33:03:ST3_ModuleSelector:INFO: M8UL0T0010600B2
08:33:03:ST3_ModuleSelector:INFO: 13422
08:33:03:febtest:INFO: Testing FEB with SN 1252
08:33:05:smx_tester:INFO: Scanning setup
08:33:05:elinks:INFO: Disabling clock on downlink 0
08:33:05:elinks:INFO: Disabling clock on downlink 1
08:33:05:elinks:INFO: Disabling clock on downlink 2
08:33:05:elinks:INFO: Disabling clock on downlink 3
08:33:05:elinks:INFO: Disabling clock on downlink 4
08:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:33:05:elinks:INFO: Disabling clock on downlink 0
08:33:05:elinks:INFO: Disabling clock on downlink 1
08:33:05:elinks:INFO: Disabling clock on downlink 2
08:33:05:elinks:INFO: Disabling clock on downlink 3
08:33:05:elinks:INFO: Disabling clock on downlink 4
08:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:33:05:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:33:05:elinks:INFO: Disabling clock on downlink 0
08:33:05:elinks:INFO: Disabling clock on downlink 1
08:33:05:elinks:INFO: Disabling clock on downlink 2
08:33:05:elinks:INFO: Disabling clock on downlink 3
08:33:05:elinks:INFO: Disabling clock on downlink 4
08:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:33:05:elinks:INFO: Disabling clock on downlink 0
08:33:05:elinks:INFO: Disabling clock on downlink 1
08:33:05:elinks:INFO: Disabling clock on downlink 2
08:33:05:elinks:INFO: Disabling clock on downlink 3
08:33:05:elinks:INFO: Disabling clock on downlink 4
08:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:33:06:elinks:INFO: Disabling clock on downlink 0
08:33:06:elinks:INFO: Disabling clock on downlink 1
08:33:06:elinks:INFO: Disabling clock on downlink 2
08:33:06:elinks:INFO: Disabling clock on downlink 3
08:33:06:elinks:INFO: Disabling clock on downlink 4
08:33:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:33:06:setup_element:INFO: Scanning clock phase
08:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:33:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:33:06:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:33:06:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:33:06:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
08:33:06:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
08:33:06:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:33:06:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:33:06:setup_element:INFO: Scanning data phases
08:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:33:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:33:12:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:33:12:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________
Data delay found: 33
08:33:12:setup_element:INFO: Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
08:33:12:setup_element:INFO: Eye window for uplink 2 : _______XXXXXXXX_________________________
Data delay found: 30
08:33:12:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXXX____________________________
Data delay found: 27
08:33:12:setup_element:INFO: Eye window for uplink 4 : __XXXXXXX_______________________________
Data delay found: 25
08:33:12:setup_element:INFO: Eye window for uplink 5 : XXXXX_______________________________XXXX
Data delay found: 20
08:33:12:setup_element:INFO: Eye window for uplink 6 : XXXXX_________________________________XX
Data delay found: 21
08:33:12:setup_element:INFO: Eye window for uplink 7 : XX________________________________XXXXXX
Data delay found: 17
08:33:12:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
08:33:12:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXXX__
Data delay found: 14
08:33:12:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXXX______
Data delay found: 9
08:33:12:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
08:33:12:setup_element:INFO: Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
08:33:12:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXXXXX____
Data delay found: 11
08:33:12:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXXXX_______
Data delay found: 8
08:33:12:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXXXX______
Data delay found: 10
08:33:12:setup_element:INFO: Setting the data phase to 33 for uplink 0
08:33:12:setup_element:INFO: Setting the data phase to 29 for uplink 1
08:33:12:setup_element:INFO: Setting the data phase to 30 for uplink 2
08:33:12:setup_element:INFO: Setting the data phase to 27 for uplink 3
08:33:12:setup_element:INFO: Setting the data phase to 25 for uplink 4
08:33:12:setup_element:INFO: Setting the data phase to 20 for uplink 5
08:33:12:setup_element:INFO: Setting the data phase to 21 for uplink 6
08:33:12:setup_element:INFO: Setting the data phase to 17 for uplink 7
08:33:12:setup_element:INFO: Setting the data phase to 9 for uplink 8
08:33:12:setup_element:INFO: Setting the data phase to 14 for uplink 9
08:33:12:setup_element:INFO: Setting the data phase to 9 for uplink 10
08:33:12:setup_element:INFO: Setting the data phase to 13 for uplink 11
08:33:12:setup_element:INFO: Setting the data phase to 8 for uplink 12
08:33:12:setup_element:INFO: Setting the data phase to 11 for uplink 13
08:33:12:setup_element:INFO: Setting the data phase to 8 for uplink 14
08:33:12:setup_element:INFO: Setting the data phase to 10 for uplink 15
08:33:12:setup_element:INFO: Beginning SMX ASICs map scan
08:33:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:33:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:33:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:33:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:33:12:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:33:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:33:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:33:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:33:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:33:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:33:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:33:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:33:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:33:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:33:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:33:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:33:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:33:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:33:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:33:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:33:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:33:14:setup_element:INFO: Performing Elink synchronization
08:33:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:33:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:33:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:33:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:33:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:33:15:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x0
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x1
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x2
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x3
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x4
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x5
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x6
08:33:15:ST3_emu_feb:DEBUG: Chip address: 0x7
08:33:15:febtest:INFO: Init all SMX (CSA): 30
08:33:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:30:febtest:INFO: 01-00 | XA-000-09-004-003-012-013-15 | 25.1 | 1159.7
08:33:30:febtest:INFO: 08-01 | XA-000-09-004-003-018-013-10 | 12.4 | 1218.6
08:33:30:febtest:INFO: 03-02 | XA-000-09-004-003-015-014-01 | 18.7 | 1171.5
08:33:31:febtest:INFO: 10-03 | XA-000-09-004-003-016-013-09 | 21.9 | 1183.3
08:33:31:febtest:INFO: 05-04 | XA-000-09-004-003-014-012-12 | 15.6 | 1201.0
08:33:31:febtest:INFO: 12-05 | XA-000-09-004-003-011-012-07 | 34.6 | 1141.9
08:33:31:febtest:INFO: 07-06 | XA-000-09-004-003-011-014-07 | 28.2 | 1159.7
08:33:31:febtest:INFO: 14-07 | XA-000-09-004-003-015-012-01 | 12.4 | 1230.3
08:33:32:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:33:34:ST3_smx:INFO: chip: 1-0 25.062742 C 1171.483840 mV
08:33:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:35:ST3_smx:INFO: Electrons
08:33:35:ST3_smx:INFO: # loops 0
08:33:36:ST3_smx:INFO: # loops 1
08:33:38:ST3_smx:INFO: # loops 2
08:33:39:ST3_smx:INFO: # loops 3
08:33:41:ST3_smx:INFO: # loops 4
08:33:43:ST3_smx:INFO: Total # of broken channels: 0
08:33:43:ST3_smx:INFO: List of broken channels: []
08:33:43:ST3_smx:INFO: Total # of broken channels: 3
08:33:43:ST3_smx:INFO: List of broken channels: [35, 89, 109]
08:33:44:ST3_smx:INFO: chip: 8-1 9.288730 C 1230.330540 mV
08:33:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:44:ST3_smx:INFO: Electrons
08:33:44:ST3_smx:INFO: # loops 0
08:33:46:ST3_smx:INFO: # loops 1
08:33:48:ST3_smx:INFO: # loops 2
08:33:49:ST3_smx:INFO: # loops 3
08:33:51:ST3_smx:INFO: # loops 4
08:33:53:ST3_smx:INFO: Total # of broken channels: 0
08:33:53:ST3_smx:INFO: List of broken channels: []
08:33:53:ST3_smx:INFO: Total # of broken channels: 0
08:33:53:ST3_smx:INFO: List of broken channels: []
08:33:54:ST3_smx:INFO: chip: 3-2 21.902970 C 1183.292940 mV
08:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:54:ST3_smx:INFO: Electrons
08:33:55:ST3_smx:INFO: # loops 0
08:33:56:ST3_smx:INFO: # loops 1
08:33:58:ST3_smx:INFO: # loops 2
08:33:59:ST3_smx:INFO: # loops 3
08:34:01:ST3_smx:INFO: # loops 4
08:34:03:ST3_smx:INFO: Total # of broken channels: 0
08:34:03:ST3_smx:INFO: List of broken channels: []
08:34:03:ST3_smx:INFO: Total # of broken channels: 1
08:34:03:ST3_smx:INFO: List of broken channels: [1]
08:34:04:ST3_smx:INFO: chip: 10-3 21.902970 C 1195.082160 mV
08:34:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:04:ST3_smx:INFO: Electrons
08:34:04:ST3_smx:INFO: # loops 0
08:34:06:ST3_smx:INFO: # loops 1
08:34:08:ST3_smx:INFO: # loops 2
08:34:09:ST3_smx:INFO: # loops 3
08:34:11:ST3_smx:INFO: # loops 4
08:34:13:ST3_smx:INFO: Total # of broken channels: 0
08:34:13:ST3_smx:INFO: List of broken channels: []
08:34:13:ST3_smx:INFO: Total # of broken channels: 0
08:34:13:ST3_smx:INFO: List of broken channels: []
08:34:14:ST3_smx:INFO: chip: 5-4 15.590880 C 1212.728715 mV
08:34:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:14:ST3_smx:INFO: Electrons
08:34:14:ST3_smx:INFO: # loops 0
08:34:16:ST3_smx:INFO: # loops 1
08:34:18:ST3_smx:INFO: # loops 2
08:34:19:ST3_smx:INFO: # loops 3
08:34:21:ST3_smx:INFO: # loops 4
08:34:23:ST3_smx:INFO: Total # of broken channels: 0
08:34:23:ST3_smx:INFO: List of broken channels: []
08:34:23:ST3_smx:INFO: Total # of broken channels: 0
08:34:23:ST3_smx:INFO: List of broken channels: []
08:34:24:ST3_smx:INFO: chip: 12-5 34.556970 C 1153.732915 mV
08:34:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:24:ST3_smx:INFO: Electrons
08:34:24:ST3_smx:INFO: # loops 0
08:34:26:ST3_smx:INFO: # loops 1
08:34:28:ST3_smx:INFO: # loops 2
08:34:29:ST3_smx:INFO: # loops 3
08:34:31:ST3_smx:INFO: # loops 4
08:34:32:ST3_smx:INFO: Total # of broken channels: 0
08:34:32:ST3_smx:INFO: List of broken channels: []
08:34:32:ST3_smx:INFO: Total # of broken channels: 0
08:34:32:ST3_smx:INFO: List of broken channels: []
08:34:34:ST3_smx:INFO: chip: 7-6 31.389742 C 1171.483840 mV
08:34:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:34:ST3_smx:INFO: Electrons
08:34:34:ST3_smx:INFO: # loops 0
08:34:36:ST3_smx:INFO: # loops 1
08:34:37:ST3_smx:INFO: # loops 2
08:34:39:ST3_smx:INFO: # loops 3
08:34:41:ST3_smx:INFO: # loops 4
08:34:42:ST3_smx:INFO: Total # of broken channels: 0
08:34:42:ST3_smx:INFO: List of broken channels: []
08:34:42:ST3_smx:INFO: Total # of broken channels: 0
08:34:42:ST3_smx:INFO: List of broken channels: []
08:34:44:ST3_smx:INFO: chip: 14-7 15.590880 C 1242.040240 mV
08:34:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:34:44:ST3_smx:INFO: Electrons
08:34:44:ST3_smx:INFO: # loops 0
08:34:46:ST3_smx:INFO: # loops 1
08:34:47:ST3_smx:INFO: # loops 2
08:34:49:ST3_smx:INFO: # loops 3
08:34:50:ST3_smx:INFO: # loops 4
08:34:52:ST3_smx:INFO: Total # of broken channels: 1
08:34:52:ST3_smx:INFO: List of broken channels: [1]
08:34:52:ST3_smx:INFO: Total # of broken channels: 3
08:34:52:ST3_smx:INFO: List of broken channels: [1, 3, 35]
08:34:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:34:53:febtest:INFO: 01-00 | XA-000-09-004-003-012-013-15 | 28.2 | 1189.2
08:34:53:febtest:INFO: 08-01 | XA-000-09-004-003-018-013-10 | 12.4 | 1253.7
08:34:53:febtest:INFO: 03-02 | XA-000-09-004-003-015-014-01 | 21.9 | 1206.9
08:34:53:febtest:INFO: 10-03 | XA-000-09-004-003-016-013-09 | 21.9 | 1218.6
08:34:54:febtest:INFO: 05-04 | XA-000-09-004-003-014-012-12 | 18.7 | 1236.2
08:34:54:febtest:INFO: 12-05 | XA-000-09-004-003-011-012-07 | 37.7 | 1171.5
08:34:54:febtest:INFO: 07-06 | XA-000-09-004-003-011-014-07 | 31.4 | 1189.2
08:34:54:febtest:INFO: 14-07 | XA-000-09-004-003-015-012-01 | 15.6 | 1265.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_19-08_32_46
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1252| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 13422 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL0T0010600B2
LADDER_NAME: L8UL001060
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5330', '1.849', '2.3410', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9860', '1.850', '2.4370', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9450', '1.850', '0.5211', '0.000', '0.0000', '0.000', '0.0000']