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FEB_1252 11.09.24 13:24:40
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13:24:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:24:40:ST3_Shared:INFO: FEB-Microcable
13:24:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:24:40:febtest:INFO: Testing FEB with SN 1252
13:24:41:smx_tester:INFO: Scanning setup
13:24:41:elinks:INFO: Disabling clock on downlink 0
13:24:41:elinks:INFO: Disabling clock on downlink 1
13:24:41:elinks:INFO: Disabling clock on downlink 2
13:24:41:elinks:INFO: Disabling clock on downlink 3
13:24:41:elinks:INFO: Disabling clock on downlink 4
13:24:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:24:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:24:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:24:41:elinks:INFO: Disabling clock on downlink 0
13:24:41:elinks:INFO: Disabling clock on downlink 1
13:24:41:elinks:INFO: Disabling clock on downlink 2
13:24:41:elinks:INFO: Disabling clock on downlink 3
13:24:41:elinks:INFO: Disabling clock on downlink 4
13:24:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:24:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:24:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:24:42:elinks:INFO: Disabling clock on downlink 0
13:24:42:elinks:INFO: Disabling clock on downlink 1
13:24:42:elinks:INFO: Disabling clock on downlink 2
13:24:42:elinks:INFO: Disabling clock on downlink 3
13:24:42:elinks:INFO: Disabling clock on downlink 4
13:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:24:42:elinks:INFO: Disabling clock on downlink 0
13:24:42:elinks:INFO: Disabling clock on downlink 1
13:24:42:elinks:INFO: Disabling clock on downlink 2
13:24:42:elinks:INFO: Disabling clock on downlink 3
13:24:42:elinks:INFO: Disabling clock on downlink 4
13:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:24:42:elinks:INFO: Disabling clock on downlink 0
13:24:42:elinks:INFO: Disabling clock on downlink 1
13:24:42:elinks:INFO: Disabling clock on downlink 2
13:24:42:elinks:INFO: Disabling clock on downlink 3
13:24:42:elinks:INFO: Disabling clock on downlink 4
13:24:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:24:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:24:42:setup_element:INFO: Scanning clock phase
13:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:24:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:24:42:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:24:42:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:24:42:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:24:42:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:24:42:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:24:42:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:24:42:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:24:42:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
13:24:42:setup_element:INFO: Scanning data phases
13:24:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:24:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:24:48:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:24:48:setup_element:INFO: Eye window for uplink 0 : __________XXXXXXX_______________________
Data delay found: 33
13:24:48:setup_element:INFO: Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
13:24:48:setup_element:INFO: Eye window for uplink 2 : _______XXXXXXXX_________________________
Data delay found: 30
13:24:48:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXXX____________________________
Data delay found: 27
13:24:48:setup_element:INFO: Eye window for uplink 4 : _XXXXXXXX_______________________________
Data delay found: 24
13:24:48:setup_element:INFO: Eye window for uplink 5 : XXXX________________________________XXXX
Data delay found: 19
13:24:48:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
13:24:48:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX
Data delay found: 17
13:24:48:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXX________
Data delay found: 9
13:24:48:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXXX__
Data delay found: 14
13:24:48:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
13:24:48:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXXX___
Data delay found: 13
13:24:48:setup_element:INFO: Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
13:24:48:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXXXX_____
Data delay found: 10
13:24:48:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXXXX_______
Data delay found: 8
13:24:48:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXXX_____
Data delay found: 10
13:24:48:setup_element:INFO: Setting the data phase to 33 for uplink 0
13:24:48:setup_element:INFO: Setting the data phase to 29 for uplink 1
13:24:48:setup_element:INFO: Setting the data phase to 30 for uplink 2
13:24:48:setup_element:INFO: Setting the data phase to 27 for uplink 3
13:24:48:setup_element:INFO: Setting the data phase to 24 for uplink 4
13:24:48:setup_element:INFO: Setting the data phase to 19 for uplink 5
13:24:48:setup_element:INFO: Setting the data phase to 20 for uplink 6
13:24:48:setup_element:INFO: Setting the data phase to 17 for uplink 7
13:24:48:setup_element:INFO: Setting the data phase to 9 for uplink 8
13:24:48:setup_element:INFO: Setting the data phase to 14 for uplink 9
13:24:48:setup_element:INFO: Setting the data phase to 9 for uplink 10
13:24:48:setup_element:INFO: Setting the data phase to 13 for uplink 11
13:24:48:setup_element:INFO: Setting the data phase to 8 for uplink 12
13:24:48:setup_element:INFO: Setting the data phase to 10 for uplink 13
13:24:48:setup_element:INFO: Setting the data phase to 8 for uplink 14
13:24:48:setup_element:INFO: Setting the data phase to 10 for uplink 15
13:24:48:setup_element:INFO: Beginning SMX ASICs map scan
13:24:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:24:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:24:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:24:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:24:48:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:24:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:24:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:24:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:24:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:24:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:24:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:24:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:24:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:24:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:24:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:24:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:24:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:24:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:24:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:24:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:24:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:24:51:setup_element:INFO: Performing Elink synchronization
13:24:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:24:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:24:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:24:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:24:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:24:51:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x0
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x1
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x2
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x3
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x4
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x5
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x6
13:24:51:ST3_emu_feb:DEBUG: Chip address: 0x7
13:24:51:febtest:INFO: Init all SMX (CSA): 30
13:25:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:25:06:febtest:INFO: 01-00 | XA-000-09-004-003-012-013-15 | 34.6 | 1153.7
13:25:06:febtest:INFO: 08-01 | XA-000-09-004-003-018-013-10 | 18.7 | 1218.6
13:25:07:febtest:INFO: 03-02 | XA-000-09-004-003-015-014-01 | 28.2 | 1165.6
13:25:07:febtest:INFO: 10-03 | XA-000-09-004-003-016-013-09 | 28.2 | 1177.4
13:25:07:febtest:INFO: 05-04 | XA-000-09-004-003-014-012-12 | 21.9 | 1206.9
13:25:07:febtest:INFO: 12-05 | XA-000-09-004-003-011-012-07 | 40.9 | 1135.9
13:25:08:febtest:INFO: 07-06 | XA-000-09-004-003-011-014-07 | 37.7 | 1159.7
13:25:08:febtest:INFO: 14-07 | XA-000-09-004-003-015-012-01 | 18.7 | 1230.3
13:25:09:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:25:11:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV
13:25:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:11:ST3_smx:INFO: Electrons
13:25:11:ST3_smx:INFO: # loops 0
13:25:13:ST3_smx:INFO: # loops 1
13:25:14:ST3_smx:INFO: # loops 2
13:25:16:ST3_smx:INFO: Total # of broken channels: 0
13:25:16:ST3_smx:INFO: List of broken channels: []
13:25:16:ST3_smx:INFO: Total # of broken channels: 0
13:25:16:ST3_smx:INFO: List of broken channels: []
13:25:17:ST3_smx:INFO: chip: 8-1 15.590880 C 1230.330540 mV
13:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:17:ST3_smx:INFO: Electrons
13:25:18:ST3_smx:INFO: # loops 0
13:25:19:ST3_smx:INFO: # loops 1
13:25:21:ST3_smx:INFO: # loops 2
13:25:22:ST3_smx:INFO: Total # of broken channels: 0
13:25:22:ST3_smx:INFO: List of broken channels: []
13:25:22:ST3_smx:INFO: Total # of broken channels: 0
13:25:22:ST3_smx:INFO: List of broken channels: []
13:25:24:ST3_smx:INFO: chip: 3-2 28.225000 C 1177.390875 mV
13:25:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:24:ST3_smx:INFO: Electrons
13:25:24:ST3_smx:INFO: # loops 0
13:25:26:ST3_smx:INFO: # loops 1
13:25:27:ST3_smx:INFO: # loops 2
13:25:29:ST3_smx:INFO: Total # of broken channels: 0
13:25:29:ST3_smx:INFO: List of broken channels: []
13:25:29:ST3_smx:INFO: Total # of broken channels: 28
13:25:29:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 54, 56]
13:25:31:ST3_smx:INFO: chip: 10-3 28.225000 C 1189.190035 mV
13:25:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:31:ST3_smx:INFO: Electrons
13:25:31:ST3_smx:INFO: # loops 0
13:25:32:ST3_smx:INFO: # loops 1
13:25:34:ST3_smx:INFO: # loops 2
13:25:36:ST3_smx:INFO: Total # of broken channels: 0
13:25:36:ST3_smx:INFO: List of broken channels: []
13:25:36:ST3_smx:INFO: Total # of broken channels: 51
13:25:36:ST3_smx:INFO: List of broken channels: [5, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109]
13:25:37:ST3_smx:INFO: chip: 5-4 21.902970 C 1212.728715 mV
13:25:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:37:ST3_smx:INFO: Electrons
13:25:37:ST3_smx:INFO: # loops 0
13:25:39:ST3_smx:INFO: # loops 1
13:25:41:ST3_smx:INFO: # loops 2
13:25:42:ST3_smx:INFO: Total # of broken channels: 0
13:25:42:ST3_smx:INFO: List of broken channels: []
13:25:42:ST3_smx:INFO: Total # of broken channels: 0
13:25:42:ST3_smx:INFO: List of broken channels: []
13:25:44:ST3_smx:INFO: chip: 12-5 40.898880 C 1147.806000 mV
13:25:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:44:ST3_smx:INFO: Electrons
13:25:44:ST3_smx:INFO: # loops 0
13:25:46:ST3_smx:INFO: # loops 1
13:25:47:ST3_smx:INFO: # loops 2
13:25:49:ST3_smx:INFO: Total # of broken channels: 0
13:25:49:ST3_smx:INFO: List of broken channels: []
13:25:49:ST3_smx:INFO: Total # of broken channels: 38
13:25:49:ST3_smx:INFO: List of broken channels: [51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
13:25:51:ST3_smx:INFO: chip: 7-6 37.726682 C 1171.483840 mV
13:25:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:51:ST3_smx:INFO: Electrons
13:25:51:ST3_smx:INFO: # loops 0
13:25:52:ST3_smx:INFO: # loops 1
13:25:54:ST3_smx:INFO: # loops 2
13:25:56:ST3_smx:INFO: Total # of broken channels: 0
13:25:56:ST3_smx:INFO: List of broken channels: []
13:25:56:ST3_smx:INFO: Total # of broken channels: 0
13:25:56:ST3_smx:INFO: List of broken channels: []
13:25:57:ST3_smx:INFO: chip: 14-7 18.745682 C 1242.040240 mV
13:25:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:25:57:ST3_smx:INFO: Electrons
13:25:57:ST3_smx:INFO: # loops 0
13:25:59:ST3_smx:INFO: # loops 1
13:26:01:ST3_smx:INFO: # loops 2
13:26:02:ST3_smx:INFO: Total # of broken channels: 0
13:26:02:ST3_smx:INFO: List of broken channels: []
13:26:02:ST3_smx:INFO: Total # of broken channels: 0
13:26:02:ST3_smx:INFO: List of broken channels: []
13:26:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:26:03:febtest:INFO: 01-00 | XA-000-09-004-003-012-013-15 | 34.6 | 1189.2
13:26:03:febtest:INFO: 08-01 | XA-000-09-004-003-018-013-10 | 18.7 | 1253.7
13:26:03:febtest:INFO: 03-02 | XA-000-09-004-003-015-014-01 | 31.4 | 1201.0
13:26:04:febtest:INFO: 10-03 | XA-000-09-004-003-016-013-09 | 28.2 | 1212.7
13:26:04:febtest:INFO: 05-04 | XA-000-09-004-003-014-012-12 | 25.1 | 1236.2
13:26:04:febtest:INFO: 12-05 | XA-000-09-004-003-011-012-07 | 40.9 | 1171.5
13:26:04:febtest:INFO: 07-06 | XA-000-09-004-003-011-014-07 | 37.7 | 1189.2
13:26:04:febtest:INFO: 14-07 | XA-000-09-004-003-015-012-01 | 18.7 | 1271.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_11-13_24_40
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1252| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5310', '1.849', '2.3320', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9930', '1.850', '2.4070', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9450', '1.850', '0.5219', '0.000', '0.0000', '0.000', '0.0000']