07:38:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:42:ST3_Shared:INFO:	                         FEB-Sensor                         
07:38:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:39:10:ST3_ModuleSelector:INFO:	New Sensor ID: 29064
07:39:17:ST3_ModuleSelector:INFO:	M3DR0T3000543B2
07:39:17:ST3_ModuleSelector:INFO:	29064
07:39:17:febtest:INFO:	Testing FEB with SN 1253
07:39:19:smx_tester:INFO:	Scanning setup
07:39:19:elinks:INFO:	Disabling clock on downlink 0
07:39:19:elinks:INFO:	Disabling clock on downlink 1
07:39:19:elinks:INFO:	Disabling clock on downlink 2
07:39:19:elinks:INFO:	Disabling clock on downlink 3
07:39:19:elinks:INFO:	Disabling clock on downlink 4
07:39:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:39:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:19:elinks:INFO:	Disabling clock on downlink 0
07:39:19:elinks:INFO:	Disabling clock on downlink 1
07:39:19:elinks:INFO:	Disabling clock on downlink 2
07:39:19:elinks:INFO:	Disabling clock on downlink 3
07:39:19:elinks:INFO:	Disabling clock on downlink 4
07:39:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:39:19:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:39:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:19:elinks:INFO:	Disabling clock on downlink 0
07:39:19:elinks:INFO:	Disabling clock on downlink 1
07:39:19:elinks:INFO:	Disabling clock on downlink 2
07:39:19:elinks:INFO:	Disabling clock on downlink 3
07:39:19:elinks:INFO:	Disabling clock on downlink 4
07:39:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:39:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:20:elinks:INFO:	Disabling clock on downlink 0
07:39:20:elinks:INFO:	Disabling clock on downlink 1
07:39:20:elinks:INFO:	Disabling clock on downlink 2
07:39:20:elinks:INFO:	Disabling clock on downlink 3
07:39:20:elinks:INFO:	Disabling clock on downlink 4
07:39:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:39:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:39:20:elinks:INFO:	Disabling clock on downlink 0
07:39:20:elinks:INFO:	Disabling clock on downlink 1
07:39:20:elinks:INFO:	Disabling clock on downlink 2
07:39:20:elinks:INFO:	Disabling clock on downlink 3
07:39:20:elinks:INFO:	Disabling clock on downlink 4
07:39:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:39:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:39:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:39:20:setup_element:INFO:	Scanning clock phase
07:39:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:20:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:39:20:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:39:20:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:39:20:setup_element:INFO:	Eye window for uplink 12: X______________________________________________________________________XXXXXXXXX
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 13: X______________________________________________________________________XXXXXXXXX
Clock Delay: 35
07:39:20:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:39:20:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
07:39:20:setup_element:INFO:	Scanning data phases
07:39:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:26:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:39:26:setup_element:INFO:	Eye window for uplink 0 : __________XXXXXXX_______________________
Data delay found: 33
07:39:26:setup_element:INFO:	Eye window for uplink 1 : ______XXXXXXX___________________________
Data delay found: 29
07:39:26:setup_element:INFO:	Eye window for uplink 2 : ____XXXXXXXX____________________________
Data delay found: 27
07:39:26:setup_element:INFO:	Eye window for uplink 3 : __XXXXXXXX______________________________
Data delay found: 25
07:39:26:setup_element:INFO:	Eye window for uplink 4 : _______XXXXXXX__________________________
Data delay found: 30
07:39:26:setup_element:INFO:	Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
07:39:26:setup_element:INFO:	Eye window for uplink 6 : XXXXX__________________________________X
Data delay found: 21
07:39:26:setup_element:INFO:	Eye window for uplink 7 : XX________________________________XXXXXX
Data delay found: 17
07:39:26:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXXXXX_______
Data delay found: 9
07:39:26:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXXX__
Data delay found: 14
07:39:26:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXXX_______
Data delay found: 9
07:39:26:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXXXX___
Data delay found: 12
07:39:26:setup_element:INFO:	Eye window for uplink 12: _____________________________XXXXXXX____
Data delay found: 12
07:39:26:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXXXXX
Data delay found: 15
07:39:26:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXXX_____
Data delay found: 11
07:39:26:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXXX__
Data delay found: 14
07:39:26:setup_element:INFO:	Setting the data phase to 33 for uplink 0
07:39:26:setup_element:INFO:	Setting the data phase to 29 for uplink 1
07:39:26:setup_element:INFO:	Setting the data phase to 27 for uplink 2
07:39:26:setup_element:INFO:	Setting the data phase to 25 for uplink 3
07:39:26:setup_element:INFO:	Setting the data phase to 30 for uplink 4
07:39:26:setup_element:INFO:	Setting the data phase to 26 for uplink 5
07:39:26:setup_element:INFO:	Setting the data phase to 21 for uplink 6
07:39:26:setup_element:INFO:	Setting the data phase to 17 for uplink 7
07:39:26:setup_element:INFO:	Setting the data phase to 9 for uplink 8
07:39:26:setup_element:INFO:	Setting the data phase to 14 for uplink 9
07:39:26:setup_element:INFO:	Setting the data phase to 9 for uplink 10
07:39:26:setup_element:INFO:	Setting the data phase to 12 for uplink 11
07:39:26:setup_element:INFO:	Setting the data phase to 12 for uplink 12
07:39:26:setup_element:INFO:	Setting the data phase to 15 for uplink 13
07:39:26:setup_element:INFO:	Setting the data phase to 11 for uplink 14
07:39:26:setup_element:INFO:	Setting the data phase to 14 for uplink 15
==============================================OOO==============================================
07:39:26:setup_element:INFO:	Beginning SMX ASICs map scan
07:39:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:39:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:39:26:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:39:26:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:39:26:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:39:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:39:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:39:26:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:39:26:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:39:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:39:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:39:27:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:39:27:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:39:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:39:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:39:27:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:39:27:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:39:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:39:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:39:29:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXX_
      Uplink  1: ________________________________________________________________________XXXXXXX_
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: _______________________________________________________________________XXXXXXXX_
      Uplink  7: _______________________________________________________________________XXXXXXXX_
      Uplink  8: _______________________________________________________________________XXXXXXXX_
      Uplink  9: _______________________________________________________________________XXXXXXXX_
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: X______________________________________________________________________XXXXXXXXX
      Uplink 13: X______________________________________________________________________XXXXXXXXX
      Uplink 14: _______________________________________________________________________XXXXXXXX_
      Uplink 15: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 33
      Window Length: 33
      Eye Window: __________XXXXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 2:
      Optimal Phase: 27
      Window Length: 32
      Eye Window: ____XXXXXXXX____________________________
    Uplink 3:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 4:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 5:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 32
      Eye Window: XX________________________________XXXXXX
    Uplink 8:
      Optimal Phase: 9
      Window Length: 33
      Eye Window: __________________________XXXXXXX_______
    Uplink 9:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__
    Uplink 10:
      Optimal Phase: 9
      Window Length: 33
      Eye Window: __________________________XXXXXXX_______
    Uplink 11:
      Optimal Phase: 12
      Window Length: 32
      Eye Window: _____________________________XXXXXXXX___
    Uplink 12:
      Optimal Phase: 12
      Window Length: 33
      Eye Window: _____________________________XXXXXXX____
    Uplink 13:
      Optimal Phase: 15
      Window Length: 32
      Eye Window: ________________________________XXXXXXXX
    Uplink 14:
      Optimal Phase: 11
      Window Length: 33
      Eye Window: ____________________________XXXXXXX_____
    Uplink 15:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__

==============================================OOO==============================================
07:39:29:setup_element:INFO:	Performing Elink synchronization
07:39:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:39:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:39:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
07:39:29:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:39:29:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:39:29:febtest:INFO:	Init all SMX (CSA): 30
07:39:44:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:39:44:febtest:INFO:	01-00 | XA-000-09-004-003-016-021-14 |   9.3 | 1236.2
07:39:44:febtest:INFO:	08-01 | XA-000-09-004-003-018-017-13 |  25.1 | 1183.3
07:39:44:febtest:INFO:	03-02 | XA-000-09-004-003-014-021-11 |  15.6 | 1224.5
07:39:45:febtest:INFO:	10-03 | XA-000-09-004-003-013-022-05 |  31.4 | 1159.7
07:39:45:febtest:INFO:	05-04 | XA-000-09-004-003-018-016-13 |  18.7 | 1201.0
07:39:45:febtest:INFO:	12-05 | XA-000-09-004-003-017-020-03 |  28.2 | 1171.5
07:39:45:febtest:INFO:	07-06 | XA-000-09-004-003-012-022-08 |  31.4 | 1171.5
07:39:45:febtest:INFO:	14-07 | XA-000-09-004-003-018-018-13 |  18.7 | 1201.0
07:39:46:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:39:48:ST3_smx:INFO:	chip: 1-0 	 9.288730 C 	 1247.887635 mV
07:39:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:48:ST3_smx:INFO:		Electrons
07:39:48:ST3_smx:INFO:	# loops 0
07:39:50:ST3_smx:INFO:	# loops 1
07:39:52:ST3_smx:INFO:	# loops 2
07:39:53:ST3_smx:INFO:	# loops 3
07:39:55:ST3_smx:INFO:	# loops 4
07:39:56:ST3_smx:INFO:	Total # of broken channels: 0
07:39:56:ST3_smx:INFO:	List of broken channels: []
07:39:56:ST3_smx:INFO:	Total # of broken channels: 1
07:39:56:ST3_smx:INFO:	List of broken channels: [0]
07:39:58:ST3_smx:INFO:	chip: 8-1 	 21.902970 C 	 1200.969315 mV
07:39:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:39:58:ST3_smx:INFO:		Electrons
07:39:58:ST3_smx:INFO:	# loops 0
07:40:00:ST3_smx:INFO:	# loops 1
07:40:01:ST3_smx:INFO:	# loops 2
07:40:03:ST3_smx:INFO:	# loops 3
07:40:05:ST3_smx:INFO:	# loops 4
07:40:06:ST3_smx:INFO:	Total # of broken channels: 0
07:40:06:ST3_smx:INFO:	List of broken channels: []
07:40:06:ST3_smx:INFO:	Total # of broken channels: 0
07:40:06:ST3_smx:INFO:	List of broken channels: []
07:40:08:ST3_smx:INFO:	chip: 3-2 	 15.590880 C 	 1236.187875 mV
07:40:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:08:ST3_smx:INFO:		Electrons
07:40:08:ST3_smx:INFO:	# loops 0
07:40:10:ST3_smx:INFO:	# loops 1
07:40:11:ST3_smx:INFO:	# loops 2
07:40:13:ST3_smx:INFO:	# loops 3
07:40:14:ST3_smx:INFO:	# loops 4
07:40:16:ST3_smx:INFO:	Total # of broken channels: 0
07:40:16:ST3_smx:INFO:	List of broken channels: []
07:40:16:ST3_smx:INFO:	Total # of broken channels: 0
07:40:16:ST3_smx:INFO:	List of broken channels: []
07:40:18:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1171.483840 mV
07:40:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:18:ST3_smx:INFO:		Electrons
07:40:18:ST3_smx:INFO:	# loops 0
07:40:19:ST3_smx:INFO:	# loops 1
07:40:21:ST3_smx:INFO:	# loops 2
07:40:22:ST3_smx:INFO:	# loops 3
07:40:24:ST3_smx:INFO:	# loops 4
07:40:26:ST3_smx:INFO:	Total # of broken channels: 0
07:40:26:ST3_smx:INFO:	List of broken channels: []
07:40:26:ST3_smx:INFO:	Total # of broken channels: 0
07:40:26:ST3_smx:INFO:	List of broken channels: []
07:40:27:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1212.728715 mV
07:40:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:27:ST3_smx:INFO:		Electrons
07:40:27:ST3_smx:INFO:	# loops 0
07:40:29:ST3_smx:INFO:	# loops 1
07:40:31:ST3_smx:INFO:	# loops 2
07:40:32:ST3_smx:INFO:	# loops 3
07:40:34:ST3_smx:INFO:	# loops 4
07:40:35:ST3_smx:INFO:	Total # of broken channels: 1
07:40:35:ST3_smx:INFO:	List of broken channels: [115]
07:40:35:ST3_smx:INFO:	Total # of broken channels: 2
07:40:35:ST3_smx:INFO:	List of broken channels: [115, 127]
07:40:37:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1177.390875 mV
07:40:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:37:ST3_smx:INFO:		Electrons
07:40:37:ST3_smx:INFO:	# loops 0
07:40:39:ST3_smx:INFO:	# loops 1
07:40:40:ST3_smx:INFO:	# loops 2
07:40:42:ST3_smx:INFO:	# loops 3
07:40:43:ST3_smx:INFO:	# loops 4
07:40:45:ST3_smx:INFO:	Total # of broken channels: 1
07:40:45:ST3_smx:INFO:	List of broken channels: [66]
07:40:45:ST3_smx:INFO:	Total # of broken channels: 1
07:40:45:ST3_smx:INFO:	List of broken channels: [66]
07:40:47:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1183.292940 mV
07:40:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:47:ST3_smx:INFO:		Electrons
07:40:47:ST3_smx:INFO:	# loops 0
07:40:48:ST3_smx:INFO:	# loops 1
07:40:50:ST3_smx:INFO:	# loops 2
07:40:52:ST3_smx:INFO:	# loops 3
07:40:53:ST3_smx:INFO:	# loops 4
07:40:55:ST3_smx:INFO:	Total # of broken channels: 0
07:40:55:ST3_smx:INFO:	List of broken channels: []
07:40:55:ST3_smx:INFO:	Total # of broken channels: 0
07:40:55:ST3_smx:INFO:	List of broken channels: []
07:40:57:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1212.728715 mV
07:40:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:40:57:ST3_smx:INFO:		Electrons
07:40:57:ST3_smx:INFO:	# loops 0
07:40:58:ST3_smx:INFO:	# loops 1
07:41:00:ST3_smx:INFO:	# loops 2
07:41:01:ST3_smx:INFO:	# loops 3
07:41:03:ST3_smx:INFO:	# loops 4
07:41:05:ST3_smx:INFO:	Total # of broken channels: 0
07:41:05:ST3_smx:INFO:	List of broken channels: []
07:41:05:ST3_smx:INFO:	Total # of broken channels: 0
07:41:05:ST3_smx:INFO:	List of broken channels: []
07:41:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:41:05:febtest:INFO:	01-00 | XA-000-09-004-003-016-021-14 |  12.4 | 1265.4
07:41:05:febtest:INFO:	08-01 | XA-000-09-004-003-018-017-13 |  25.1 | 1224.5
07:41:06:febtest:INFO:	03-02 | XA-000-09-004-003-014-021-11 |  15.6 | 1253.7
07:41:06:febtest:INFO:	10-03 | XA-000-09-004-003-013-022-05 |  34.6 | 1195.1
07:41:06:febtest:INFO:	05-04 | XA-000-09-004-003-018-016-13 |  21.9 | 1236.2
07:41:06:febtest:INFO:	12-05 | XA-000-09-004-003-017-020-03 |  31.4 | 1201.0
07:41:06:febtest:INFO:	07-06 | XA-000-09-004-003-012-022-08 |  34.6 | 1201.0
07:41:07:febtest:INFO:	14-07 | XA-000-09-004-003-018-018-13 |  25.1 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_18-07_38_42
OPERATOR  : Olga B.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1253| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 29064 | SIZE: 62x124 | GRADE: U
MODULE_NAME: M3DR0T3000543B20312303123
LADDER_NAME: 03123
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3020', '1.849', '2.1900', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9610', '1.850', '2.2850', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9350', '1.850', '0.5171', '0.000', '0.0000', '0.000', '0.0000']