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FEB_1254 14.10.24 13:51:31
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13:51:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:31:ST3_Shared:INFO: FEB-Microcable
13:51:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:31:febtest:INFO: Testing FEB with SN 1254
13:51:33:smx_tester:INFO: Scanning setup
13:51:33:elinks:INFO: Disabling clock on downlink 0
13:51:33:elinks:INFO: Disabling clock on downlink 1
13:51:33:elinks:INFO: Disabling clock on downlink 2
13:51:33:elinks:INFO: Disabling clock on downlink 3
13:51:33:elinks:INFO: Disabling clock on downlink 4
13:51:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:51:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:33:elinks:INFO: Disabling clock on downlink 0
13:51:33:elinks:INFO: Disabling clock on downlink 1
13:51:33:elinks:INFO: Disabling clock on downlink 2
13:51:33:elinks:INFO: Disabling clock on downlink 3
13:51:33:elinks:INFO: Disabling clock on downlink 4
13:51:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:51:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:51:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:33:elinks:INFO: Disabling clock on downlink 0
13:51:33:elinks:INFO: Disabling clock on downlink 1
13:51:33:elinks:INFO: Disabling clock on downlink 2
13:51:33:elinks:INFO: Disabling clock on downlink 3
13:51:33:elinks:INFO: Disabling clock on downlink 4
13:51:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:33:elinks:INFO: Disabling clock on downlink 0
13:51:33:elinks:INFO: Disabling clock on downlink 1
13:51:33:elinks:INFO: Disabling clock on downlink 2
13:51:33:elinks:INFO: Disabling clock on downlink 3
13:51:34:elinks:INFO: Disabling clock on downlink 4
13:51:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:51:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:34:elinks:INFO: Disabling clock on downlink 0
13:51:34:elinks:INFO: Disabling clock on downlink 1
13:51:34:elinks:INFO: Disabling clock on downlink 2
13:51:34:elinks:INFO: Disabling clock on downlink 3
13:51:34:elinks:INFO: Disabling clock on downlink 4
13:51:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:51:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:51:34:setup_element:INFO: Scanning clock phase
13:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:51:34:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:34:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:34:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:51:34:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:51:34:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:51:34:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:51:34:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:51:34:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:51:34:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:51:34:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:51:34:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:51:34:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:51:34:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:51:34:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:51:34:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:51:34:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:51:34:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
13:51:34:setup_element:INFO: Scanning data phases
13:51:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:40:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:51:40:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXXX______________________
Data delay found: 34
13:51:40:setup_element:INFO: Eye window for uplink 1 : _____XXXXXXXXX__________________________
Data delay found: 29
13:51:40:setup_element:INFO: Eye window for uplink 2 : _______XXXXXXX__________________________
Data delay found: 30
13:51:40:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXX_____________________________
Data delay found: 27
13:51:40:setup_element:INFO: Eye window for uplink 4 : ______XXXXXX____________________________
Data delay found: 28
13:51:40:setup_element:INFO: Eye window for uplink 5 : _XXXXXXXX______________________________X
Data delay found: 23
13:51:40:setup_element:INFO: Eye window for uplink 6 : XXX______________________________XXXXXXX
Data delay found: 17
13:51:40:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXXXXXX__
Data delay found: 13
13:51:40:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
13:51:40:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
13:51:40:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXXX________
Data delay found: 8
13:51:40:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXXX___
Data delay found: 13
13:51:40:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXXX__________
Data delay found: 6
13:51:40:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXXXX_____
Data delay found: 10
13:51:40:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXXXXX____
Data delay found: 11
13:51:40:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXXX___
Data delay found: 12
13:51:40:setup_element:INFO: Setting the data phase to 34 for uplink 0
13:51:40:setup_element:INFO: Setting the data phase to 29 for uplink 1
13:51:40:setup_element:INFO: Setting the data phase to 30 for uplink 2
13:51:40:setup_element:INFO: Setting the data phase to 27 for uplink 3
13:51:40:setup_element:INFO: Setting the data phase to 28 for uplink 4
13:51:40:setup_element:INFO: Setting the data phase to 23 for uplink 5
13:51:40:setup_element:INFO: Setting the data phase to 17 for uplink 6
13:51:40:setup_element:INFO: Setting the data phase to 13 for uplink 7
13:51:40:setup_element:INFO: Setting the data phase to 7 for uplink 8
13:51:40:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:51:40:setup_element:INFO: Setting the data phase to 8 for uplink 10
13:51:40:setup_element:INFO: Setting the data phase to 13 for uplink 11
13:51:40:setup_element:INFO: Setting the data phase to 6 for uplink 12
13:51:40:setup_element:INFO: Setting the data phase to 10 for uplink 13
13:51:40:setup_element:INFO: Setting the data phase to 11 for uplink 14
13:51:40:setup_element:INFO: Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
13:51:40:setup_element:INFO: Beginning SMX ASICs map scan
13:51:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:51:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:51:40:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:51:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:51:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:51:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:51:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:51:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:51:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:51:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:51:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:51:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:51:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:51:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:51:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:51:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:51:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:51:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:51:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:51:43:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ______________________________________________________________________XXXXXXXXX_
Uplink 3: ______________________________________________________________________XXXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ______________________________________________________________________XXXXXXX___
Uplink 7: ______________________________________________________________________XXXXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ________________________________________________________________________XXXXXX__
Uplink 15: ________________________________________________________________________XXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 1:
Optimal Phase: 29
Window Length: 31
Eye Window: _____XXXXXXXXX__________________________
Uplink 2:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 3:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 30
Eye Window: _XXXXXXXX______________________________X
Uplink 6:
Optimal Phase: 17
Window Length: 30
Eye Window: XXX______________________________XXXXXXX
Uplink 7:
Optimal Phase: 13
Window Length: 31
Eye Window: _____________________________XXXXXXXXX__
Uplink 8:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 9:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 10:
Optimal Phase: 8
Window Length: 33
Eye Window: _________________________XXXXXXX________
Uplink 11:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 12:
Optimal Phase: 6
Window Length: 33
Eye Window: _______________________XXXXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 31
Eye Window: __________________________XXXXXXXXX_____
Uplink 14:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 15:
Optimal Phase: 12
Window Length: 32
Eye Window: _____________________________XXXXXXXX___
==============================================OOO==============================================
13:51:43:setup_element:INFO: Performing Elink synchronization
13:51:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:51:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:51:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:51:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:51:43:febtest:INFO: Init all SMX (CSA): 30
13:51:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:57:febtest:INFO: 01-00 | XA-000-09-004-003-006-017-07 | 40.9 | 1159.7
13:51:58:febtest:INFO: 08-01 | XA-000-09-004-003-006-025-07 | 28.2 | 1242.0
13:51:58:febtest:INFO: 03-02 | XA-000-09-004-003-006-016-07 | 37.7 | 1171.5
13:51:58:febtest:INFO: 10-03 | XA-000-09-004-003-007-022-10 | 34.6 | 1165.6
13:51:58:febtest:INFO: 05-04 | XA-000-09-004-003-006-023-07 | 34.6 | 1195.1
13:51:58:febtest:INFO: 12-05 | XA-000-09-004-003-007-018-10 | 28.2 | 1201.0
13:51:59:febtest:INFO: 07-06 | XA-000-09-004-003-006-018-07 | 37.7 | 1171.5
13:51:59:febtest:INFO: 14-07 | XA-000-09-004-003-007-025-10 | 37.7 | 1165.6
13:52:00:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:52:02:ST3_smx:INFO: chip: 1-0 40.898880 C 1171.483840 mV
13:52:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:02:ST3_smx:INFO: Electrons
13:52:02:ST3_smx:INFO: # loops 0
13:52:04:ST3_smx:INFO: # loops 1
13:52:05:ST3_smx:INFO: # loops 2
13:52:07:ST3_smx:INFO: Total # of broken channels: 1
13:52:07:ST3_smx:INFO: List of broken channels: [98]
13:52:07:ST3_smx:INFO: Total # of broken channels: 19
13:52:07:ST3_smx:INFO: List of broken channels: [15, 19, 35, 47, 55, 59, 61, 73, 79, 81, 83, 85, 87, 89, 103, 105, 107, 109, 123]
13:52:08:ST3_smx:INFO: chip: 8-1 28.225000 C 1277.050060 mV
13:52:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:08:ST3_smx:INFO: Electrons
13:52:08:ST3_smx:INFO: # loops 0
13:52:10:ST3_smx:INFO: # loops 1
13:52:12:ST3_smx:INFO: # loops 2
13:52:13:ST3_smx:INFO: Total # of broken channels: 0
13:52:13:ST3_smx:INFO: List of broken channels: []
13:52:13:ST3_smx:INFO: Total # of broken channels: 0
13:52:13:ST3_smx:INFO: List of broken channels: []
13:52:15:ST3_smx:INFO: chip: 3-2 37.726682 C 1189.190035 mV
13:52:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:15:ST3_smx:INFO: Electrons
13:52:15:ST3_smx:INFO: # loops 0
13:52:17:ST3_smx:INFO: # loops 1
13:52:18:ST3_smx:INFO: # loops 2
13:52:20:ST3_smx:INFO: Total # of broken channels: 0
13:52:20:ST3_smx:INFO: List of broken channels: []
13:52:20:ST3_smx:INFO: Total # of broken channels: 1
13:52:20:ST3_smx:INFO: List of broken channels: [31]
13:52:21:ST3_smx:INFO: chip: 10-3 37.726682 C 1183.292940 mV
13:52:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:21:ST3_smx:INFO: Electrons
13:52:21:ST3_smx:INFO: # loops 0
13:52:23:ST3_smx:INFO: # loops 1
13:52:24:ST3_smx:INFO: # loops 2
13:52:26:ST3_smx:INFO: Total # of broken channels: 0
13:52:26:ST3_smx:INFO: List of broken channels: []
13:52:26:ST3_smx:INFO: Total # of broken channels: 0
13:52:26:ST3_smx:INFO: List of broken channels: []
13:52:28:ST3_smx:INFO: chip: 5-4 34.556970 C 1212.728715 mV
13:52:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:28:ST3_smx:INFO: Electrons
13:52:28:ST3_smx:INFO: # loops 0
13:52:29:ST3_smx:INFO: # loops 1
13:52:31:ST3_smx:INFO: # loops 2
13:52:32:ST3_smx:INFO: Total # of broken channels: 0
13:52:32:ST3_smx:INFO: List of broken channels: []
13:52:32:ST3_smx:INFO: Total # of broken channels: 9
13:52:32:ST3_smx:INFO: List of broken channels: [2, 4, 6, 8, 10, 12, 14, 16, 22]
13:52:34:ST3_smx:INFO: chip: 12-5 25.062742 C 1218.600960 mV
13:52:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:34:ST3_smx:INFO: Electrons
13:52:34:ST3_smx:INFO: # loops 0
13:52:36:ST3_smx:INFO: # loops 1
13:52:37:ST3_smx:INFO: # loops 2
13:52:39:ST3_smx:INFO: Total # of broken channels: 0
13:52:39:ST3_smx:INFO: List of broken channels: []
13:52:39:ST3_smx:INFO: Total # of broken channels: 0
13:52:39:ST3_smx:INFO: List of broken channels: []
13:52:41:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
13:52:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:41:ST3_smx:INFO: Electrons
13:52:41:ST3_smx:INFO: # loops 0
13:52:42:ST3_smx:INFO: # loops 1
13:52:44:ST3_smx:INFO: # loops 2
13:52:46:ST3_smx:INFO: Total # of broken channels: 0
13:52:46:ST3_smx:INFO: List of broken channels: []
13:52:46:ST3_smx:INFO: Total # of broken channels: 0
13:52:46:ST3_smx:INFO: List of broken channels: []
13:52:47:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
13:52:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:47:ST3_smx:INFO: Electrons
13:52:47:ST3_smx:INFO: # loops 0
13:52:49:ST3_smx:INFO: # loops 1
13:52:50:ST3_smx:INFO: # loops 2
13:52:52:ST3_smx:INFO: Total # of broken channels: 0
13:52:52:ST3_smx:INFO: List of broken channels: []
13:52:52:ST3_smx:INFO: Total # of broken channels: 0
13:52:52:ST3_smx:INFO: List of broken channels: []
13:52:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:52:53:febtest:INFO: 01-00 | XA-000-09-004-003-006-017-07 | 40.9 | 1195.1
13:52:53:febtest:INFO: 08-01 | XA-000-09-004-003-006-025-07 | 25.1 | 1578.5
13:52:53:febtest:INFO: 03-02 | XA-000-09-004-003-006-016-07 | 37.7 | 1206.9
13:52:53:febtest:INFO: 10-03 | XA-000-09-004-003-007-022-10 | 37.7 | 1201.0
13:52:53:febtest:INFO: 05-04 | XA-000-09-004-003-006-023-07 | 34.6 | 1282.9
13:52:54:febtest:INFO: 12-05 | XA-000-09-004-003-007-018-10 | 28.2 | 1236.2
13:52:54:febtest:INFO: 07-06 | XA-000-09-004-003-006-018-07 | 37.7 | 1206.9
13:52:54:febtest:INFO: 14-07 | XA-000-09-004-003-007-025-10 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_14-13_51_31
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1254| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4930', '1.848', '2.6670', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9790', '1.850', '2.3930', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9610', '1.850', '0.5216', '0.000', '0.0000', '0.000', '0.0000']