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FEB_1254 29.10.24 07:54:48
Info
07:54:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:54:48:ST3_Shared:INFO: FEB-Sensor
07:54:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:54:54:ST3_ModuleSelector:INFO: M3DR2B1000121A2
07:54:54:ST3_ModuleSelector:INFO: 27312
07:54:54:febtest:INFO: Testing FEB with SN 1254
07:54:56:smx_tester:INFO: Scanning setup
07:54:56:elinks:INFO: Disabling clock on downlink 0
07:54:56:elinks:INFO: Disabling clock on downlink 1
07:54:56:elinks:INFO: Disabling clock on downlink 2
07:54:56:elinks:INFO: Disabling clock on downlink 3
07:54:56:elinks:INFO: Disabling clock on downlink 4
07:54:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:56:elinks:INFO: Disabling clock on downlink 0
07:54:56:elinks:INFO: Disabling clock on downlink 1
07:54:56:elinks:INFO: Disabling clock on downlink 2
07:54:56:elinks:INFO: Disabling clock on downlink 3
07:54:56:elinks:INFO: Disabling clock on downlink 4
07:54:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:54:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:54:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:56:elinks:INFO: Disabling clock on downlink 0
07:54:56:elinks:INFO: Disabling clock on downlink 1
07:54:56:elinks:INFO: Disabling clock on downlink 2
07:54:56:elinks:INFO: Disabling clock on downlink 3
07:54:56:elinks:INFO: Disabling clock on downlink 4
07:54:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:54:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:56:elinks:INFO: Disabling clock on downlink 0
07:54:56:elinks:INFO: Disabling clock on downlink 1
07:54:56:elinks:INFO: Disabling clock on downlink 2
07:54:56:elinks:INFO: Disabling clock on downlink 3
07:54:57:elinks:INFO: Disabling clock on downlink 4
07:54:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:54:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:57:elinks:INFO: Disabling clock on downlink 0
07:54:57:elinks:INFO: Disabling clock on downlink 1
07:54:57:elinks:INFO: Disabling clock on downlink 2
07:54:57:elinks:INFO: Disabling clock on downlink 3
07:54:57:elinks:INFO: Disabling clock on downlink 4
07:54:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:54:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:54:57:setup_element:INFO: Scanning clock phase
07:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:54:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:54:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:54:57:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:57:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:57:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:54:57:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:54:57:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:54:57:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:54:57:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:57:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:54:57:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:54:57:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:54:57:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:57:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:57:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:57:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:54:57:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:54:57:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:54:57:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
07:54:57:setup_element:INFO: Scanning data phases
07:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:54:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:55:03:setup_element:INFO: Eye window for uplink 0 : __________XXXXXXXX______________________
Data delay found: 33
07:55:03:setup_element:INFO: Eye window for uplink 1 : ______XXXXXXXX__________________________
Data delay found: 29
07:55:03:setup_element:INFO: Eye window for uplink 2 : _____XXXXXXXXX__________________________
Data delay found: 29
07:55:03:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXX_____________________________
Data delay found: 27
07:55:03:setup_element:INFO: Eye window for uplink 4 : _____XXXXXXX____________________________
Data delay found: 28
07:55:03:setup_element:INFO: Eye window for uplink 5 : _XXXXXXX________________________________
Data delay found: 24
07:55:03:setup_element:INFO: Eye window for uplink 6 : XXX______________________________XXXXXXX
Data delay found: 17
07:55:03:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXXXXXX__
Data delay found: 13
07:55:03:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
07:55:03:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
07:55:03:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
07:55:03:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
07:55:03:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXXX__________
Data delay found: 6
07:55:03:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXXX______
Data delay found: 9
07:55:03:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXXXXXX____
Data delay found: 11
07:55:03:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXXXX__
Data delay found: 13
07:55:03:setup_element:INFO: Setting the data phase to 33 for uplink 0
07:55:03:setup_element:INFO: Setting the data phase to 29 for uplink 1
07:55:03:setup_element:INFO: Setting the data phase to 29 for uplink 2
07:55:03:setup_element:INFO: Setting the data phase to 27 for uplink 3
07:55:03:setup_element:INFO: Setting the data phase to 28 for uplink 4
07:55:03:setup_element:INFO: Setting the data phase to 24 for uplink 5
07:55:03:setup_element:INFO: Setting the data phase to 17 for uplink 6
07:55:03:setup_element:INFO: Setting the data phase to 13 for uplink 7
07:55:03:setup_element:INFO: Setting the data phase to 8 for uplink 8
07:55:03:setup_element:INFO: Setting the data phase to 13 for uplink 9
07:55:03:setup_element:INFO: Setting the data phase to 9 for uplink 10
07:55:03:setup_element:INFO: Setting the data phase to 12 for uplink 11
07:55:03:setup_element:INFO: Setting the data phase to 6 for uplink 12
07:55:03:setup_element:INFO: Setting the data phase to 9 for uplink 13
07:55:03:setup_element:INFO: Setting the data phase to 11 for uplink 14
07:55:03:setup_element:INFO: Setting the data phase to 13 for uplink 15
==============================================OOO==============================================
07:55:03:setup_element:INFO: Beginning SMX ASICs map scan
07:55:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:55:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:55:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:55:03:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:55:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:55:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:55:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:55:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:55:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:55:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:55:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:55:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:55:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:55:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:55:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:55:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:55:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:55:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:55:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:55:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:55:06:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ______________________________________________________________________XXXXXXXXX_
Uplink 3: ______________________________________________________________________XXXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 32
Eye Window: __________XXXXXXXX______________________
Uplink 1:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 2:
Optimal Phase: 29
Window Length: 31
Eye Window: _____XXXXXXXXX__________________________
Uplink 3:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 33
Eye Window: _XXXXXXX________________________________
Uplink 6:
Optimal Phase: 17
Window Length: 30
Eye Window: XXX______________________________XXXXXXX
Uplink 7:
Optimal Phase: 13
Window Length: 31
Eye Window: _____________________________XXXXXXXXX__
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 10:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 12:
Optimal Phase: 6
Window Length: 33
Eye Window: _______________________XXXXXXX__________
Uplink 13:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 14:
Optimal Phase: 11
Window Length: 31
Eye Window: ___________________________XXXXXXXXX____
Uplink 15:
Optimal Phase: 13
Window Length: 31
Eye Window: _____________________________XXXXXXXXX__
==============================================OOO==============================================
07:55:06:setup_element:INFO: Performing Elink synchronization
07:55:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:55:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:55:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
07:55:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:55:06:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:55:07:febtest:INFO: Init all SMX (CSA): 30
07:55:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:55:21:febtest:INFO: 01-00 | XA-000-09-004-003-006-017-07 | 34.6 | 1159.7
07:55:21:febtest:INFO: 08-01 | XA-000-09-004-003-006-025-07 | 25.1 | 1195.1
07:55:21:febtest:INFO: 03-02 | XA-000-09-004-003-006-016-07 | 28.2 | 1177.4
07:55:21:febtest:INFO: 10-03 | XA-000-09-004-003-007-022-10 | 31.4 | 1165.6
07:55:22:febtest:INFO: 05-04 | XA-000-09-004-003-006-023-07 | 28.2 | 1189.2
07:55:22:febtest:INFO: 12-05 | XA-000-09-004-003-007-018-10 | 18.7 | 1206.9
07:55:22:febtest:INFO: 07-06 | XA-000-09-004-003-006-018-07 | 28.2 | 1183.3
07:55:22:febtest:INFO: 14-07 | XA-000-09-004-003-007-025-10 | 31.4 | 1171.5
07:55:23:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:55:26:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV
07:55:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:26:ST3_smx:INFO: Electrons
07:55:26:ST3_smx:INFO: # loops 0
07:55:27:ST3_smx:INFO: # loops 1
07:55:29:ST3_smx:INFO: # loops 2
07:55:30:ST3_smx:INFO: # loops 3
07:55:32:ST3_smx:INFO: # loops 4
07:55:33:ST3_smx:INFO: Total # of broken channels: 26
07:55:33:ST3_smx:INFO: List of broken channels: [15, 19, 35, 47, 55, 59, 61, 65, 67, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 103, 105, 107, 109, 111, 113, 123]
07:55:33:ST3_smx:INFO: Total # of broken channels: 44
07:55:33:ST3_smx:INFO: List of broken channels: [5, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 51, 53, 55, 59, 61, 65, 67, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 103, 105, 107, 109, 111, 113, 123]
07:55:35:ST3_smx:INFO: chip: 8-1 25.062742 C 1230.330540 mV
07:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:35:ST3_smx:INFO: Electrons
07:55:35:ST3_smx:INFO: # loops 0
07:55:37:ST3_smx:INFO: # loops 1
07:55:38:ST3_smx:INFO: # loops 2
07:55:40:ST3_smx:INFO: # loops 3
07:55:41:ST3_smx:INFO: # loops 4
07:55:43:ST3_smx:INFO: Total # of broken channels: 0
07:55:43:ST3_smx:INFO: List of broken channels: []
07:55:43:ST3_smx:INFO: Total # of broken channels: 44
07:55:43:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 63, 65, 67, 71, 73, 75, 77, 81, 83, 85, 89, 95, 123, 125, 127]
07:55:44:ST3_smx:INFO: chip: 3-2 31.389742 C 1189.190035 mV
07:55:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:44:ST3_smx:INFO: Electrons
07:55:44:ST3_smx:INFO: # loops 0
07:55:46:ST3_smx:INFO: # loops 1
07:55:48:ST3_smx:INFO: # loops 2
07:55:49:ST3_smx:INFO: # loops 3
07:55:51:ST3_smx:INFO: # loops 4
07:55:52:ST3_smx:INFO: Total # of broken channels: 1
07:55:52:ST3_smx:INFO: List of broken channels: [31]
07:55:52:ST3_smx:INFO: Total # of broken channels: 47
07:55:52:ST3_smx:INFO: List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 81, 83, 85, 87, 89, 91, 93, 95, 99, 101, 103]
07:55:54:ST3_smx:INFO: chip: 10-3 31.389742 C 1183.292940 mV
07:55:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:55:54:ST3_smx:INFO: Electrons
07:55:54:ST3_smx:INFO: # loops 0
07:55:55:ST3_smx:INFO: # loops 1
07:55:57:ST3_smx:INFO: # loops 2
07:55:58:ST3_smx:INFO: # loops 3
07:56:00:ST3_smx:INFO: # loops 4
07:56:01:ST3_smx:INFO: Total # of broken channels: 0
07:56:01:ST3_smx:INFO: List of broken channels: []
07:56:01:ST3_smx:INFO: Total # of broken channels: 47
07:56:01:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 91, 93, 95, 97, 99, 105]
07:56:03:ST3_smx:INFO: chip: 5-4 31.389742 C 1206.851500 mV
07:56:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:03:ST3_smx:INFO: Electrons
07:56:03:ST3_smx:INFO: # loops 0
07:56:05:ST3_smx:INFO: # loops 1
07:56:06:ST3_smx:INFO: # loops 2
07:56:08:ST3_smx:INFO: # loops 3
07:56:09:ST3_smx:INFO: # loops 4
07:56:11:ST3_smx:INFO: Total # of broken channels: 0
07:56:11:ST3_smx:INFO: List of broken channels: []
07:56:11:ST3_smx:INFO: Total # of broken channels: 42
07:56:11:ST3_smx:INFO: List of broken channels: [11, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 77, 79, 81, 83, 85, 87, 89, 95, 97, 99, 103, 105]
07:56:13:ST3_smx:INFO: chip: 12-5 18.745682 C 1218.600960 mV
07:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:13:ST3_smx:INFO: Electrons
07:56:13:ST3_smx:INFO: # loops 0
07:56:15:ST3_smx:INFO: # loops 1
07:56:16:ST3_smx:INFO: # loops 2
07:56:18:ST3_smx:INFO: # loops 3
07:56:19:ST3_smx:INFO: # loops 4
07:56:21:ST3_smx:INFO: Total # of broken channels: 0
07:56:21:ST3_smx:INFO: List of broken channels: []
07:56:21:ST3_smx:INFO: Total # of broken channels: 44
07:56:21:ST3_smx:INFO: List of broken channels: [11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 97, 99]
07:56:23:ST3_smx:INFO: chip: 7-6 28.225000 C 1195.082160 mV
07:56:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:23:ST3_smx:INFO: Electrons
07:56:23:ST3_smx:INFO: # loops 0
07:56:24:ST3_smx:INFO: # loops 1
07:56:26:ST3_smx:INFO: # loops 2
07:56:27:ST3_smx:INFO: # loops 3
07:56:29:ST3_smx:INFO: # loops 4
07:56:30:ST3_smx:INFO: Total # of broken channels: 0
07:56:30:ST3_smx:INFO: List of broken channels: []
07:56:30:ST3_smx:INFO: Total # of broken channels: 40
07:56:30:ST3_smx:INFO: List of broken channels: [17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 79, 81, 83, 85, 87, 89, 91, 93, 95, 99, 105]
07:56:32:ST3_smx:INFO: chip: 14-7 31.389742 C 1183.292940 mV
07:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:32:ST3_smx:INFO: Electrons
07:56:32:ST3_smx:INFO: # loops 0
07:56:34:ST3_smx:INFO: # loops 1
07:56:35:ST3_smx:INFO: # loops 2
07:56:37:ST3_smx:INFO: # loops 3
07:56:38:ST3_smx:INFO: # loops 4
07:56:40:ST3_smx:INFO: Total # of broken channels: 0
07:56:40:ST3_smx:INFO: List of broken channels: []
07:56:40:ST3_smx:INFO: Total # of broken channels: 18
07:56:40:ST3_smx:INFO: List of broken channels: [87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 123]
07:56:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:56:41:febtest:INFO: 01-00 | XA-000-09-004-003-006-017-07 | 34.6 | 1195.1
07:56:41:febtest:INFO: 08-01 | XA-000-09-004-003-006-025-07 | 25.1 | 1460.7
07:56:41:febtest:INFO: 03-02 | XA-000-09-004-003-006-016-07 | 31.4 | 1212.7
07:56:41:febtest:INFO: 10-03 | XA-000-09-004-003-007-022-10 | 31.4 | 1201.0
07:56:41:febtest:INFO: 05-04 | XA-000-09-004-003-006-023-07 | 28.2 | 1271.2
07:56:42:febtest:INFO: 12-05 | XA-000-09-004-003-007-018-10 | 21.9 | 1242.0
07:56:42:febtest:INFO: 07-06 | XA-000-09-004-003-006-018-07 | 31.4 | 1212.7
07:56:42:febtest:INFO: 14-07 | XA-000-09-004-003-007-025-10 | 31.4 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_29-07_54_48
OPERATOR : Olga B.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1254| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 27312 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M3DR2B1000121A2
LADDER_NAME: L3DR200012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5130', '1.849', '2.7750', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9760', '1.850', '2.3880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9590', '1.850', '0.5220', '0.000', '0.0000', '0.000', '0.0000']