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FEB_1259 09.10.24 10:50:04
Info
10:50:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:04:ST3_Shared:INFO: FEB-Sensor
10:50:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:06:ST3_ModuleSelector:INFO: M8UL0B2010602A2
10:50:06:ST3_ModuleSelector:INFO: 29074
10:50:06:febtest:INFO: Testing FEB with SN 1259
10:50:07:smx_tester:INFO: Scanning setup
10:50:07:elinks:INFO: Disabling clock on downlink 0
10:50:07:elinks:INFO: Disabling clock on downlink 1
10:50:07:elinks:INFO: Disabling clock on downlink 2
10:50:07:elinks:INFO: Disabling clock on downlink 3
10:50:07:elinks:INFO: Disabling clock on downlink 4
10:50:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:50:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:07:elinks:INFO: Disabling clock on downlink 0
10:50:07:elinks:INFO: Disabling clock on downlink 1
10:50:07:elinks:INFO: Disabling clock on downlink 2
10:50:08:elinks:INFO: Disabling clock on downlink 3
10:50:08:elinks:INFO: Disabling clock on downlink 4
10:50:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:50:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:50:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:08:elinks:INFO: Disabling clock on downlink 0
10:50:08:elinks:INFO: Disabling clock on downlink 1
10:50:08:elinks:INFO: Disabling clock on downlink 2
10:50:08:elinks:INFO: Disabling clock on downlink 3
10:50:08:elinks:INFO: Disabling clock on downlink 4
10:50:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:50:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:08:elinks:INFO: Disabling clock on downlink 0
10:50:08:elinks:INFO: Disabling clock on downlink 1
10:50:08:elinks:INFO: Disabling clock on downlink 2
10:50:08:elinks:INFO: Disabling clock on downlink 3
10:50:08:elinks:INFO: Disabling clock on downlink 4
10:50:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:08:elinks:INFO: Disabling clock on downlink 0
10:50:08:elinks:INFO: Disabling clock on downlink 1
10:50:08:elinks:INFO: Disabling clock on downlink 2
10:50:08:elinks:INFO: Disabling clock on downlink 3
10:50:08:elinks:INFO: Disabling clock on downlink 4
10:50:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:50:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:50:08:setup_element:INFO: Scanning clock phase
10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:09:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:50:09:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:50:09:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:50:09:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:50:09:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:50:09:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:50:09:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:50:09:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:50:09:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
10:50:09:setup_element:INFO: Scanning data phases
10:50:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:14:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:50:14:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXXX_______________________
Data delay found: 32
10:50:14:setup_element:INFO: Eye window for uplink 1 : ____XXXXXXXXX___________________________
Data delay found: 28
10:50:14:setup_element:INFO: Eye window for uplink 2 : _______XXXXXXXXX________________________
Data delay found: 31
10:50:14:setup_element:INFO: Eye window for uplink 3 : _____XXXXXXXX___________________________
Data delay found: 28
10:50:14:setup_element:INFO: Eye window for uplink 4 : _____XXXXXXXX___________________________
Data delay found: 28
10:50:14:setup_element:INFO: Eye window for uplink 5 : __XXXXXX________________________________
Data delay found: 24
10:50:14:setup_element:INFO: Eye window for uplink 6 : XXXXXXX_______________________________XX
Data delay found: 22
10:50:14:setup_element:INFO: Eye window for uplink 7 : XXXX________________________________XXXX
Data delay found: 19
10:50:14:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXX__________
Data delay found: 6
10:50:14:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXXXX____
Data delay found: 11
10:50:14:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXX_________
Data delay found: 7
10:50:14:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXXX______
Data delay found: 10
10:50:14:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXXXXX__
Data delay found: 13
10:50:14:setup_element:INFO: Eye window for uplink 13: X_______________________________XXXXXXXX
Data delay found: 16
10:50:14:setup_element:INFO: Eye window for uplink 14: ______________________XXXXXXXXXXX_______
Data delay found: 7
10:50:14:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXXXXXXXX_____
Data delay found: 8
10:50:14:setup_element:INFO: Setting the data phase to 32 for uplink 0
10:50:14:setup_element:INFO: Setting the data phase to 28 for uplink 1
10:50:14:setup_element:INFO: Setting the data phase to 31 for uplink 2
10:50:14:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:50:14:setup_element:INFO: Setting the data phase to 28 for uplink 4
10:50:14:setup_element:INFO: Setting the data phase to 24 for uplink 5
10:50:14:setup_element:INFO: Setting the data phase to 22 for uplink 6
10:50:14:setup_element:INFO: Setting the data phase to 19 for uplink 7
10:50:14:setup_element:INFO: Setting the data phase to 6 for uplink 8
10:50:14:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:50:14:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:50:14:setup_element:INFO: Setting the data phase to 10 for uplink 11
10:50:14:setup_element:INFO: Setting the data phase to 13 for uplink 12
10:50:14:setup_element:INFO: Setting the data phase to 16 for uplink 13
10:50:14:setup_element:INFO: Setting the data phase to 7 for uplink 14
10:50:14:setup_element:INFO: Setting the data phase to 8 for uplink 15
==============================================OOO==============================================
10:50:14:setup_element:INFO: Beginning SMX ASICs map scan
10:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:50:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:50:14:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:50:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:50:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:50:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:50:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:50:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:50:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:50:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:50:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:50:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:50:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:50:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:50:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:50:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:50:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:50:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:50:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:50:17:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXXX
Uplink 5: ________________________________________________________________________XXXXXXXX
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 32
Eye Window: _________XXXXXXXX_______________________
Uplink 1:
Optimal Phase: 28
Window Length: 31
Eye Window: ____XXXXXXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 31
Eye Window: _______XXXXXXXXX________________________
Uplink 3:
Optimal Phase: 28
Window Length: 32
Eye Window: _____XXXXXXXX___________________________
Uplink 4:
Optimal Phase: 28
Window Length: 32
Eye Window: _____XXXXXXXX___________________________
Uplink 5:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 31
Eye Window: XXXXXXX_______________________________XX
Uplink 7:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 8:
Optimal Phase: 6
Window Length: 33
Eye Window: _______________________XXXXXXX__________
Uplink 9:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 10:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 11:
Optimal Phase: 10
Window Length: 33
Eye Window: ___________________________XXXXXXX______
Uplink 12:
Optimal Phase: 13
Window Length: 32
Eye Window: ______________________________XXXXXXXX__
Uplink 13:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 14:
Optimal Phase: 7
Window Length: 29
Eye Window: ______________________XXXXXXXXXXX_______
Uplink 15:
Optimal Phase: 8
Window Length: 28
Eye Window: _______________________XXXXXXXXXXXX_____
==============================================OOO==============================================
10:50:17:setup_element:INFO: Performing Elink synchronization
10:50:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:50:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:50:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:50:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:50:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:50:18:febtest:INFO: Init all SMX (CSA): 30
10:50:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:50:32:febtest:INFO: 01-00 | XA-000-08-002-003-007-114-11 | 37.7 | 1153.7
10:50:32:febtest:INFO: 08-01 | XA-000-08-002-003-007-116-11 | 15.6 | 1212.7
10:50:32:febtest:INFO: 03-02 | XA-012-08-003-000-006-051-09 | 28.2 | 1183.3
10:50:32:febtest:INFO: 10-03 | XA-015-08-003-000-006-051-13 | 21.9 | 1242.0
10:50:33:febtest:INFO: 05-04 | XA-013-08-003-000-006-051-10 | 28.2 | 1177.4
10:50:33:febtest:INFO: 12-05 | XA-016-08-003-000-006-051-13 | 31.4 | 1165.6
10:50:33:febtest:INFO: 07-06 | XA-014-08-003-000-006-051-14 | 21.9 | 1212.7
10:50:33:febtest:INFO: 14-07 | XA-000-08-003-000-002-092-05 | 34.6 | 1177.4
10:50:34:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:50:37:ST3_smx:INFO: chip: 1-0 37.726682 C 1165.571835 mV
10:50:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:37:ST3_smx:INFO: Electrons
10:50:37:ST3_smx:INFO: # loops 0
10:50:38:ST3_smx:INFO: # loops 1
10:50:40:ST3_smx:INFO: # loops 2
10:50:41:ST3_smx:INFO: # loops 3
10:50:43:ST3_smx:INFO: # loops 4
10:50:44:ST3_smx:INFO: Total # of broken channels: 0
10:50:44:ST3_smx:INFO: List of broken channels: []
10:50:44:ST3_smx:INFO: Total # of broken channels: 0
10:50:44:ST3_smx:INFO: List of broken channels: []
10:50:46:ST3_smx:INFO: chip: 8-1 18.745682 C 1224.468235 mV
10:50:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:46:ST3_smx:INFO: Electrons
10:50:46:ST3_smx:INFO: # loops 0
10:50:47:ST3_smx:INFO: # loops 1
10:50:49:ST3_smx:INFO: # loops 2
10:50:51:ST3_smx:INFO: # loops 3
10:50:52:ST3_smx:INFO: # loops 4
10:50:54:ST3_smx:INFO: Total # of broken channels: 0
10:50:54:ST3_smx:INFO: List of broken channels: []
10:50:54:ST3_smx:INFO: Total # of broken channels: 0
10:50:54:ST3_smx:INFO: List of broken channels: []
10:50:55:ST3_smx:INFO: chip: 3-2 28.225000 C 1200.969315 mV
10:50:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:50:55:ST3_smx:INFO: Electrons
10:50:55:ST3_smx:INFO: # loops 0
10:50:57:ST3_smx:INFO: # loops 1
10:50:59:ST3_smx:INFO: # loops 2
10:51:00:ST3_smx:INFO: # loops 3
10:51:02:ST3_smx:INFO: # loops 4
10:51:03:ST3_smx:INFO: Total # of broken channels: 0
10:51:03:ST3_smx:INFO: List of broken channels: []
10:51:03:ST3_smx:INFO: Total # of broken channels: 0
10:51:03:ST3_smx:INFO: List of broken channels: []
10:51:05:ST3_smx:INFO: chip: 10-3 21.902970 C 1271.227515 mV
10:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:05:ST3_smx:INFO: Electrons
10:51:05:ST3_smx:INFO: # loops 0
10:51:06:ST3_smx:INFO: # loops 1
10:51:08:ST3_smx:INFO: # loops 2
10:51:09:ST3_smx:INFO: # loops 3
10:51:11:ST3_smx:INFO: # loops 4
10:51:12:ST3_smx:INFO: Total # of broken channels: 0
10:51:12:ST3_smx:INFO: List of broken channels: []
10:51:12:ST3_smx:INFO: Total # of broken channels: 0
10:51:12:ST3_smx:INFO: List of broken channels: []
10:51:14:ST3_smx:INFO: chip: 5-4 31.389742 C 1195.082160 mV
10:51:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:14:ST3_smx:INFO: Electrons
10:51:14:ST3_smx:INFO: # loops 0
10:51:16:ST3_smx:INFO: # loops 1
10:51:17:ST3_smx:INFO: # loops 2
10:51:19:ST3_smx:INFO: # loops 3
10:51:20:ST3_smx:INFO: # loops 4
10:51:22:ST3_smx:INFO: Total # of broken channels: 2
10:51:22:ST3_smx:INFO: List of broken channels: [1, 3]
10:51:22:ST3_smx:INFO: Total # of broken channels: 2
10:51:22:ST3_smx:INFO: List of broken channels: [1, 3]
10:51:24:ST3_smx:INFO: chip: 12-5 31.389742 C 1177.390875 mV
10:51:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:24:ST3_smx:INFO: Electrons
10:51:24:ST3_smx:INFO: # loops 0
10:51:25:ST3_smx:INFO: # loops 1
10:51:27:ST3_smx:INFO: # loops 2
10:51:28:ST3_smx:INFO: # loops 3
10:51:30:ST3_smx:INFO: # loops 4
10:51:31:ST3_smx:INFO: Total # of broken channels: 2
10:51:31:ST3_smx:INFO: List of broken channels: [9, 54]
10:51:31:ST3_smx:INFO: Total # of broken channels: 4
10:51:31:ST3_smx:INFO: List of broken channels: [1, 9, 54, 57]
10:51:33:ST3_smx:INFO: chip: 7-6 21.902970 C 1224.468235 mV
10:51:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:33:ST3_smx:INFO: Electrons
10:51:33:ST3_smx:INFO: # loops 0
10:51:34:ST3_smx:INFO: # loops 1
10:51:36:ST3_smx:INFO: # loops 2
10:51:37:ST3_smx:INFO: # loops 3
10:51:39:ST3_smx:INFO: # loops 4
10:51:40:ST3_smx:INFO: Total # of broken channels: 0
10:51:40:ST3_smx:INFO: List of broken channels: []
10:51:40:ST3_smx:INFO: Total # of broken channels: 1
10:51:40:ST3_smx:INFO: List of broken channels: [64]
10:51:42:ST3_smx:INFO: chip: 14-7 34.556970 C 1195.082160 mV
10:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:42:ST3_smx:INFO: Electrons
10:51:42:ST3_smx:INFO: # loops 0
10:51:44:ST3_smx:INFO: # loops 1
10:51:45:ST3_smx:INFO: # loops 2
10:51:47:ST3_smx:INFO: # loops 3
10:51:48:ST3_smx:INFO: # loops 4
10:51:50:ST3_smx:INFO: Total # of broken channels: 0
10:51:50:ST3_smx:INFO: List of broken channels: []
10:51:50:ST3_smx:INFO: Total # of broken channels: 1
10:51:50:ST3_smx:INFO: List of broken channels: [81]
10:51:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:51:50:febtest:INFO: 01-00 | XA-000-08-002-003-007-114-11 | 37.7 | 1189.2
10:51:51:febtest:INFO: 08-01 | XA-000-08-002-003-007-116-11 | 18.7 | 1247.9
10:51:51:febtest:INFO: 03-02 | XA-012-08-003-000-006-051-09 | 31.4 | 1218.6
10:51:51:febtest:INFO: 10-03 | XA-015-08-003-000-006-051-13 | 18.7 | 1578.5
10:51:51:febtest:INFO: 05-04 | XA-013-08-003-000-006-051-10 | 31.4 | 1224.5
10:51:52:febtest:INFO: 12-05 | XA-016-08-003-000-006-051-13 | 31.4 | 1201.0
10:51:52:febtest:INFO: 07-06 | XA-014-08-003-000-006-051-14 | 25.1 | 1247.9
10:51:52:febtest:INFO: 14-07 | XA-000-08-003-000-002-092-05 | 37.7 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_09-10_50_04
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1259| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 29074 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL0B2010602A2
LADDER_NAME: L8UL001060
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4220', '1.849', '2.1530', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0640', '1.850', '2.4580', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0140', '1.850', '0.5267', '0.000', '0.0000', '0.000', '0.0000']