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FEB_1263 09.10.24 13:53:38
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13:53:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:53:38:ST3_Shared:INFO: FEB-Microcable
13:53:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:53:38:febtest:INFO: Testing FEB with SN 1263
13:53:40:smx_tester:INFO: Scanning setup
13:53:40:elinks:INFO: Disabling clock on downlink 0
13:53:40:elinks:INFO: Disabling clock on downlink 1
13:53:40:elinks:INFO: Disabling clock on downlink 2
13:53:40:elinks:INFO: Disabling clock on downlink 3
13:53:40:elinks:INFO: Disabling clock on downlink 4
13:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:53:40:elinks:INFO: Disabling clock on downlink 0
13:53:40:elinks:INFO: Disabling clock on downlink 1
13:53:40:elinks:INFO: Disabling clock on downlink 2
13:53:40:elinks:INFO: Disabling clock on downlink 3
13:53:40:elinks:INFO: Disabling clock on downlink 4
13:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:53:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:53:40:elinks:INFO: Disabling clock on downlink 0
13:53:40:elinks:INFO: Disabling clock on downlink 1
13:53:40:elinks:INFO: Disabling clock on downlink 2
13:53:40:elinks:INFO: Disabling clock on downlink 3
13:53:40:elinks:INFO: Disabling clock on downlink 4
13:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:53:40:elinks:INFO: Disabling clock on downlink 0
13:53:40:elinks:INFO: Disabling clock on downlink 1
13:53:40:elinks:INFO: Disabling clock on downlink 2
13:53:40:elinks:INFO: Disabling clock on downlink 3
13:53:40:elinks:INFO: Disabling clock on downlink 4
13:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:53:40:elinks:INFO: Disabling clock on downlink 0
13:53:40:elinks:INFO: Disabling clock on downlink 1
13:53:40:elinks:INFO: Disabling clock on downlink 2
13:53:40:elinks:INFO: Disabling clock on downlink 3
13:53:40:elinks:INFO: Disabling clock on downlink 4
13:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:53:41:setup_element:INFO: Scanning clock phase
13:53:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:53:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:53:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:53:41:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:53:41:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:53:41:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:53:41:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:53:41:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:53:41:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:53:41:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:53:41:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:53:41:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:41:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:53:41:setup_element:INFO: Scanning data phases
13:53:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:53:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:53:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:53:46:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXXX_____________________
Data delay found: 35
13:53:46:setup_element:INFO: Eye window for uplink 1 : ________XXXXXXX_________________________
Data delay found: 31
13:53:46:setup_element:INFO: Eye window for uplink 4 : _______XXXXXXX__________________________
Data delay found: 30
13:53:46:setup_element:INFO: Eye window for uplink 5 : ___XXXXXX_______________________________
Data delay found: 25
13:53:46:setup_element:INFO: Eye window for uplink 6 : _XXXXXX_________________________________
Data delay found: 23
13:53:46:setup_element:INFO: Eye window for uplink 7 : XXXX________________________________XXXX
Data delay found: 19
13:53:46:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
13:53:46:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
13:53:46:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXXXX_____
Data delay found: 10
13:53:46:setup_element:INFO: Eye window for uplink 11: X______________________________XXXXXXXX_
Data delay found: 15
13:53:46:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXXX_____
Data delay found: 11
13:53:46:setup_element:INFO: Eye window for uplink 13: X_______________________________XXXXXXX_
Data delay found: 16
13:53:46:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXXXX______
Data delay found: 9
13:53:46:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXXXXX___
Data delay found: 12
13:53:46:setup_element:INFO: Setting the data phase to 35 for uplink 0
13:53:46:setup_element:INFO: Setting the data phase to 31 for uplink 1
13:53:46:setup_element:INFO: Setting the data phase to 30 for uplink 4
13:53:46:setup_element:INFO: Setting the data phase to 25 for uplink 5
13:53:46:setup_element:INFO: Setting the data phase to 23 for uplink 6
13:53:46:setup_element:INFO: Setting the data phase to 19 for uplink 7
13:53:46:setup_element:INFO: Setting the data phase to 8 for uplink 8
13:53:46:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:53:46:setup_element:INFO: Setting the data phase to 10 for uplink 10
13:53:46:setup_element:INFO: Setting the data phase to 15 for uplink 11
13:53:46:setup_element:INFO: Setting the data phase to 11 for uplink 12
13:53:46:setup_element:INFO: Setting the data phase to 16 for uplink 13
13:53:46:setup_element:INFO: Setting the data phase to 9 for uplink 14
13:53:46:setup_element:INFO: Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
13:53:46:setup_element:INFO: Beginning SMX ASICs map scan
13:53:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:53:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:53:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:53:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:53:47:uplink:INFO: Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:53:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:53:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:53:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:53:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:53:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 7
13:53:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 6
13:53:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:53:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:53:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:53:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:53:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:53:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:53:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:53:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:53:49:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXXXX
Uplink 7: _______________________________________________________________________XXXXXXXXX
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXXX_
Uplink 11: ______________________________________________________________________XXXXXXXXX_
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 4:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 5:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 6:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 7:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 10:
Optimal Phase: 10
Window Length: 32
Eye Window: ___________________________XXXXXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 30
Eye Window: X______________________________XXXXXXXX_
Uplink 12:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 13:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXX_
Uplink 14:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 15:
Optimal Phase: 12
Window Length: 31
Eye Window: ____________________________XXXXXXXXX___
==============================================OOO==============================================
13:53:49:setup_element:INFO: Performing Elink synchronization
13:53:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:53:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:53:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:53:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:53:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:53:49:uplink:INFO: Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:53:50:febtest:INFO: Init all SMX (CSA): 30
13:54:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:54:02:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 25.1 | 1195.1
13:54:02:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 21.9 | 1195.1
13:54:03:febtest:INFO: 07-02 | XA-000-09-004-003-018-015-10 | 25.1 | 1201.0
13:54:03:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 34.6 | 1159.7
13:54:03:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 31.4 | 1165.6
13:54:03:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 15.6 | 1218.6
13:54:04:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 25.1 | 1195.1
13:54:05:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:54:05:febtest:ERROR: HW addres 7 != 6
13:54:19:ST3_smx:INFO: chip: 1-0 25.062742 C 1206.851500 mV
13:54:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:19:ST3_smx:INFO: Electrons
13:54:19:ST3_smx:INFO: # loops 0
13:54:20:ST3_smx:INFO: # loops 1
13:54:22:ST3_smx:INFO: # loops 2
13:54:24:ST3_smx:INFO: Total # of broken channels: 0
13:54:24:ST3_smx:INFO: List of broken channels: []
13:54:24:ST3_smx:INFO: Total # of broken channels: 0
13:54:24:ST3_smx:INFO: List of broken channels: []
13:54:25:ST3_smx:INFO: chip: 8-1 21.902970 C 1212.728715 mV
13:54:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:25:ST3_smx:INFO: Electrons
13:54:26:ST3_smx:INFO: # loops 0
13:54:27:ST3_smx:INFO: # loops 1
13:54:29:ST3_smx:INFO: # loops 2
13:54:30:ST3_smx:INFO: Total # of broken channels: 0
13:54:30:ST3_smx:INFO: List of broken channels: []
13:54:30:ST3_smx:INFO: Total # of broken channels: 0
13:54:30:ST3_smx:INFO: List of broken channels: []
13:54:32:ST3_smx:INFO: chip: 7-2 25.062742 C 1212.728715 mV
13:54:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:32:ST3_smx:INFO: Electrons
13:54:32:ST3_smx:INFO: # loops 0
13:54:34:ST3_smx:INFO: # loops 1
13:54:35:ST3_smx:INFO: # loops 2
13:54:37:ST3_smx:INFO: Total # of broken channels: 0
13:54:37:ST3_smx:INFO: List of broken channels: []
13:54:37:ST3_smx:INFO: Total # of broken channels: 0
13:54:37:ST3_smx:INFO: List of broken channels: []
13:54:38:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
13:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:38:ST3_smx:INFO: Electrons
13:54:38:ST3_smx:INFO: # loops 0
13:54:40:ST3_smx:INFO: # loops 1
13:54:42:ST3_smx:INFO: # loops 2
13:54:43:ST3_smx:INFO: Total # of broken channels: 0
13:54:43:ST3_smx:INFO: List of broken channels: []
13:54:43:ST3_smx:INFO: Total # of broken channels: 0
13:54:43:ST3_smx:INFO: List of broken channels: []
13:54:45:ST3_smx:INFO: chip: 5-4 31.389742 C 1177.390875 mV
13:54:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:45:ST3_smx:INFO: Electrons
13:54:45:ST3_smx:INFO: # loops 0
13:54:46:ST3_smx:INFO: # loops 1
13:54:48:ST3_smx:INFO: # loops 2
13:54:49:ST3_smx:INFO: Total # of broken channels: 0
13:54:49:ST3_smx:INFO: List of broken channels: []
13:54:49:ST3_smx:INFO: Total # of broken channels: 0
13:54:49:ST3_smx:INFO: List of broken channels: []
13:54:51:ST3_smx:INFO: chip: 12-5 15.590880 C 1236.187875 mV
13:54:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:51:ST3_smx:INFO: Electrons
13:54:51:ST3_smx:INFO: # loops 0
13:54:53:ST3_smx:INFO: # loops 1
13:54:54:ST3_smx:INFO: # loops 2
13:54:56:ST3_smx:INFO: Total # of broken channels: 0
13:54:56:ST3_smx:INFO: List of broken channels: []
13:54:56:ST3_smx:INFO: Total # of broken channels: 0
13:54:56:ST3_smx:INFO: List of broken channels: []
13:54:57:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
13:54:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:57:ST3_smx:INFO: Electrons
13:54:58:ST3_smx:INFO: # loops 0
13:54:59:ST3_smx:INFO: # loops 1
13:55:01:ST3_smx:INFO: # loops 2
13:55:02:ST3_smx:INFO: Total # of broken channels: 0
13:55:02:ST3_smx:INFO: List of broken channels: []
13:55:02:ST3_smx:INFO: Total # of broken channels: 0
13:55:02:ST3_smx:INFO: List of broken channels: []
13:55:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:03:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 25.1 | 1230.3
13:55:03:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 21.9 | 1230.3
13:55:03:febtest:INFO: 07-02 | XA-000-09-004-003-018-015-10 | 25.1 | 1259.6
13:55:03:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 34.6 | 1189.2
13:55:04:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 34.6 | 1201.0
13:55:04:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 15.6 | 1253.7
13:55:04:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 25.1 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_09-13_53_38
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1263| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9070', '1.849', '2.2330', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9590', '1.850', '2.2060', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9020', '1.850', '0.6632', '0.000', '0.0000', '0.000', '0.0000']