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FEB_1263 09.10.24 13:56:12
Info
13:56:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:56:12:ST3_Shared:INFO: FEB-Microcable
13:56:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:56:12:febtest:INFO: Testing FEB with SN 1263
13:56:14:smx_tester:INFO: Scanning setup
13:56:14:elinks:INFO: Disabling clock on downlink 0
13:56:14:elinks:INFO: Disabling clock on downlink 1
13:56:14:elinks:INFO: Disabling clock on downlink 2
13:56:14:elinks:INFO: Disabling clock on downlink 3
13:56:14:elinks:INFO: Disabling clock on downlink 4
13:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:56:14:elinks:INFO: Disabling clock on downlink 0
13:56:14:elinks:INFO: Disabling clock on downlink 1
13:56:14:elinks:INFO: Disabling clock on downlink 2
13:56:14:elinks:INFO: Disabling clock on downlink 3
13:56:14:elinks:INFO: Disabling clock on downlink 4
13:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:56:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:56:14:elinks:INFO: Disabling clock on downlink 0
13:56:14:elinks:INFO: Disabling clock on downlink 1
13:56:14:elinks:INFO: Disabling clock on downlink 2
13:56:14:elinks:INFO: Disabling clock on downlink 3
13:56:14:elinks:INFO: Disabling clock on downlink 4
13:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:56:14:elinks:INFO: Disabling clock on downlink 0
13:56:14:elinks:INFO: Disabling clock on downlink 1
13:56:14:elinks:INFO: Disabling clock on downlink 2
13:56:14:elinks:INFO: Disabling clock on downlink 3
13:56:14:elinks:INFO: Disabling clock on downlink 4
13:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:56:14:elinks:INFO: Disabling clock on downlink 0
13:56:14:elinks:INFO: Disabling clock on downlink 1
13:56:14:elinks:INFO: Disabling clock on downlink 2
13:56:14:elinks:INFO: Disabling clock on downlink 3
13:56:14:elinks:INFO: Disabling clock on downlink 4
13:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:56:14:setup_element:INFO: Scanning clock phase
13:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:56:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:56:15:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:56:15:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
13:56:15:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
13:56:15:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:56:15:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:56:15:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:56:15:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:56:15:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:56:15:setup_element:INFO: Scanning data phases
13:56:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:56:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:56:21:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:56:21:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
13:56:21:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
13:56:21:setup_element:INFO: Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
13:56:21:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
13:56:21:setup_element:INFO: Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
13:56:21:setup_element:INFO: Eye window for uplink 7 : XXXX__________________________________XX
Data delay found: 20
13:56:21:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXX________
Data delay found: 9
13:56:21:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXX____
Data delay found: 13
13:56:21:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
13:56:21:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
13:56:21:setup_element:INFO: Eye window for uplink 12: _______________________________XXXX_____
Data delay found: 12
13:56:21:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
13:56:21:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
13:56:21:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
13:56:21:setup_element:INFO: Setting the data phase to 36 for uplink 0
13:56:21:setup_element:INFO: Setting the data phase to 31 for uplink 1
13:56:21:setup_element:INFO: Setting the data phase to 30 for uplink 4
13:56:21:setup_element:INFO: Setting the data phase to 26 for uplink 5
13:56:21:setup_element:INFO: Setting the data phase to 24 for uplink 6
13:56:21:setup_element:INFO: Setting the data phase to 20 for uplink 7
13:56:21:setup_element:INFO: Setting the data phase to 9 for uplink 8
13:56:21:setup_element:INFO: Setting the data phase to 13 for uplink 9
13:56:21:setup_element:INFO: Setting the data phase to 12 for uplink 10
13:56:21:setup_element:INFO: Setting the data phase to 15 for uplink 11
13:56:21:setup_element:INFO: Setting the data phase to 12 for uplink 12
13:56:21:setup_element:INFO: Setting the data phase to 15 for uplink 13
13:56:21:setup_element:INFO: Setting the data phase to 11 for uplink 14
13:56:21:setup_element:INFO: Setting the data phase to 13 for uplink 15
==============================================OOO==============================================
13:56:21:setup_element:INFO: Beginning SMX ASICs map scan
13:56:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:56:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:56:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:56:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:56:21:uplink:INFO: Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:56:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:56:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:56:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:56:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:56:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 7
13:56:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 6
13:56:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:56:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:56:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:56:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:56:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:56:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:56:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:56:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:56:24:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: ________________________________________________________________________________
Uplink 7: ________________________________________________________________________________
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 4:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 5:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 6:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 7:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 8:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 9:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
==============================================OOO==============================================
13:56:24:setup_element:INFO: Performing Elink synchronization
13:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:56:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:56:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:56:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:56:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:56:24:uplink:INFO: Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:56:24:febtest:INFO: Init all SMX (CSA): 30
13:56:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:56:36:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 25.1 | 1195.1
13:56:37:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 21.9 | 1195.1
13:56:37:febtest:INFO: 07-02 | XA-000-09-004-003-018-015-10 | 25.1 | 1201.0
13:56:37:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 34.6 | 1153.7
13:56:37:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 34.6 | 1171.5
13:56:38:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 15.6 | 1218.6
13:56:38:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 25.1 | 1195.1
13:56:39:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:56:40:febtest:ERROR: HW addres 7 != 6
13:56:44:ST3_smx:INFO: chip: 1-0 25.062742 C 1206.851500 mV
13:56:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:44:ST3_smx:INFO: Electrons
13:56:44:ST3_smx:INFO: # loops 0
13:56:46:ST3_smx:INFO: # loops 1
13:56:47:ST3_smx:INFO: # loops 2
13:56:49:ST3_smx:INFO: Total # of broken channels: 0
13:56:49:ST3_smx:INFO: List of broken channels: []
13:56:49:ST3_smx:INFO: Total # of broken channels: 0
13:56:49:ST3_smx:INFO: List of broken channels: []
13:56:51:ST3_smx:INFO: chip: 8-1 21.902970 C 1206.851500 mV
13:56:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:51:ST3_smx:INFO: Electrons
13:56:51:ST3_smx:INFO: # loops 0
13:56:52:ST3_smx:INFO: # loops 1
13:56:54:ST3_smx:INFO: # loops 2
13:56:55:ST3_smx:INFO: Total # of broken channels: 0
13:56:55:ST3_smx:INFO: List of broken channels: []
13:56:55:ST3_smx:INFO: Total # of broken channels: 0
13:56:55:ST3_smx:INFO: List of broken channels: []
13:56:57:ST3_smx:INFO: chip: 7-2 25.062742 C 1212.728715 mV
13:56:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:57:ST3_smx:INFO: Electrons
13:56:57:ST3_smx:INFO: # loops 0
13:56:59:ST3_smx:INFO: # loops 1
13:57:00:ST3_smx:INFO: # loops 2
13:57:02:ST3_smx:INFO: Total # of broken channels: 0
13:57:02:ST3_smx:INFO: List of broken channels: []
13:57:02:ST3_smx:INFO: Total # of broken channels: 4
13:57:02:ST3_smx:INFO: List of broken channels: [13, 15, 17, 19]
13:57:03:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
13:57:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:04:ST3_smx:INFO: Electrons
13:57:04:ST3_smx:INFO: # loops 0
13:57:05:ST3_smx:INFO: # loops 1
13:57:07:ST3_smx:INFO: # loops 2
13:57:08:ST3_smx:INFO: Total # of broken channels: 0
13:57:08:ST3_smx:INFO: List of broken channels: []
13:57:08:ST3_smx:INFO: Total # of broken channels: 0
13:57:08:ST3_smx:INFO: List of broken channels: []
13:57:10:ST3_smx:INFO: chip: 5-4 34.556970 C 1177.390875 mV
13:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:10:ST3_smx:INFO: Electrons
13:57:10:ST3_smx:INFO: # loops 0
13:57:12:ST3_smx:INFO: # loops 1
13:57:13:ST3_smx:INFO: # loops 2
13:57:14:ST3_smx:INFO: Total # of broken channels: 0
13:57:14:ST3_smx:INFO: List of broken channels: []
13:57:14:ST3_smx:INFO: Total # of broken channels: 0
13:57:14:ST3_smx:INFO: List of broken channels: []
13:57:16:ST3_smx:INFO: chip: 12-5 15.590880 C 1230.330540 mV
13:57:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:16:ST3_smx:INFO: Electrons
13:57:16:ST3_smx:INFO: # loops 0
13:57:18:ST3_smx:INFO: # loops 1
13:57:19:ST3_smx:INFO: # loops 2
13:57:21:ST3_smx:INFO: Total # of broken channels: 0
13:57:21:ST3_smx:INFO: List of broken channels: []
13:57:21:ST3_smx:INFO: Total # of broken channels: 0
13:57:21:ST3_smx:INFO: List of broken channels: []
13:57:23:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
13:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:23:ST3_smx:INFO: Electrons
13:57:23:ST3_smx:INFO: # loops 0
13:57:24:ST3_smx:INFO: # loops 1
13:57:26:ST3_smx:INFO: # loops 2
13:57:27:ST3_smx:INFO: Total # of broken channels: 1
13:57:27:ST3_smx:INFO: List of broken channels: [125]
13:57:27:ST3_smx:INFO: Total # of broken channels: 9
13:57:27:ST3_smx:INFO: List of broken channels: [103, 105, 107, 109, 111, 113, 123, 125, 127]
13:57:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:57:28:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 28.2 | 1230.3
13:57:28:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 25.1 | 1230.3
13:57:28:febtest:INFO: 07-02 | XA-000-09-004-003-018-015-10 | 25.1 | 1259.6
13:57:28:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 37.7 | 1189.2
13:57:29:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 34.6 | 1195.1
13:57:29:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 18.7 | 1253.7
13:57:29:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 25.1 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_09-13_56_12
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1263| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9790', '1.849', '2.2720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9420', '1.850', '2.3760', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9090', '1.850', '0.6653', '0.000', '0.0000', '0.000', '0.0000']