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FEB_1263 09.10.24 14:35:55
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14:35:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:35:55:ST3_Shared:INFO: FEB-Microcable
14:35:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:35:55:febtest:INFO: Testing FEB with SN 1263
14:35:57:smx_tester:INFO: Scanning setup
14:35:57:elinks:INFO: Disabling clock on downlink 0
14:35:57:elinks:INFO: Disabling clock on downlink 1
14:35:57:elinks:INFO: Disabling clock on downlink 2
14:35:57:elinks:INFO: Disabling clock on downlink 3
14:35:57:elinks:INFO: Disabling clock on downlink 4
14:35:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:35:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:35:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:35:57:elinks:INFO: Disabling clock on downlink 0
14:35:57:elinks:INFO: Disabling clock on downlink 1
14:35:57:elinks:INFO: Disabling clock on downlink 2
14:35:57:elinks:INFO: Disabling clock on downlink 3
14:35:57:elinks:INFO: Disabling clock on downlink 4
14:35:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:35:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:35:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:35:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:35:57:elinks:INFO: Disabling clock on downlink 0
14:35:57:elinks:INFO: Disabling clock on downlink 1
14:35:57:elinks:INFO: Disabling clock on downlink 2
14:35:57:elinks:INFO: Disabling clock on downlink 3
14:35:57:elinks:INFO: Disabling clock on downlink 4
14:35:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:35:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:35:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:35:57:elinks:INFO: Disabling clock on downlink 0
14:35:57:elinks:INFO: Disabling clock on downlink 1
14:35:57:elinks:INFO: Disabling clock on downlink 2
14:35:57:elinks:INFO: Disabling clock on downlink 3
14:35:57:elinks:INFO: Disabling clock on downlink 4
14:35:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:35:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:35:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:35:58:elinks:INFO: Disabling clock on downlink 0
14:35:58:elinks:INFO: Disabling clock on downlink 1
14:35:58:elinks:INFO: Disabling clock on downlink 2
14:35:58:elinks:INFO: Disabling clock on downlink 3
14:35:58:elinks:INFO: Disabling clock on downlink 4
14:35:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:35:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:35:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:35:58:setup_element:INFO: Scanning clock phase
14:35:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:35:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:35:58:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:35:58:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:35:58:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:35:58:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:35:58:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:35:58:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:35:58:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:35:58:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:35:58:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
14:35:58:setup_element:INFO: Scanning data phases
14:35:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:35:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:36:04:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:36:04:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXXX______________________
Data delay found: 34
14:36:04:setup_element:INFO: Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
14:36:04:setup_element:INFO: Eye window for uplink 2 : _________XXXXXXX________________________
Data delay found: 32
14:36:04:setup_element:INFO: Eye window for uplink 3 : ______XXXXXXX___________________________
Data delay found: 29
14:36:04:setup_element:INFO: Eye window for uplink 4 : ______XXXXXXXX__________________________
Data delay found: 29
14:36:04:setup_element:INFO: Eye window for uplink 5 : ___XXXXXXX______________________________
Data delay found: 26
14:36:04:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXXX________
Data delay found: 8
14:36:04:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
14:36:04:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXXXXX____
Data delay found: 10
14:36:04:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXXXXX_
Data delay found: 14
14:36:04:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXXX_____
Data delay found: 11
14:36:04:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXXXXX_
Data delay found: 14
14:36:04:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXXXXX_____
Data delay found: 10
14:36:04:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXXXXX___
Data delay found: 12
14:36:04:setup_element:INFO: Setting the data phase to 34 for uplink 0
14:36:04:setup_element:INFO: Setting the data phase to 30 for uplink 1
14:36:04:setup_element:INFO: Setting the data phase to 32 for uplink 2
14:36:04:setup_element:INFO: Setting the data phase to 29 for uplink 3
14:36:04:setup_element:INFO: Setting the data phase to 29 for uplink 4
14:36:04:setup_element:INFO: Setting the data phase to 26 for uplink 5
14:36:04:setup_element:INFO: Setting the data phase to 8 for uplink 8
14:36:04:setup_element:INFO: Setting the data phase to 13 for uplink 9
14:36:04:setup_element:INFO: Setting the data phase to 10 for uplink 10
14:36:04:setup_element:INFO: Setting the data phase to 14 for uplink 11
14:36:04:setup_element:INFO: Setting the data phase to 11 for uplink 12
14:36:04:setup_element:INFO: Setting the data phase to 14 for uplink 13
14:36:04:setup_element:INFO: Setting the data phase to 10 for uplink 14
14:36:04:setup_element:INFO: Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
14:36:04:setup_element:INFO: Beginning SMX ASICs map scan
14:36:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:36:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:36:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:36:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:36:04:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15]
14:36:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:36:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:36:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:36:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:36:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:36:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:36:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:36:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:36:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:36:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:36:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:36:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:36:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:36:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:36:06:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXXXXX_
Uplink 3: ______________________________________________________________________XXXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXXX_
Uplink 11: ______________________________________________________________________XXXXXXXXX_
Uplink 12: _____________________________________________________________________XXXXXXXXX__
Uplink 13: _____________________________________________________________________XXXXXXXXX__
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 2:
Optimal Phase: 32
Window Length: 33
Eye Window: _________XXXXXXX________________________
Uplink 3:
Optimal Phase: 29
Window Length: 33
Eye Window: ______XXXXXXX___________________________
Uplink 4:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 5:
Optimal Phase: 26
Window Length: 33
Eye Window: ___XXXXXXX______________________________
Uplink 8:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 9:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 10:
Optimal Phase: 10
Window Length: 30
Eye Window: __________________________XXXXXXXXXX____
Uplink 11:
Optimal Phase: 14
Window Length: 31
Eye Window: ______________________________XXXXXXXXX_
Uplink 12:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 13:
Optimal Phase: 14
Window Length: 32
Eye Window: _______________________________XXXXXXXX_
Uplink 14:
Optimal Phase: 10
Window Length: 31
Eye Window: __________________________XXXXXXXXX_____
Uplink 15:
Optimal Phase: 12
Window Length: 31
Eye Window: ____________________________XXXXXXXXX___
==============================================OOO==============================================
14:36:06:setup_element:INFO: Performing Elink synchronization
14:36:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:36:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:36:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:36:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:36:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:36:07:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
14:36:07:febtest:INFO: Init all SMX (CSA): 30
14:36:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:36:20:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 28.2 | 1195.1
14:36:20:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 25.1 | 1195.1
14:36:20:febtest:INFO: 03-02 | XA-000-09-004-003-014-020-11 | 28.2 | 1189.2
14:36:21:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 34.6 | 1153.7
14:36:21:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 34.6 | 1165.6
14:36:21:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 18.7 | 1218.6
14:36:21:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 25.1 | 1195.1
14:36:22:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:36:23:febtest:ERROR: HW addres 7 != 6
14:36:28:ST3_smx:INFO: chip: 1-0 25.062742 C 1206.851500 mV
14:36:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:28:ST3_smx:INFO: Electrons
14:36:28:ST3_smx:INFO: # loops 0
14:36:29:ST3_smx:INFO: # loops 1
14:36:31:ST3_smx:INFO: # loops 2
14:36:32:ST3_smx:INFO: Total # of broken channels: 0
14:36:33:ST3_smx:INFO: List of broken channels: []
14:36:33:ST3_smx:INFO: Total # of broken channels: 0
14:36:33:ST3_smx:INFO: List of broken channels: []
14:36:34:ST3_smx:INFO: chip: 8-1 25.062742 C 1206.851500 mV
14:36:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:34:ST3_smx:INFO: Electrons
14:36:34:ST3_smx:INFO: # loops 0
14:36:36:ST3_smx:INFO: # loops 1
14:36:38:ST3_smx:INFO: # loops 2
14:36:39:ST3_smx:INFO: Total # of broken channels: 0
14:36:39:ST3_smx:INFO: List of broken channels: []
14:36:39:ST3_smx:INFO: Total # of broken channels: 0
14:36:39:ST3_smx:INFO: List of broken channels: []
14:36:41:ST3_smx:INFO: chip: 3-2 28.225000 C 1200.969315 mV
14:36:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:41:ST3_smx:INFO: Electrons
14:36:41:ST3_smx:INFO: # loops 0
14:36:43:ST3_smx:INFO: # loops 1
14:36:44:ST3_smx:INFO: # loops 2
14:36:46:ST3_smx:INFO: Total # of broken channels: 0
14:36:46:ST3_smx:INFO: List of broken channels: []
14:36:46:ST3_smx:INFO: Total # of broken channels: 6
14:36:46:ST3_smx:INFO: List of broken channels: [28, 30, 32, 34, 36, 38]
14:36:47:ST3_smx:INFO: chip: 10-3 37.726682 C 1165.571835 mV
14:36:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:48:ST3_smx:INFO: Electrons
14:36:48:ST3_smx:INFO: # loops 0
14:36:49:ST3_smx:INFO: # loops 1
14:36:51:ST3_smx:INFO: # loops 2
14:36:52:ST3_smx:INFO: Total # of broken channels: 0
14:36:52:ST3_smx:INFO: List of broken channels: []
14:36:52:ST3_smx:INFO: Total # of broken channels: 8
14:36:52:ST3_smx:INFO: List of broken channels: [113, 115, 117, 119, 121, 123, 125, 127]
14:36:54:ST3_smx:INFO: chip: 5-4 34.556970 C 1177.390875 mV
14:36:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:36:54:ST3_smx:INFO: Electrons
14:36:54:ST3_smx:INFO: # loops 0
14:36:56:ST3_smx:INFO: # loops 1
14:36:57:ST3_smx:INFO: # loops 2
14:36:59:ST3_smx:INFO: Total # of broken channels: 0
14:36:59:ST3_smx:INFO: List of broken channels: []
14:36:59:ST3_smx:INFO: Total # of broken channels: 0
14:36:59:ST3_smx:INFO: List of broken channels: []
14:37:01:ST3_smx:INFO: chip: 12-5 18.745682 C 1236.187875 mV
14:37:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:01:ST3_smx:INFO: Electrons
14:37:01:ST3_smx:INFO: # loops 0
14:37:02:ST3_smx:INFO: # loops 1
14:37:04:ST3_smx:INFO: # loops 2
14:37:06:ST3_smx:INFO: Total # of broken channels: 1
14:37:06:ST3_smx:INFO: List of broken channels: [21]
14:37:06:ST3_smx:INFO: Total # of broken channels: 13
14:37:06:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 117, 119]
14:37:07:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
14:37:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:37:07:ST3_smx:INFO: Electrons
14:37:07:ST3_smx:INFO: # loops 0
14:37:09:ST3_smx:INFO: # loops 1
14:37:11:ST3_smx:INFO: # loops 2
14:37:12:ST3_smx:INFO: Total # of broken channels: 0
14:37:12:ST3_smx:INFO: List of broken channels: []
14:37:12:ST3_smx:INFO: Total # of broken channels: 0
14:37:12:ST3_smx:INFO: List of broken channels: []
14:37:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:37:13:febtest:INFO: 01-00 | XA-000-09-004-004-013-024-15 | 28.2 | 1236.2
14:37:13:febtest:INFO: 08-01 | XA-000-09-004-003-010-019-13 | 25.1 | 1230.3
14:37:13:febtest:INFO: 03-02 | XA-000-09-004-003-014-020-11 | 28.2 | 1218.6
14:37:13:febtest:INFO: 10-03 | XA-000-09-004-003-015-019-06 | 37.7 | 1189.2
14:37:14:febtest:INFO: 05-04 | XA-000-09-004-003-013-019-05 | 34.6 | 1201.0
14:37:14:febtest:INFO: 12-05 | XA-000-09-004-003-014-019-11 | 18.7 | 1253.7
14:37:14:febtest:INFO: 14-07 | XA-000-09-004-003-014-018-11 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_09-14_35_55
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1263| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.448', '1.9270', '1.849', '2.2370', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9560', '1.850', '2.3020', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9210', '1.850', '0.7624', '0.000', '0.0000', '0.000', '0.0000']
Comment.txt
Addr 0x2 recovered. ASIC 0x6 is broken chip XA-000-09-004-003-018-015-10