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FEB_1269 30.10.24 08:57:55
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08:57:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:57:55:ST3_Shared:INFO: FEB-Sensor
08:57:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:58:16:ST3_ModuleSelector:INFO: M3DR2B3000123A2
08:58:16:ST3_ModuleSelector:INFO: 05073
08:58:16:febtest:INFO: Testing FEB with SN 1269
08:58:17:smx_tester:INFO: Scanning setup
08:58:17:elinks:INFO: Disabling clock on downlink 0
08:58:17:elinks:INFO: Disabling clock on downlink 1
08:58:17:elinks:INFO: Disabling clock on downlink 2
08:58:17:elinks:INFO: Disabling clock on downlink 3
08:58:17:elinks:INFO: Disabling clock on downlink 4
08:58:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:58:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:58:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:58:17:elinks:INFO: Disabling clock on downlink 0
08:58:17:elinks:INFO: Disabling clock on downlink 1
08:58:17:elinks:INFO: Disabling clock on downlink 2
08:58:17:elinks:INFO: Disabling clock on downlink 3
08:58:17:elinks:INFO: Disabling clock on downlink 4
08:58:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:58:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:58:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:58:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:58:17:elinks:INFO: Disabling clock on downlink 0
08:58:17:elinks:INFO: Disabling clock on downlink 1
08:58:17:elinks:INFO: Disabling clock on downlink 2
08:58:18:elinks:INFO: Disabling clock on downlink 3
08:58:18:elinks:INFO: Disabling clock on downlink 4
08:58:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:58:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:58:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:58:18:elinks:INFO: Disabling clock on downlink 0
08:58:18:elinks:INFO: Disabling clock on downlink 1
08:58:18:elinks:INFO: Disabling clock on downlink 2
08:58:18:elinks:INFO: Disabling clock on downlink 3
08:58:18:elinks:INFO: Disabling clock on downlink 4
08:58:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:58:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:58:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:58:18:elinks:INFO: Disabling clock on downlink 0
08:58:18:elinks:INFO: Disabling clock on downlink 1
08:58:18:elinks:INFO: Disabling clock on downlink 2
08:58:18:elinks:INFO: Disabling clock on downlink 3
08:58:18:elinks:INFO: Disabling clock on downlink 4
08:58:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:58:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:58:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:58:18:setup_element:INFO: Scanning clock phase
08:58:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:58:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:58:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:58:18:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:58:18:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:58:18:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:58:18:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:58:18:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:58:18:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:58:18:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:58:18:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:58:18:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:58:18:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:58:19:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:58:19:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:58:19:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:58:19:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:58:19:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:58:19:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:58:19:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
08:58:19:setup_element:INFO: Scanning data phases
08:58:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:58:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:58:24:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:58:24:setup_element:INFO: Eye window for uplink 0 : __________XXXXXXXXX_____________________
Data delay found: 34
08:58:24:setup_element:INFO: Eye window for uplink 1 : _____XXXXXXXXX__________________________
Data delay found: 29
08:58:24:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXXXX___________________________
Data delay found: 28
08:58:24:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________
Data delay found: 25
08:58:24:setup_element:INFO: Eye window for uplink 4 : ____XXXXXX______________________________
Data delay found: 26
08:58:24:setup_element:INFO: Eye window for uplink 5 : XXXXX_________________________________XX
Data delay found: 21
08:58:24:setup_element:INFO: Eye window for uplink 6 : XXXXXXX________________________________X
Data delay found: 22
08:58:24:setup_element:INFO: Eye window for uplink 7 : XXXX_______________________________XXXXX
Data delay found: 19
08:58:24:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
08:58:24:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
08:58:24:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXXXX_____
Data delay found: 10
08:58:24:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXXX__
Data delay found: 14
08:58:24:setup_element:INFO: Eye window for uplink 12: __________________________XXXXXXXX______
Data delay found: 9
08:58:24:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXXXXXX_
Data delay found: 13
08:58:24:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXXX______
Data delay found: 10
08:58:24:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXXXX__
Data delay found: 13
08:58:24:setup_element:INFO: Setting the data phase to 34 for uplink 0
08:58:24:setup_element:INFO: Setting the data phase to 29 for uplink 1
08:58:24:setup_element:INFO: Setting the data phase to 28 for uplink 2
08:58:24:setup_element:INFO: Setting the data phase to 25 for uplink 3
08:58:24:setup_element:INFO: Setting the data phase to 26 for uplink 4
08:58:24:setup_element:INFO: Setting the data phase to 21 for uplink 5
08:58:24:setup_element:INFO: Setting the data phase to 22 for uplink 6
08:58:24:setup_element:INFO: Setting the data phase to 19 for uplink 7
08:58:24:setup_element:INFO: Setting the data phase to 7 for uplink 8
08:58:24:setup_element:INFO: Setting the data phase to 11 for uplink 9
08:58:24:setup_element:INFO: Setting the data phase to 10 for uplink 10
08:58:24:setup_element:INFO: Setting the data phase to 14 for uplink 11
08:58:24:setup_element:INFO: Setting the data phase to 9 for uplink 12
08:58:24:setup_element:INFO: Setting the data phase to 13 for uplink 13
08:58:24:setup_element:INFO: Setting the data phase to 10 for uplink 14
08:58:24:setup_element:INFO: Setting the data phase to 13 for uplink 15
==============================================OOO==============================================
08:58:24:setup_element:INFO: Beginning SMX ASICs map scan
08:58:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:58:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:58:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:58:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:58:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:58:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:58:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:58:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:58:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:58:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:58:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:58:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:58:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:58:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:58:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:58:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:58:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:58:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:58:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:58:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:58:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:58:27:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: ______________________________________________________________________XXXXXXXX__
Uplink 3: ______________________________________________________________________XXXXXXXX__
Uplink 4: _____________________________________________________________________XXXXXXXXX__
Uplink 5: _____________________________________________________________________XXXXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXXXX_
Uplink 13: ______________________________________________________________________XXXXXXXXX_
Uplink 14: ______________________________________________________________________XXXXXXXX__
Uplink 15: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 31
Eye Window: __________XXXXXXXXX_____________________
Uplink 1:
Optimal Phase: 29
Window Length: 31
Eye Window: _____XXXXXXXXX__________________________
Uplink 2:
Optimal Phase: 28
Window Length: 31
Eye Window: ____XXXXXXXXX___________________________
Uplink 3:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 6:
Optimal Phase: 22
Window Length: 32
Eye Window: XXXXXXX________________________________X
Uplink 7:
Optimal Phase: 19
Window Length: 31
Eye Window: XXXX_______________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 9:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 10:
Optimal Phase: 10
Window Length: 32
Eye Window: ___________________________XXXXXXXX_____
Uplink 11:
Optimal Phase: 14
Window Length: 33
Eye Window: _______________________________XXXXXXX__
Uplink 12:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 13:
Optimal Phase: 13
Window Length: 30
Eye Window: _____________________________XXXXXXXXXX_
Uplink 14:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 31
Eye Window: _____________________________XXXXXXXXX__
==============================================OOO==============================================
08:58:27:setup_element:INFO: Performing Elink synchronization
08:58:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:58:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:58:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:58:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:58:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:58:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:58:28:febtest:INFO: Init all SMX (CSA): 30
08:58:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:58:42:febtest:INFO: 01-00 | XA-000-09-004-004-013-010-08 | 15.6 | 1201.0
08:58:42:febtest:INFO: 08-01 | XA-000-09-004-004-014-010-06 | 21.9 | 1189.2
08:58:43:febtest:INFO: 03-02 | XA-000-09-004-004-013-012-08 | 28.2 | 1171.5
08:58:43:febtest:INFO: 10-03 | XA-000-09-004-004-015-010-11 | 31.4 | 1159.7
08:58:43:febtest:INFO: 05-04 | XA-000-09-004-004-015-012-11 | 34.6 | 1153.7
08:58:43:febtest:INFO: 12-05 | XA-000-09-004-004-015-006-11 | 18.7 | 1201.0
08:58:43:febtest:INFO: 07-06 | XA-000-09-004-004-015-011-11 | 25.1 | 1177.4
08:58:44:febtest:INFO: 14-07 | XA-000-09-004-004-014-006-06 | 15.6 | 1212.7
08:58:45:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:58:47:ST3_smx:INFO: chip: 1-0 15.590880 C 1218.600960 mV
08:58:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:47:ST3_smx:INFO: Electrons
08:58:47:ST3_smx:INFO: # loops 0
08:58:49:ST3_smx:INFO: # loops 1
08:58:50:ST3_smx:INFO: # loops 2
08:58:52:ST3_smx:INFO: # loops 3
08:58:53:ST3_smx:INFO: # loops 4
08:58:55:ST3_smx:INFO: Total # of broken channels: 0
08:58:55:ST3_smx:INFO: List of broken channels: []
08:58:55:ST3_smx:INFO: Total # of broken channels: 0
08:58:55:ST3_smx:INFO: List of broken channels: []
08:58:57:ST3_smx:INFO: chip: 8-1 21.902970 C 1206.851500 mV
08:58:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:57:ST3_smx:INFO: Electrons
08:58:57:ST3_smx:INFO: # loops 0
08:58:58:ST3_smx:INFO: # loops 1
08:59:00:ST3_smx:INFO: # loops 2
08:59:02:ST3_smx:INFO: # loops 3
08:59:03:ST3_smx:INFO: # loops 4
08:59:05:ST3_smx:INFO: Total # of broken channels: 0
08:59:05:ST3_smx:INFO: List of broken channels: []
08:59:05:ST3_smx:INFO: Total # of broken channels: 0
08:59:05:ST3_smx:INFO: List of broken channels: []
08:59:07:ST3_smx:INFO: chip: 3-2 28.225000 C 1183.292940 mV
08:59:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:07:ST3_smx:INFO: Electrons
08:59:07:ST3_smx:INFO: # loops 0
08:59:08:ST3_smx:INFO: # loops 1
08:59:10:ST3_smx:INFO: # loops 2
08:59:11:ST3_smx:INFO: # loops 3
08:59:13:ST3_smx:INFO: # loops 4
08:59:14:ST3_smx:INFO: Total # of broken channels: 0
08:59:14:ST3_smx:INFO: List of broken channels: []
08:59:14:ST3_smx:INFO: Total # of broken channels: 0
08:59:14:ST3_smx:INFO: List of broken channels: []
08:59:16:ST3_smx:INFO: chip: 10-3 31.389742 C 1171.483840 mV
08:59:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:16:ST3_smx:INFO: Electrons
08:59:16:ST3_smx:INFO: # loops 0
08:59:18:ST3_smx:INFO: # loops 1
08:59:20:ST3_smx:INFO: # loops 2
08:59:21:ST3_smx:INFO: # loops 3
08:59:23:ST3_smx:INFO: # loops 4
08:59:25:ST3_smx:INFO: Total # of broken channels: 0
08:59:25:ST3_smx:INFO: List of broken channels: []
08:59:25:ST3_smx:INFO: Total # of broken channels: 0
08:59:25:ST3_smx:INFO: List of broken channels: []
08:59:27:ST3_smx:INFO: chip: 5-4 34.556970 C 1165.571835 mV
08:59:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:27:ST3_smx:INFO: Electrons
08:59:27:ST3_smx:INFO: # loops 0
08:59:28:ST3_smx:INFO: # loops 1
08:59:30:ST3_smx:INFO: # loops 2
08:59:31:ST3_smx:INFO: # loops 3
08:59:33:ST3_smx:INFO: # loops 4
08:59:35:ST3_smx:INFO: Total # of broken channels: 0
08:59:35:ST3_smx:INFO: List of broken channels: []
08:59:35:ST3_smx:INFO: Total # of broken channels: 0
08:59:35:ST3_smx:INFO: List of broken channels: []
08:59:36:ST3_smx:INFO: chip: 12-5 18.745682 C 1212.728715 mV
08:59:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:36:ST3_smx:INFO: Electrons
08:59:36:ST3_smx:INFO: # loops 0
08:59:38:ST3_smx:INFO: # loops 1
08:59:40:ST3_smx:INFO: # loops 2
08:59:41:ST3_smx:INFO: # loops 3
08:59:43:ST3_smx:INFO: # loops 4
08:59:44:ST3_smx:INFO: Total # of broken channels: 0
08:59:44:ST3_smx:INFO: List of broken channels: []
08:59:44:ST3_smx:INFO: Total # of broken channels: 0
08:59:44:ST3_smx:INFO: List of broken channels: []
08:59:46:ST3_smx:INFO: chip: 7-6 28.225000 C 1189.190035 mV
08:59:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:46:ST3_smx:INFO: Electrons
08:59:46:ST3_smx:INFO: # loops 0
08:59:48:ST3_smx:INFO: # loops 1
08:59:49:ST3_smx:INFO: # loops 2
08:59:51:ST3_smx:INFO: # loops 3
08:59:52:ST3_smx:INFO: # loops 4
08:59:54:ST3_smx:INFO: Total # of broken channels: 0
08:59:54:ST3_smx:INFO: List of broken channels: []
08:59:54:ST3_smx:INFO: Total # of broken channels: 0
08:59:54:ST3_smx:INFO: List of broken channels: []
08:59:56:ST3_smx:INFO: chip: 14-7 18.745682 C 1218.600960 mV
08:59:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:56:ST3_smx:INFO: Electrons
08:59:56:ST3_smx:INFO: # loops 0
08:59:57:ST3_smx:INFO: # loops 1
08:59:59:ST3_smx:INFO: # loops 2
09:00:00:ST3_smx:INFO: # loops 3
09:00:02:ST3_smx:INFO: # loops 4
09:00:04:ST3_smx:INFO: Total # of broken channels: 0
09:00:04:ST3_smx:INFO: List of broken channels: []
09:00:04:ST3_smx:INFO: Total # of broken channels: 1
09:00:04:ST3_smx:INFO: List of broken channels: [86]
09:00:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:00:04:febtest:INFO: 01-00 | XA-000-09-004-004-013-010-08 | 18.7 | 1236.2
09:00:04:febtest:INFO: 08-01 | XA-000-09-004-004-014-010-06 | 25.1 | 1224.5
09:00:05:febtest:INFO: 03-02 | XA-000-09-004-004-013-012-08 | 28.2 | 1201.0
09:00:05:febtest:INFO: 10-03 | XA-000-09-004-004-015-010-11 | 31.4 | 1189.2
09:00:05:febtest:INFO: 05-04 | XA-000-09-004-004-015-012-11 | 34.6 | 1189.2
09:00:05:febtest:INFO: 12-05 | XA-000-09-004-004-015-006-11 | 21.9 | 1230.3
09:00:06:febtest:INFO: 07-06 | XA-000-09-004-004-015-011-11 | 28.2 | 1212.7
09:00:06:febtest:INFO: 14-07 | XA-000-09-004-004-014-006-06 | 18.7 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_30-08_57_55
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1269| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 05073 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M3DR2B3000123A2
LADDER_NAME: L3DR200012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5150', '1.849', '2.1490', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9920', '1.850', '2.3210', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.5289', '0.000', '0.0000', '0.000', '0.0000']