09:01:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:16:ST3_Shared:INFO:	                       FEB-Microcable                       
09:01:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:16:febtest:INFO:	Testing FEB with SN 1269
09:01:17:smx_tester:INFO:	Scanning setup
09:01:17:elinks:INFO:	Disabling clock on downlink 0
09:01:17:elinks:INFO:	Disabling clock on downlink 1
09:01:17:elinks:INFO:	Disabling clock on downlink 2
09:01:17:elinks:INFO:	Disabling clock on downlink 3
09:01:17:elinks:INFO:	Disabling clock on downlink 4
09:01:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:01:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:18:elinks:INFO:	Disabling clock on downlink 0
09:01:18:elinks:INFO:	Disabling clock on downlink 1
09:01:18:elinks:INFO:	Disabling clock on downlink 2
09:01:18:elinks:INFO:	Disabling clock on downlink 3
09:01:18:elinks:INFO:	Disabling clock on downlink 4
09:01:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:01:18:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:01:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:18:elinks:INFO:	Disabling clock on downlink 0
09:01:18:elinks:INFO:	Disabling clock on downlink 1
09:01:18:elinks:INFO:	Disabling clock on downlink 2
09:01:18:elinks:INFO:	Disabling clock on downlink 3
09:01:18:elinks:INFO:	Disabling clock on downlink 4
09:01:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:18:elinks:INFO:	Disabling clock on downlink 0
09:01:18:elinks:INFO:	Disabling clock on downlink 1
09:01:18:elinks:INFO:	Disabling clock on downlink 2
09:01:18:elinks:INFO:	Disabling clock on downlink 3
09:01:18:elinks:INFO:	Disabling clock on downlink 4
09:01:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:01:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:18:elinks:INFO:	Disabling clock on downlink 0
09:01:18:elinks:INFO:	Disabling clock on downlink 1
09:01:18:elinks:INFO:	Disabling clock on downlink 2
09:01:18:elinks:INFO:	Disabling clock on downlink 3
09:01:18:elinks:INFO:	Disabling clock on downlink 4
09:01:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:01:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:01:18:setup_element:INFO:	Scanning clock phase
09:01:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:19:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:01:19:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:01:19:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:01:19:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:01:19:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:01:19:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:01:19:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:01:19:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:01:19:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:01:19:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:01:19:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:01:19:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:01:19:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:01:19:setup_element:INFO:	Scanning data phases
09:01:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:24:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:01:24:setup_element:INFO:	Eye window for uplink 0 : __________XXXXXXXXXX____________________
Data delay found: 34
09:01:24:setup_element:INFO:	Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
09:01:24:setup_element:INFO:	Eye window for uplink 2 : _____XXXXXXXX___________________________
Data delay found: 28
09:01:24:setup_element:INFO:	Eye window for uplink 3 : __XXXXXXXX______________________________
Data delay found: 25
09:01:24:setup_element:INFO:	Eye window for uplink 4 : ____XXXXXX______________________________
Data delay found: 26
09:01:24:setup_element:INFO:	Eye window for uplink 5 : XXXXXX_________________________________X
Data delay found: 22
09:01:24:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXX_______________________________X
Data delay found: 23
09:01:24:setup_element:INFO:	Eye window for uplink 7 : XXXX_______________________________XXXXX
Data delay found: 19
09:01:24:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
09:01:24:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
09:01:24:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXXXXX_____
Data delay found: 10
09:01:24:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
09:01:24:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXXXXX_____
Data delay found: 10
09:01:24:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXXXXXXX_
Data delay found: 13
09:01:24:setup_element:INFO:	Eye window for uplink 14: ___________________________XXXXXXXX_____
Data delay found: 10
09:01:24:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXXXXX___
Data delay found: 12
09:01:24:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:01:24:setup_element:INFO:	Setting the data phase to 30 for uplink 1
09:01:24:setup_element:INFO:	Setting the data phase to 28 for uplink 2
09:01:24:setup_element:INFO:	Setting the data phase to 25 for uplink 3
09:01:24:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:01:24:setup_element:INFO:	Setting the data phase to 22 for uplink 5
09:01:24:setup_element:INFO:	Setting the data phase to 23 for uplink 6
09:01:24:setup_element:INFO:	Setting the data phase to 19 for uplink 7
09:01:24:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:01:24:setup_element:INFO:	Setting the data phase to 13 for uplink 9
09:01:24:setup_element:INFO:	Setting the data phase to 10 for uplink 10
09:01:24:setup_element:INFO:	Setting the data phase to 14 for uplink 11
09:01:24:setup_element:INFO:	Setting the data phase to 10 for uplink 12
09:01:24:setup_element:INFO:	Setting the data phase to 13 for uplink 13
09:01:24:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:01:24:setup_element:INFO:	Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
09:01:24:setup_element:INFO:	Beginning SMX ASICs map scan
09:01:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:01:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:01:24:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:01:24:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:01:24:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:01:24:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:01:25:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:01:25:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:01:25:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:01:25:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:01:25:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:01:25:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:01:25:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:01:25:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:01:25:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:01:25:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:01:25:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:01:26:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:01:26:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:01:27:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXXX
      Uplink  1: _______________________________________________________________________XXXXXXXXX
      Uplink  2: ______________________________________________________________________XXXXXXXX__
      Uplink  3: ______________________________________________________________________XXXXXXXX__
      Uplink  4: _____________________________________________________________________XXXXXXXXX__
      Uplink  5: _____________________________________________________________________XXXXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXXX_
      Uplink  7: ________________________________________________________________________XXXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ____________________________________________________________________XXXXXXXXX___
      Uplink 11: ____________________________________________________________________XXXXXXXXX___
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 30
      Eye Window: __________XXXXXXXXXX____________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 32
      Eye Window: _____XXXXXXXX___________________________
    Uplink 3:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 6:
      Optimal Phase: 23
      Window Length: 31
      Eye Window: XXXXXXXX_______________________________X
    Uplink 7:
      Optimal Phase: 19
      Window Length: 31
      Eye Window: XXXX_______________________________XXXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 33
      Eye Window: ______________________________XXXXXXX___
    Uplink 10:
      Optimal Phase: 10
      Window Length: 32
      Eye Window: ___________________________XXXXXXXX_____
    Uplink 11:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 12:
      Optimal Phase: 10
      Window Length: 32
      Eye Window: ___________________________XXXXXXXX_____
    Uplink 13:
      Optimal Phase: 13
      Window Length: 29
      Eye Window: ____________________________XXXXXXXXXXX_
    Uplink 14:
      Optimal Phase: 10
      Window Length: 32
      Eye Window: ___________________________XXXXXXXX_____
    Uplink 15:
      Optimal Phase: 12
      Window Length: 31
      Eye Window: ____________________________XXXXXXXXX___

==============================================OOO==============================================
09:01:27:setup_element:INFO:	Performing Elink synchronization
09:01:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:01:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:01:27:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:01:27:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:01:28:febtest:INFO:	Init all SMX (CSA): 30
09:01:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:01:43:febtest:INFO:	01-00 | XA-000-09-004-004-013-010-08 |  15.6 | 1195.1
09:01:43:febtest:INFO:	08-01 | XA-000-09-004-004-014-010-06 |  18.7 | 1195.1
09:01:43:febtest:INFO:	03-02 | XA-000-09-004-004-013-012-08 |  25.1 | 1165.6
09:01:44:febtest:INFO:	10-03 | XA-000-09-004-004-015-010-11 |  28.2 | 1153.7
09:01:44:febtest:INFO:	05-04 | XA-000-09-004-004-015-012-11 |  34.6 | 1141.9
09:01:44:febtest:INFO:	12-05 | XA-000-09-004-004-015-006-11 |  15.6 | 1195.1
09:01:44:febtest:INFO:	07-06 | XA-000-09-004-004-015-011-11 |  21.9 | 1183.3
09:01:45:febtest:INFO:	14-07 | XA-000-09-004-004-014-006-06 |  15.6 | 1201.0
09:01:46:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:01:48:ST3_smx:INFO:	chip: 1-0 	 15.590880 C 	 1206.851500 mV
09:01:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:01:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:01:48:ST3_smx:INFO:		Electrons
09:01:48:ST3_smx:INFO:	# loops 0
09:01:49:ST3_smx:INFO:	# loops 1
09:01:51:ST3_smx:INFO:	# loops 2
09:01:53:ST3_smx:INFO:	Total # of broken channels: 1
09:01:53:ST3_smx:INFO:	List of broken channels: [65]
09:01:53:ST3_smx:INFO:	Total # of broken channels: 0
09:01:53:ST3_smx:INFO:	List of broken channels: []
09:01:55:ST3_smx:INFO:	chip: 8-1 	 18.745682 C 	 1206.851500 mV
09:01:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:01:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:01:55:ST3_smx:INFO:		Electrons
09:01:55:ST3_smx:INFO:	# loops 0
09:01:56:ST3_smx:INFO:	# loops 1
09:01:58:ST3_smx:INFO:	# loops 2
09:02:00:ST3_smx:INFO:	Total # of broken channels: 0
09:02:00:ST3_smx:INFO:	List of broken channels: []
09:02:00:ST3_smx:INFO:	Total # of broken channels: 0
09:02:00:ST3_smx:INFO:	List of broken channels: []
09:02:02:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1177.390875 mV
09:02:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:02:ST3_smx:INFO:		Electrons
09:02:02:ST3_smx:INFO:	# loops 0
09:02:03:ST3_smx:INFO:	# loops 1
09:02:05:ST3_smx:INFO:	# loops 2
09:02:07:ST3_smx:INFO:	Total # of broken channels: 0
09:02:07:ST3_smx:INFO:	List of broken channels: []
09:02:07:ST3_smx:INFO:	Total # of broken channels: 20
09:02:07:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 40]
09:02:09:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1171.483840 mV
09:02:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:09:ST3_smx:INFO:		Electrons
09:02:09:ST3_smx:INFO:	# loops 0
09:02:10:ST3_smx:INFO:	# loops 1
09:02:12:ST3_smx:INFO:	# loops 2
09:02:14:ST3_smx:INFO:	Total # of broken channels: 0
09:02:14:ST3_smx:INFO:	List of broken channels: []
09:02:14:ST3_smx:INFO:	Total # of broken channels: 0
09:02:14:ST3_smx:INFO:	List of broken channels: []
09:02:15:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1153.732915 mV
09:02:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:15:ST3_smx:INFO:		Electrons
09:02:15:ST3_smx:INFO:	# loops 0
09:02:17:ST3_smx:INFO:	# loops 1
09:02:19:ST3_smx:INFO:	# loops 2
09:02:21:ST3_smx:INFO:	Total # of broken channels: 2
09:02:21:ST3_smx:INFO:	List of broken channels: [7, 116]
09:02:21:ST3_smx:INFO:	Total # of broken channels: 14
09:02:21:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 7, 8, 10, 12, 14, 16, 18, 20, 28, 29]
09:02:22:ST3_smx:INFO:	chip: 12-5 	 15.590880 C 	 1212.728715 mV
09:02:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:22:ST3_smx:INFO:		Electrons
09:02:22:ST3_smx:INFO:	# loops 0
09:02:24:ST3_smx:INFO:	# loops 1
09:02:26:ST3_smx:INFO:	# loops 2
09:02:28:ST3_smx:INFO:	Total # of broken channels: 0
09:02:28:ST3_smx:INFO:	List of broken channels: []
09:02:28:ST3_smx:INFO:	Total # of broken channels: 0
09:02:28:ST3_smx:INFO:	List of broken channels: []
09:02:29:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1195.082160 mV
09:02:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:29:ST3_smx:INFO:		Electrons
09:02:29:ST3_smx:INFO:	# loops 0
09:02:31:ST3_smx:INFO:	# loops 1
09:02:33:ST3_smx:INFO:	# loops 2
09:02:34:ST3_smx:INFO:	Total # of broken channels: 0
09:02:34:ST3_smx:INFO:	List of broken channels: []
09:02:34:ST3_smx:INFO:	Total # of broken channels: 0
09:02:34:ST3_smx:INFO:	List of broken channels: []
09:02:36:ST3_smx:INFO:	chip: 14-7 	 15.590880 C 	 1218.600960 mV
09:02:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:02:36:ST3_smx:INFO:		Electrons
09:02:36:ST3_smx:INFO:	# loops 0
09:02:38:ST3_smx:INFO:	# loops 1
09:02:40:ST3_smx:INFO:	# loops 2
09:02:41:ST3_smx:INFO:	Total # of broken channels: 0
09:02:41:ST3_smx:INFO:	List of broken channels: []
09:02:41:ST3_smx:INFO:	Total # of broken channels: 0
09:02:41:ST3_smx:INFO:	List of broken channels: []
09:02:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:02:42:febtest:INFO:	01-00 | XA-000-09-004-004-013-010-08 |  15.6 | 1230.3
09:02:42:febtest:INFO:	08-01 | XA-000-09-004-004-014-010-06 |  21.9 | 1230.3
09:02:42:febtest:INFO:	03-02 | XA-000-09-004-004-013-012-08 |  28.2 | 1201.0
09:02:42:febtest:INFO:	10-03 | XA-000-09-004-004-015-010-11 |  28.2 | 1189.2
09:02:43:febtest:INFO:	05-04 | XA-000-09-004-004-015-012-11 |  34.6 | 1177.4
09:02:43:febtest:INFO:	12-05 | XA-000-09-004-004-015-006-11 |  15.6 | 1230.3
09:02:43:febtest:INFO:	07-06 | XA-000-09-004-004-015-011-11 |  21.9 | 1218.6
09:02:43:febtest:INFO:	14-07 | XA-000-09-004-004-014-006-06 |  18.7 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_17-09_01_16
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1269| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9290', '1.849', '2.0790', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9800', '1.850', '2.3190', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9620', '1.850', '0.5248', '0.000', '0.0000', '0.000', '0.0000']