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FEB_1271 21.10.24 13:20:10
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13:20:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:20:10:ST3_Shared:INFO: FEB-Sensor
13:20:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:20:57:ST3_ModuleSelector:INFO: M3DR2B0000120A2
13:20:57:ST3_ModuleSelector:INFO:
13:20:57:febtest:INFO: Testing FEB with SN 1271
13:20:59:smx_tester:INFO: Scanning setup
13:20:59:elinks:INFO: Disabling clock on downlink 0
13:20:59:elinks:INFO: Disabling clock on downlink 1
13:20:59:elinks:INFO: Disabling clock on downlink 2
13:20:59:elinks:INFO: Disabling clock on downlink 3
13:20:59:elinks:INFO: Disabling clock on downlink 4
13:20:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:20:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:20:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:20:59:elinks:INFO: Disabling clock on downlink 0
13:20:59:elinks:INFO: Disabling clock on downlink 1
13:20:59:elinks:INFO: Disabling clock on downlink 2
13:20:59:elinks:INFO: Disabling clock on downlink 3
13:20:59:elinks:INFO: Disabling clock on downlink 4
13:20:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:20:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:20:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:20:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:20:59:elinks:INFO: Disabling clock on downlink 0
13:20:59:elinks:INFO: Disabling clock on downlink 1
13:20:59:elinks:INFO: Disabling clock on downlink 2
13:20:59:elinks:INFO: Disabling clock on downlink 3
13:20:59:elinks:INFO: Disabling clock on downlink 4
13:20:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:20:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:20:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:21:00:elinks:INFO: Disabling clock on downlink 0
13:21:00:elinks:INFO: Disabling clock on downlink 1
13:21:00:elinks:INFO: Disabling clock on downlink 2
13:21:00:elinks:INFO: Disabling clock on downlink 3
13:21:00:elinks:INFO: Disabling clock on downlink 4
13:21:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:21:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:21:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:21:00:elinks:INFO: Disabling clock on downlink 0
13:21:00:elinks:INFO: Disabling clock on downlink 1
13:21:00:elinks:INFO: Disabling clock on downlink 2
13:21:00:elinks:INFO: Disabling clock on downlink 3
13:21:00:elinks:INFO: Disabling clock on downlink 4
13:21:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:21:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:21:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:21:00:setup_element:INFO: Scanning clock phase
13:21:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:21:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:21:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:21:00:setup_element:INFO: Eye window for uplink 0 : X______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:21:00:setup_element:INFO: Eye window for uplink 1 : X______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:21:00:setup_element:INFO: Eye window for uplink 2 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:21:00:setup_element:INFO: Eye window for uplink 3 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:21:00:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:21:00:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:21:00:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:21:00:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:21:00:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:21:00:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:21:00:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:21:00:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:21:00:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:21:00:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:21:00:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:21:00:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:21:00:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
==============================================OOO==============================================
13:21:00:setup_element:INFO: Scanning data phases
13:21:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:21:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:21:06:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:21:06:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXXX_____________________
Data delay found: 35
13:21:06:setup_element:INFO: Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
13:21:06:setup_element:INFO: Eye window for uplink 2 : ________XXXXXXXXX_______________________
Data delay found: 32
13:21:06:setup_element:INFO: Eye window for uplink 3 : _____XXXXXXXXX__________________________
Data delay found: 29
13:21:06:setup_element:INFO: Eye window for uplink 4 : ____XXXXXXX_____________________________
Data delay found: 27
13:21:06:setup_element:INFO: Eye window for uplink 5 : XXXXXX_______________________________XXX
Data delay found: 21
13:21:06:setup_element:INFO: Eye window for uplink 6 : XXXX________________________________XXXX
Data delay found: 19
13:21:06:setup_element:INFO: Eye window for uplink 7 : X_______________________________XXXXXXX_
Data delay found: 16
13:21:06:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXXX__________
Data delay found: 6
13:21:06:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXXXX____
Data delay found: 11
13:21:06:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
13:21:06:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
13:21:06:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXXX______
Data delay found: 10
13:21:06:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXXXXXX_
Data delay found: 13
13:21:06:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXXXX_______
Data delay found: 8
13:21:06:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXXXXXX____
Data delay found: 11
13:21:06:setup_element:INFO: Setting the data phase to 35 for uplink 0
13:21:06:setup_element:INFO: Setting the data phase to 30 for uplink 1
13:21:06:setup_element:INFO: Setting the data phase to 32 for uplink 2
13:21:06:setup_element:INFO: Setting the data phase to 29 for uplink 3
13:21:06:setup_element:INFO: Setting the data phase to 27 for uplink 4
13:21:06:setup_element:INFO: Setting the data phase to 21 for uplink 5
13:21:06:setup_element:INFO: Setting the data phase to 19 for uplink 6
13:21:06:setup_element:INFO: Setting the data phase to 16 for uplink 7
13:21:06:setup_element:INFO: Setting the data phase to 6 for uplink 8
13:21:06:setup_element:INFO: Setting the data phase to 11 for uplink 9
13:21:06:setup_element:INFO: Setting the data phase to 9 for uplink 10
13:21:06:setup_element:INFO: Setting the data phase to 12 for uplink 11
13:21:06:setup_element:INFO: Setting the data phase to 10 for uplink 12
13:21:06:setup_element:INFO: Setting the data phase to 13 for uplink 13
13:21:06:setup_element:INFO: Setting the data phase to 8 for uplink 14
13:21:06:setup_element:INFO: Setting the data phase to 11 for uplink 15
==============================================OOO==============================================
13:21:06:setup_element:INFO: Beginning SMX ASICs map scan
13:21:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:21:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:21:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:21:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:21:06:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:21:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:21:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:21:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:21:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:21:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:21:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:21:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:21:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:21:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:21:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:21:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:21:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:21:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:21:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:21:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:21:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:21:09:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X______________________________________________________________________XXXXXXXXX
Uplink 1: X______________________________________________________________________XXXXXXXXX
Uplink 2: X_______________________________________________________________________XXXXXXXX
Uplink 3: X_______________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 1:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 2:
Optimal Phase: 32
Window Length: 31
Eye Window: ________XXXXXXXXX_______________________
Uplink 3:
Optimal Phase: 29
Window Length: 31
Eye Window: _____XXXXXXXXX__________________________
Uplink 4:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 5:
Optimal Phase: 21
Window Length: 31
Eye Window: XXXXXX_______________________________XXX
Uplink 6:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 7:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 9:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 10:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 11:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 12:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 13:
Optimal Phase: 13
Window Length: 30
Eye Window: _____________________________XXXXXXXXXX_
Uplink 14:
Optimal Phase: 8
Window Length: 32
Eye Window: _________________________XXXXXXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 31
Eye Window: ___________________________XXXXXXXXX____
==============================================OOO==============================================
13:21:09:setup_element:INFO: Performing Elink synchronization
13:21:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:21:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:21:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:21:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:21:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:21:09:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:21:09:febtest:INFO: Init all SMX (CSA): 30
13:21:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:21:27:febtest:INFO: 01-00 | XA-000-09-004-004-016-020-04 | 15.6 | 1206.9
13:21:27:febtest:INFO: 08-01 | XA-000-09-004-004-013-004-08 | 28.2 | 1159.7
13:21:27:febtest:INFO: 03-02 | XA-000-09-004-004-017-022-09 | 25.1 | 1183.3
13:21:27:febtest:INFO: 10-03 | XA-000-09-004-004-014-004-06 | 40.9 | 1130.0
13:21:27:febtest:INFO: 05-04 | XA-000-09-004-004-017-021-09 | 18.7 | 1201.0
13:21:28:febtest:INFO: 12-05 | XA-000-09-004-004-015-004-11 | 44.1 | 1112.1
13:21:28:febtest:INFO: 07-06 | XA-000-09-004-004-016-021-04 | 12.4 | 1242.0
13:21:28:febtest:INFO: 14-07 | XA-000-09-004-004-014-003-06 | 40.9 | 1118.1
13:21:29:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:21:31:ST3_smx:INFO: chip: 1-0 18.745682 C 1218.600960 mV
13:21:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:31:ST3_smx:INFO: Electrons
13:21:31:ST3_smx:INFO: # loops 0
13:21:33:ST3_smx:INFO: # loops 1
13:21:35:ST3_smx:INFO: # loops 2
13:21:37:ST3_smx:INFO: # loops 3
13:21:38:ST3_smx:INFO: # loops 4
13:21:40:ST3_smx:INFO: Total # of broken channels: 0
13:21:40:ST3_smx:INFO: List of broken channels: []
13:21:40:ST3_smx:INFO: Total # of broken channels: 0
13:21:40:ST3_smx:INFO: List of broken channels: []
13:21:42:ST3_smx:INFO: chip: 8-1 28.225000 C 1177.390875 mV
13:21:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:42:ST3_smx:INFO: Electrons
13:21:42:ST3_smx:INFO: # loops 0
13:21:44:ST3_smx:INFO: # loops 1
13:21:45:ST3_smx:INFO: # loops 2
13:21:47:ST3_smx:INFO: # loops 3
13:21:49:ST3_smx:INFO: # loops 4
13:21:50:ST3_smx:INFO: Total # of broken channels: 0
13:21:50:ST3_smx:INFO: List of broken channels: []
13:21:50:ST3_smx:INFO: Total # of broken channels: 1
13:21:50:ST3_smx:INFO: List of broken channels: [127]
13:21:52:ST3_smx:INFO: chip: 3-2 28.225000 C 1195.082160 mV
13:21:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:21:52:ST3_smx:INFO: Electrons
13:21:52:ST3_smx:INFO: # loops 0
13:21:54:ST3_smx:INFO: # loops 1
13:21:56:ST3_smx:INFO: # loops 2
13:21:57:ST3_smx:INFO: # loops 3
13:21:59:ST3_smx:INFO: # loops 4
13:22:01:ST3_smx:INFO: Total # of broken channels: 0
13:22:01:ST3_smx:INFO: List of broken channels: []
13:22:01:ST3_smx:INFO: Total # of broken channels: 1
13:22:01:ST3_smx:INFO: List of broken channels: [10]
13:22:02:ST3_smx:INFO: chip: 10-3 40.898880 C 1141.874115 mV
13:22:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:02:ST3_smx:INFO: Electrons
13:22:02:ST3_smx:INFO: # loops 0
13:22:04:ST3_smx:INFO: # loops 1
13:22:06:ST3_smx:INFO: # loops 2
13:22:08:ST3_smx:INFO: # loops 3
13:22:10:ST3_smx:INFO: # loops 4
13:22:11:ST3_smx:INFO: Total # of broken channels: 0
13:22:11:ST3_smx:INFO: List of broken channels: []
13:22:11:ST3_smx:INFO: Total # of broken channels: 1
13:22:11:ST3_smx:INFO: List of broken channels: [73]
13:22:13:ST3_smx:INFO: chip: 5-4 18.745682 C 1212.728715 mV
13:22:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:13:ST3_smx:INFO: Electrons
13:22:13:ST3_smx:INFO: # loops 0
13:22:15:ST3_smx:INFO: # loops 1
13:22:16:ST3_smx:INFO: # loops 2
13:22:18:ST3_smx:INFO: # loops 3
13:22:19:ST3_smx:INFO: # loops 4
13:22:21:ST3_smx:INFO: Total # of broken channels: 0
13:22:21:ST3_smx:INFO: List of broken channels: []
13:22:21:ST3_smx:INFO: Total # of broken channels: 0
13:22:21:ST3_smx:INFO: List of broken channels: []
13:22:23:ST3_smx:INFO: chip: 12-5 44.073563 C 1124.048640 mV
13:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:23:ST3_smx:INFO: Electrons
13:22:23:ST3_smx:INFO: # loops 0
13:22:24:ST3_smx:INFO: # loops 1
13:22:26:ST3_smx:INFO: # loops 2
13:22:27:ST3_smx:INFO: # loops 3
13:22:29:ST3_smx:INFO: # loops 4
13:22:31:ST3_smx:INFO: Total # of broken channels: 0
13:22:31:ST3_smx:INFO: List of broken channels: []
13:22:31:ST3_smx:INFO: Total # of broken channels: 1
13:22:31:ST3_smx:INFO: List of broken channels: [1]
13:22:32:ST3_smx:INFO: chip: 7-6 12.438562 C 1259.567515 mV
13:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:32:ST3_smx:INFO: Electrons
13:22:32:ST3_smx:INFO: # loops 0
13:22:34:ST3_smx:INFO: # loops 1
13:22:36:ST3_smx:INFO: # loops 2
13:22:37:ST3_smx:INFO: # loops 3
13:22:39:ST3_smx:INFO: # loops 4
13:22:41:ST3_smx:INFO: Total # of broken channels: 0
13:22:41:ST3_smx:INFO: List of broken channels: []
13:22:41:ST3_smx:INFO: Total # of broken channels: 0
13:22:41:ST3_smx:INFO: List of broken channels: []
13:22:42:ST3_smx:INFO: chip: 14-7 40.898880 C 1129.995435 mV
13:22:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:22:42:ST3_smx:INFO: Electrons
13:22:42:ST3_smx:INFO: # loops 0
13:22:44:ST3_smx:INFO: # loops 1
13:22:46:ST3_smx:INFO: # loops 2
13:22:47:ST3_smx:INFO: # loops 3
13:22:49:ST3_smx:INFO: # loops 4
13:22:51:ST3_smx:INFO: Total # of broken channels: 0
13:22:51:ST3_smx:INFO: List of broken channels: []
13:22:51:ST3_smx:INFO: Total # of broken channels: 1
13:22:51:ST3_smx:INFO: List of broken channels: [23]
13:22:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:22:51:febtest:INFO: 01-00 | XA-000-09-004-004-016-020-04 | 18.7 | 1242.0
13:22:52:febtest:INFO: 08-01 | XA-000-09-004-004-013-004-08 | 31.4 | 1201.0
13:22:52:febtest:INFO: 03-02 | XA-000-09-004-004-017-022-09 | 28.2 | 1218.6
13:22:52:febtest:INFO: 10-03 | XA-000-09-004-004-014-004-06 | 40.9 | 1159.7
13:22:52:febtest:INFO: 05-04 | XA-000-09-004-004-017-021-09 | 21.9 | 1236.2
13:22:52:febtest:INFO: 12-05 | XA-000-09-004-004-015-004-11 | 44.1 | 1147.8
13:22:53:febtest:INFO: 07-06 | XA-000-09-004-004-016-021-04 | 12.4 | 1300.3
13:22:53:febtest:INFO: 14-07 | XA-000-09-004-004-014-003-06 | 44.1 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_21-13_20_10
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1271| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: | SIZE: 0 | GRADE:
MODULE_NAME: M3DR2B0000120A2
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['2.450', '1.3330', '1.849', '2.4030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9510', '1.850', '2.3880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9460', '1.850', '0.5133', '0.000', '0.0000', '0.000', '0.0000']