FEB_1272    18.10.24 13:30:43

TextEdit.txt
            13:30:43:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:43:ST3_Shared:INFO:	                       FEB-Microcable                       
13:30:43:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:43:febtest:INFO:	Testing FEB with SN 1272
13:30:45:smx_tester:INFO:	Scanning setup
13:30:45:elinks:INFO:	Disabling clock on downlink 0
13:30:45:elinks:INFO:	Disabling clock on downlink 1
13:30:45:elinks:INFO:	Disabling clock on downlink 2
13:30:45:elinks:INFO:	Disabling clock on downlink 3
13:30:45:elinks:INFO:	Disabling clock on downlink 4
13:30:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:45:elinks:INFO:	Disabling clock on downlink 0
13:30:45:elinks:INFO:	Disabling clock on downlink 1
13:30:45:elinks:INFO:	Disabling clock on downlink 2
13:30:45:elinks:INFO:	Disabling clock on downlink 3
13:30:45:elinks:INFO:	Disabling clock on downlink 4
13:30:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:30:45:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:30:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:45:elinks:INFO:	Disabling clock on downlink 0
13:30:45:elinks:INFO:	Disabling clock on downlink 1
13:30:45:elinks:INFO:	Disabling clock on downlink 2
13:30:45:elinks:INFO:	Disabling clock on downlink 3
13:30:45:elinks:INFO:	Disabling clock on downlink 4
13:30:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:45:elinks:INFO:	Disabling clock on downlink 0
13:30:45:elinks:INFO:	Disabling clock on downlink 1
13:30:45:elinks:INFO:	Disabling clock on downlink 2
13:30:45:elinks:INFO:	Disabling clock on downlink 3
13:30:45:elinks:INFO:	Disabling clock on downlink 4
13:30:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:30:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:45:elinks:INFO:	Disabling clock on downlink 0
13:30:45:elinks:INFO:	Disabling clock on downlink 1
13:30:45:elinks:INFO:	Disabling clock on downlink 2
13:30:45:elinks:INFO:	Disabling clock on downlink 3
13:30:45:elinks:INFO:	Disabling clock on downlink 4
13:30:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:30:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:30:45:setup_element:INFO:	Scanning clock phase
13:30:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:46:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:30:46:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:30:46:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:30:46:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:30:46:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:30:46:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:30:46:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:30:46:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:30:46:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:30:46:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:30:46:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:30:46:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:30:46:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:30:46:setup_element:INFO:	Scanning data phases
13:30:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:51:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:30:51:setup_element:INFO:	Eye window for uplink 0 : ___________XXXXXXXXX____________________
Data delay found: 35
13:30:51:setup_element:INFO:	Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
13:30:51:setup_element:INFO:	Eye window for uplink 2 : _________XXXXXX_________________________
Data delay found: 31
13:30:51:setup_element:INFO:	Eye window for uplink 3 : _____XXXXXXXX___________________________
Data delay found: 28
13:30:51:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXXX____________________________
Data delay found: 28
13:30:51:setup_element:INFO:	Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
13:30:51:setup_element:INFO:	Eye window for uplink 6 : XXXX______________________________XXXXXX
Data delay found: 18
13:30:51:setup_element:INFO:	Eye window for uplink 7 : X_____________________________XXXXXXXXX_
Data delay found: 15
13:30:51:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
13:30:51:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXXX____
Data delay found: 12
13:30:51:setup_element:INFO:	Eye window for uplink 10: ____________________________XXXXXXX_____
Data delay found: 11
13:30:51:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXXXXXX
Data delay found: 15
13:30:51:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXXXXX____
Data delay found: 11
13:30:51:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXXXXXX_
Data delay found: 14
13:30:51:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXXXX______
Data delay found: 9
13:30:51:setup_element:INFO:	Eye window for uplink 15: ___________________________XXXXXXXXX____
Data delay found: 11
13:30:51:setup_element:INFO:	Setting the data phase to 35 for uplink 0
13:30:51:setup_element:INFO:	Setting the data phase to 30 for uplink 1
13:30:51:setup_element:INFO:	Setting the data phase to 31 for uplink 2
13:30:51:setup_element:INFO:	Setting the data phase to 28 for uplink 3
13:30:51:setup_element:INFO:	Setting the data phase to 28 for uplink 4
13:30:51:setup_element:INFO:	Setting the data phase to 24 for uplink 5
13:30:51:setup_element:INFO:	Setting the data phase to 18 for uplink 6
13:30:51:setup_element:INFO:	Setting the data phase to 15 for uplink 7
13:30:51:setup_element:INFO:	Setting the data phase to 7 for uplink 8
13:30:51:setup_element:INFO:	Setting the data phase to 12 for uplink 9
13:30:51:setup_element:INFO:	Setting the data phase to 11 for uplink 10
13:30:51:setup_element:INFO:	Setting the data phase to 15 for uplink 11
13:30:51:setup_element:INFO:	Setting the data phase to 11 for uplink 12
13:30:51:setup_element:INFO:	Setting the data phase to 14 for uplink 13
13:30:51:setup_element:INFO:	Setting the data phase to 9 for uplink 14
13:30:51:setup_element:INFO:	Setting the data phase to 11 for uplink 15
==============================================OOO==============================================
13:30:51:setup_element:INFO:	Beginning SMX ASICs map scan
13:30:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:30:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:30:52:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:30:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:30:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:30:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:30:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:30:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:30:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:30:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:30:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:30:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:30:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:30:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:30:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:30:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:30:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:30:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:30:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:30:54:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: ______________________________________________________________________XXXXXXXXX_
      Uplink  3: ______________________________________________________________________XXXXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: _______________________________________________________________________XXXXXX___
      Uplink  7: _______________________________________________________________________XXXXXX___
      Uplink  8: ____________________________________________________________________XXXXXXXXX___
      Uplink  9: ____________________________________________________________________XXXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: _______________________________________________________________________XXXXXXXX_
      Uplink 13: _______________________________________________________________________XXXXXXXX_
      Uplink 14: _____________________________________________________________________XXXXXXXX___
      Uplink 15: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 31
      Eye Window: ___________XXXXXXXXX____________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 32
      Eye Window: _____XXXXXXXX___________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 33
      Eye Window: _____XXXXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 18
      Window Length: 30
      Eye Window: XXXX______________________________XXXXXX
    Uplink 7:
      Optimal Phase: 15
      Window Length: 29
      Eye Window: X_____________________________XXXXXXXXX_
    Uplink 8:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 33
      Eye Window: _____________________________XXXXXXX____
    Uplink 10:
      Optimal Phase: 11
      Window Length: 33
      Eye Window: ____________________________XXXXXXX_____
    Uplink 11:
      Optimal Phase: 15
      Window Length: 32
      Eye Window: ________________________________XXXXXXXX
    Uplink 12:
      Optimal Phase: 11
      Window Length: 32
      Eye Window: ____________________________XXXXXXXX____
    Uplink 13:
      Optimal Phase: 14
      Window Length: 31
      Eye Window: ______________________________XXXXXXXXX_
    Uplink 14:
      Optimal Phase: 9
      Window Length: 32
      Eye Window: __________________________XXXXXXXX______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 31
      Eye Window: ___________________________XXXXXXXXX____

==============================================OOO==============================================
13:30:54:setup_element:INFO:	Performing Elink synchronization
13:30:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:54:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:30:54:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:30:54:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:30:54:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:30:55:febtest:INFO:	Init all SMX (CSA): 30
13:31:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:09:febtest:INFO:	01-00 | XA-000-09-004-004-012-022-02 |  31.4 | 1177.4
13:31:09:febtest:INFO:	08-01 | XA-000-09-004-004-011-023-10 |  37.7 | 1147.8
13:31:09:febtest:INFO:	03-02 | XA-000-09-004-004-012-023-02 |  44.1 | 1130.0
13:31:10:febtest:INFO:	10-03 | XA-000-09-004-004-010-026-07 |  40.9 | 1135.9
13:31:10:febtest:INFO:	05-04 | XA-000-09-004-004-012-020-02 |  34.6 | 1171.5
13:31:10:febtest:INFO:	12-05 | XA-000-09-004-004-011-025-10 |  40.9 | 1135.9
13:31:10:febtest:INFO:	07-06 | XA-000-09-004-004-012-018-02 |  37.7 | 1159.7
13:31:11:febtest:INFO:	14-07 | XA-000-09-004-004-012-024-02 |  25.1 | 1195.1
13:31:12:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:31:14:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1189.190035 mV
13:31:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:14:ST3_smx:INFO:		Electrons
13:31:14:ST3_smx:INFO:	# loops 0
13:31:15:ST3_smx:INFO:	# loops 1
13:31:17:ST3_smx:INFO:	# loops 2
13:31:19:ST3_smx:INFO:	Total # of broken channels: 0
13:31:19:ST3_smx:INFO:	List of broken channels: []
13:31:19:ST3_smx:INFO:	Total # of broken channels: 0
13:31:19:ST3_smx:INFO:	List of broken channels: []
13:31:20:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1165.571835 mV
13:31:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:20:ST3_smx:INFO:		Electrons
13:31:20:ST3_smx:INFO:	# loops 0
13:31:22:ST3_smx:INFO:	# loops 1
13:31:24:ST3_smx:INFO:	# loops 2
13:31:25:ST3_smx:INFO:	Total # of broken channels: 0
13:31:25:ST3_smx:INFO:	List of broken channels: []
13:31:25:ST3_smx:INFO:	Total # of broken channels: 0
13:31:25:ST3_smx:INFO:	List of broken channels: []
13:31:27:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1147.806000 mV
13:31:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:27:ST3_smx:INFO:		Electrons
13:31:27:ST3_smx:INFO:	# loops 0
13:31:28:ST3_smx:INFO:	# loops 1
13:31:30:ST3_smx:INFO:	# loops 2
13:31:31:ST3_smx:INFO:	Total # of broken channels: 0
13:31:31:ST3_smx:INFO:	List of broken channels: []
13:31:31:ST3_smx:INFO:	Total # of broken channels: 4
13:31:31:ST3_smx:INFO:	List of broken channels: [118, 120, 122, 127]
13:31:33:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1153.732915 mV
13:31:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:33:ST3_smx:INFO:		Electrons
13:31:33:ST3_smx:INFO:	# loops 0
13:31:35:ST3_smx:INFO:	# loops 1
13:31:36:ST3_smx:INFO:	# loops 2
13:31:38:ST3_smx:INFO:	Total # of broken channels: 2
13:31:38:ST3_smx:INFO:	List of broken channels: [0, 62]
13:31:38:ST3_smx:INFO:	Total # of broken channels: 1
13:31:38:ST3_smx:INFO:	List of broken channels: [0]
13:31:39:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1177.390875 mV
13:31:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:40:ST3_smx:INFO:		Electrons
13:31:40:ST3_smx:INFO:	# loops 0
13:31:42:ST3_smx:INFO:	# loops 1
13:31:44:ST3_smx:INFO:	# loops 2
13:31:45:ST3_smx:INFO:	Total # of broken channels: 0
13:31:45:ST3_smx:INFO:	List of broken channels: []
13:31:45:ST3_smx:INFO:	Total # of broken channels: 7
13:31:45:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13]
13:31:47:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1147.806000 mV
13:31:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:47:ST3_smx:INFO:		Electrons
13:31:47:ST3_smx:INFO:	# loops 0
13:31:49:ST3_smx:INFO:	# loops 1
13:31:50:ST3_smx:INFO:	# loops 2
13:31:51:ST3_smx:INFO:	Total # of broken channels: 1
13:31:51:ST3_smx:INFO:	List of broken channels: [78]
13:31:52:ST3_smx:INFO:	Total # of broken channels: 8
13:31:52:ST3_smx:INFO:	List of broken channels: [96, 98, 100, 102, 104, 106, 108, 110]
13:31:53:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1171.483840 mV
13:31:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:53:ST3_smx:INFO:		Electrons
13:31:53:ST3_smx:INFO:	# loops 0
13:31:55:ST3_smx:INFO:	# loops 1
13:31:56:ST3_smx:INFO:	# loops 2
13:31:58:ST3_smx:INFO:	Total # of broken channels: 0
13:31:58:ST3_smx:INFO:	List of broken channels: []
13:31:58:ST3_smx:INFO:	Total # of broken channels: 1
13:31:58:ST3_smx:INFO:	List of broken channels: [27]
13:32:00:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1206.851500 mV
13:32:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:00:ST3_smx:INFO:		Electrons
13:32:00:ST3_smx:INFO:	# loops 0
13:32:02:ST3_smx:INFO:	# loops 1
13:32:03:ST3_smx:INFO:	# loops 2
13:32:05:ST3_smx:INFO:	Total # of broken channels: 0
13:32:05:ST3_smx:INFO:	List of broken channels: []
13:32:05:ST3_smx:INFO:	Total # of broken channels: 0
13:32:05:ST3_smx:INFO:	List of broken channels: []
13:32:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:05:febtest:INFO:	01-00 | XA-000-09-004-004-012-022-02 |  31.4 | 1212.7
13:32:05:febtest:INFO:	08-01 | XA-000-09-004-004-011-023-10 |  37.7 | 1183.3
13:32:06:febtest:INFO:	03-02 | XA-000-09-004-004-012-023-02 |  47.3 | 1165.6
13:32:06:febtest:INFO:	10-03 | XA-000-09-004-004-010-026-07 |  44.1 | 1171.5
13:32:06:febtest:INFO:	05-04 | XA-000-09-004-004-012-020-02 |  34.6 | 1201.0
13:32:06:febtest:INFO:	12-05 | XA-000-09-004-004-011-025-10 |  40.9 | 1165.6
13:32:07:febtest:INFO:	07-06 | XA-000-09-004-004-012-018-02 |  37.7 | 1195.1
13:32:07:febtest:INFO:	14-07 | XA-000-09-004-004-012-024-02 |  28.2 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_18-13_30_43
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1272| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5000', '1.848', '2.7920', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0110', '1.850', '2.3430', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5220', '0.000', '0.0000', '0.000', '0.0000']