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FEB_1272 04.11.24 09:01:13
Info
09:01:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:13:ST3_Shared:INFO: FEB-Sensor
09:01:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:21:ST3_ModuleSelector:INFO: M4DL0B1101611B2
09:01:21:ST3_ModuleSelector:INFO: 08123
09:01:21:febtest:INFO: Testing FEB with SN 1272
09:01:23:smx_tester:INFO: Scanning setup
09:01:23:elinks:INFO: Disabling clock on downlink 0
09:01:23:elinks:INFO: Disabling clock on downlink 1
09:01:23:elinks:INFO: Disabling clock on downlink 2
09:01:23:elinks:INFO: Disabling clock on downlink 3
09:01:23:elinks:INFO: Disabling clock on downlink 4
09:01:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:01:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:23:elinks:INFO: Disabling clock on downlink 0
09:01:23:elinks:INFO: Disabling clock on downlink 1
09:01:23:elinks:INFO: Disabling clock on downlink 2
09:01:23:elinks:INFO: Disabling clock on downlink 3
09:01:23:elinks:INFO: Disabling clock on downlink 4
09:01:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:01:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:01:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:23:elinks:INFO: Disabling clock on downlink 0
09:01:23:elinks:INFO: Disabling clock on downlink 1
09:01:23:elinks:INFO: Disabling clock on downlink 2
09:01:23:elinks:INFO: Disabling clock on downlink 3
09:01:23:elinks:INFO: Disabling clock on downlink 4
09:01:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:23:elinks:INFO: Disabling clock on downlink 0
09:01:23:elinks:INFO: Disabling clock on downlink 1
09:01:23:elinks:INFO: Disabling clock on downlink 2
09:01:23:elinks:INFO: Disabling clock on downlink 3
09:01:23:elinks:INFO: Disabling clock on downlink 4
09:01:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:01:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:23:elinks:INFO: Disabling clock on downlink 0
09:01:23:elinks:INFO: Disabling clock on downlink 1
09:01:23:elinks:INFO: Disabling clock on downlink 2
09:01:23:elinks:INFO: Disabling clock on downlink 3
09:01:23:elinks:INFO: Disabling clock on downlink 4
09:01:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:01:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:01:23:setup_element:INFO: Scanning clock phase
09:01:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:24:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:01:24:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:24:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:24:setup_element:INFO: Eye window for uplink 2 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 3 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 4 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 5 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
09:01:24:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
09:01:24:setup_element:INFO: Eye window for uplink 10: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 11: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:01:24:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:24:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:24:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
09:01:24:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
09:01:24:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 1
==============================================OOO==============================================
09:01:24:setup_element:INFO: Scanning data phases
09:01:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:29:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:01:29:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXX________________________
Data delay found: 32
09:01:29:setup_element:INFO: Eye window for uplink 1 : ____XXXXXXX_____________________________
Data delay found: 27
09:01:29:setup_element:INFO: Eye window for uplink 2 : ______XXXXXX____________________________
Data delay found: 28
09:01:29:setup_element:INFO: Eye window for uplink 3 : ___XXXXXXX______________________________
Data delay found: 26
09:01:29:setup_element:INFO: Eye window for uplink 4 : ___XXXXXX_______________________________
Data delay found: 25
09:01:29:setup_element:INFO: Eye window for uplink 5 : XXXXX_________________________________XX
Data delay found: 21
09:01:29:setup_element:INFO: Eye window for uplink 6 : X_______________________________XXXXXXXX
Data delay found: 16
09:01:29:setup_element:INFO: Eye window for uplink 7 : ____________________________XXXXXXXX____
Data delay found: 11
09:01:29:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
09:01:29:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
09:01:29:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXX_______
Data delay found: 9
09:01:29:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
09:01:29:setup_element:INFO: Eye window for uplink 12: __________________________XXXXXXXX______
Data delay found: 9
09:01:29:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXXXXXX___
Data delay found: 12
09:01:29:setup_element:INFO: Eye window for uplink 14: ________________________XXXXXXX_________
Data delay found: 7
09:01:29:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXX________
Data delay found: 8
09:01:29:setup_element:INFO: Setting the data phase to 32 for uplink 0
09:01:29:setup_element:INFO: Setting the data phase to 27 for uplink 1
09:01:29:setup_element:INFO: Setting the data phase to 28 for uplink 2
09:01:29:setup_element:INFO: Setting the data phase to 26 for uplink 3
09:01:29:setup_element:INFO: Setting the data phase to 25 for uplink 4
09:01:29:setup_element:INFO: Setting the data phase to 21 for uplink 5
09:01:29:setup_element:INFO: Setting the data phase to 16 for uplink 6
09:01:29:setup_element:INFO: Setting the data phase to 11 for uplink 7
09:01:29:setup_element:INFO: Setting the data phase to 4 for uplink 8
09:01:29:setup_element:INFO: Setting the data phase to 9 for uplink 9
09:01:29:setup_element:INFO: Setting the data phase to 9 for uplink 10
09:01:29:setup_element:INFO: Setting the data phase to 13 for uplink 11
09:01:29:setup_element:INFO: Setting the data phase to 9 for uplink 12
09:01:29:setup_element:INFO: Setting the data phase to 12 for uplink 13
09:01:29:setup_element:INFO: Setting the data phase to 7 for uplink 14
09:01:29:setup_element:INFO: Setting the data phase to 8 for uplink 15
==============================================OOO==============================================
09:01:29:setup_element:INFO: Beginning SMX ASICs map scan
09:01:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:01:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:01:29:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:01:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:01:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:01:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:01:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:01:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:01:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:01:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:01:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:01:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:01:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:01:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:01:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:01:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:01:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:01:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:01:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:01:32:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 69
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXXXX___
Uplink 1: _____________________________________________________________________XXXXXXXX___
Uplink 2: ____________________________________________________________________XXXXXXXX____
Uplink 3: ____________________________________________________________________XXXXXXXX____
Uplink 4: ____________________________________________________________________XXXXXXXX____
Uplink 5: ____________________________________________________________________XXXXXXXX____
Uplink 6: _____________________________________________________________________XXXXXX_____
Uplink 7: _____________________________________________________________________XXXXXX_____
Uplink 8: __________________________________________________________________XXXXXXXXX_____
Uplink 9: __________________________________________________________________XXXXXXXXX_____
Uplink 10: ___________________________________________________________________XXXXXXXXX____
Uplink 11: ___________________________________________________________________XXXXXXXXX____
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: __________________________________________________________________XXXXXXXXX_____
Uplink 15: __________________________________________________________________XXXXXXXXX_____
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 33
Eye Window: _________XXXXXXX________________________
Uplink 1:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 3:
Optimal Phase: 26
Window Length: 33
Eye Window: ___XXXXXXX______________________________
Uplink 4:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 6:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 7:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 8:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 9:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 10:
Optimal Phase: 9
Window Length: 33
Eye Window: __________________________XXXXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 12:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 13:
Optimal Phase: 12
Window Length: 31
Eye Window: ____________________________XXXXXXXXX___
Uplink 14:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 15:
Optimal Phase: 8
Window Length: 33
Eye Window: _________________________XXXXXXX________
==============================================OOO==============================================
09:01:32:setup_element:INFO: Performing Elink synchronization
09:01:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:01:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:01:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:01:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:01:32:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:01:33:febtest:INFO: Init all SMX (CSA): 30
09:01:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:01:48:febtest:INFO: 01-00 | XA-000-09-004-004-012-022-02 | -3.3 | 1300.3
09:01:48:febtest:INFO: 08-01 | XA-000-09-004-004-011-023-10 | 9.3 | 1253.7
09:01:48:febtest:INFO: 03-02 | XA-000-09-004-004-012-023-02 | 12.4 | 1242.0
09:01:49:febtest:INFO: 10-03 | XA-000-09-004-004-010-026-07 | 12.4 | 1230.3
09:01:49:febtest:INFO: 05-04 | XA-000-09-004-004-012-020-02 | 6.1 | 1277.1
09:01:49:febtest:INFO: 12-05 | XA-000-09-004-004-011-025-10 | 9.3 | 1247.9
09:01:49:febtest:INFO: 07-06 | XA-000-09-004-004-012-018-02 | 6.1 | 1277.1
09:01:49:febtest:INFO: 14-07 | XA-000-09-004-004-012-024-02 | -3.3 | 1294.5
09:01:50:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:01:52:ST3_smx:INFO: chip: 1-0 -0.145857 C 1306.088235 mV
09:01:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:52:ST3_smx:INFO: Electrons
09:01:52:ST3_smx:INFO: # loops 0
09:01:54:ST3_smx:INFO: # loops 1
09:01:56:ST3_smx:INFO: # loops 2
09:01:57:ST3_smx:INFO: # loops 3
09:01:59:ST3_smx:INFO: # loops 4
09:02:01:ST3_smx:INFO: Total # of broken channels: 0
09:02:01:ST3_smx:INFO: List of broken channels: []
09:02:01:ST3_smx:INFO: Total # of broken channels: 0
09:02:01:ST3_smx:INFO: List of broken channels: []
09:02:03:ST3_smx:INFO: chip: 8-1 9.288730 C 1259.567515 mV
09:02:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:03:ST3_smx:INFO: Electrons
09:02:03:ST3_smx:INFO: # loops 0
09:02:04:ST3_smx:INFO: # loops 1
09:02:06:ST3_smx:INFO: # loops 2
09:02:08:ST3_smx:INFO: # loops 3
09:02:10:ST3_smx:INFO: # loops 4
09:02:11:ST3_smx:INFO: Total # of broken channels: 0
09:02:11:ST3_smx:INFO: List of broken channels: []
09:02:11:ST3_smx:INFO: Total # of broken channels: 0
09:02:11:ST3_smx:INFO: List of broken channels: []
09:02:13:ST3_smx:INFO: chip: 3-2 15.590880 C 1247.887635 mV
09:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:13:ST3_smx:INFO: Electrons
09:02:13:ST3_smx:INFO: # loops 0
09:02:15:ST3_smx:INFO: # loops 1
09:02:16:ST3_smx:INFO: # loops 2
09:02:18:ST3_smx:INFO: # loops 3
09:02:20:ST3_smx:INFO: # loops 4
09:02:22:ST3_smx:INFO: Total # of broken channels: 2
09:02:22:ST3_smx:INFO: List of broken channels: [1, 5]
09:02:22:ST3_smx:INFO: Total # of broken channels: 2
09:02:22:ST3_smx:INFO: List of broken channels: [1, 5]
09:02:23:ST3_smx:INFO: chip: 10-3 15.590880 C 1242.040240 mV
09:02:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:23:ST3_smx:INFO: Electrons
09:02:23:ST3_smx:INFO: # loops 0
09:02:25:ST3_smx:INFO: # loops 1
09:02:27:ST3_smx:INFO: # loops 2
09:02:28:ST3_smx:INFO: # loops 3
09:02:30:ST3_smx:INFO: # loops 4
09:02:32:ST3_smx:INFO: Total # of broken channels: 0
09:02:32:ST3_smx:INFO: List of broken channels: []
09:02:32:ST3_smx:INFO: Total # of broken channels: 1
09:02:32:ST3_smx:INFO: List of broken channels: [0]
09:02:33:ST3_smx:INFO: chip: 5-4 6.141382 C 1282.867635 mV
09:02:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:33:ST3_smx:INFO: Electrons
09:02:33:ST3_smx:INFO: # loops 0
09:02:35:ST3_smx:INFO: # loops 1
09:02:37:ST3_smx:INFO: # loops 2
09:02:38:ST3_smx:INFO: # loops 3
09:02:40:ST3_smx:INFO: # loops 4
09:02:42:ST3_smx:INFO: Total # of broken channels: 0
09:02:42:ST3_smx:INFO: List of broken channels: []
09:02:42:ST3_smx:INFO: Total # of broken channels: 0
09:02:42:ST3_smx:INFO: List of broken channels: []
09:02:43:ST3_smx:INFO: chip: 12-5 9.288730 C 1259.567515 mV
09:02:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:43:ST3_smx:INFO: Electrons
09:02:43:ST3_smx:INFO: # loops 0
09:02:45:ST3_smx:INFO: # loops 1
09:02:46:ST3_smx:INFO: # loops 2
09:02:48:ST3_smx:INFO: # loops 3
09:02:50:ST3_smx:INFO: # loops 4
09:02:51:ST3_smx:INFO: Total # of broken channels: 0
09:02:51:ST3_smx:INFO: List of broken channels: []
09:02:51:ST3_smx:INFO: Total # of broken channels: 0
09:02:51:ST3_smx:INFO: List of broken channels: []
09:02:53:ST3_smx:INFO: chip: 7-6 9.288730 C 1288.680240 mV
09:02:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:02:53:ST3_smx:INFO: Electrons
09:02:53:ST3_smx:INFO: # loops 0
09:02:55:ST3_smx:INFO: # loops 1
09:02:56:ST3_smx:INFO: # loops 2
09:02:58:ST3_smx:INFO: # loops 3
09:03:00:ST3_smx:INFO: # loops 4
09:03:01:ST3_smx:INFO: Total # of broken channels: 0
09:03:01:ST3_smx:INFO: List of broken channels: []
09:03:01:ST3_smx:INFO: Total # of broken channels: 0
09:03:01:ST3_smx:INFO: List of broken channels: []
09:03:03:ST3_smx:INFO: chip: 14-7 -0.145857 C 1306.088235 mV
09:03:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:03:ST3_smx:INFO: Electrons
09:03:03:ST3_smx:INFO: # loops 0
09:03:05:ST3_smx:INFO: # loops 1
09:03:06:ST3_smx:INFO: # loops 2
09:03:08:ST3_smx:INFO: # loops 3
09:03:10:ST3_smx:INFO: # loops 4
09:03:11:ST3_smx:INFO: Total # of broken channels: 0
09:03:11:ST3_smx:INFO: List of broken channels: []
09:03:11:ST3_smx:INFO: Total # of broken channels: 12
09:03:11:ST3_smx:INFO: List of broken channels: [1, 3, 11, 13, 15, 17, 21, 45, 47, 49, 85, 127]
09:03:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:03:12:febtest:INFO: 01-00 | XA-000-09-004-004-012-022-02 | 3.0 | 1323.5
09:03:12:febtest:INFO: 08-01 | XA-000-09-004-004-011-023-10 | 12.4 | 1277.1
09:03:12:febtest:INFO: 03-02 | XA-000-09-004-004-012-023-02 | 18.7 | 1265.4
09:03:13:febtest:INFO: 10-03 | XA-000-09-004-004-010-026-07 | 18.7 | 1253.7
09:03:13:febtest:INFO: 05-04 | XA-000-09-004-004-012-020-02 | 9.3 | 1300.3
09:03:13:febtest:INFO: 12-05 | XA-000-09-004-004-011-025-10 | 12.4 | 1271.2
09:03:13:febtest:INFO: 07-06 | XA-000-09-004-004-012-018-02 | 9.3 | 1300.3
09:03:14:febtest:INFO: 14-07 | XA-000-09-004-004-012-024-02 | 3.0 | 1317.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_04-09_01_13
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1272| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 08123 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M4DL0B1101611B2
LADDER_NAME: L4DL000161
------------------------------------------------------------
VI_before_Init : ['2.449', '2.3410', '1.849', '1.2690', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.2230', '1.850', '1.7810', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.5100', '1.850', '1.7650', '0.000', '0.0000', '0.000', '0.0000']