
FEB_1275 08.11.24 08:02:57
TextEdit.txt
08:02:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:02:57:ST3_Shared:INFO: FEB-Sensor 08:02:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:03:11:ST3_ModuleSelector:DEBUG: M6UL4T3110363B2 08:03:11:ST3_ModuleSelector:DEBUG: L6UL401036 08:03:11:ST3_ModuleSelector:DEBUG: 18144 08:03:11:ST3_ModuleSelector:DEBUG: 62x124 08:03:11:ST3_ModuleSelector:DEBUG: A 08:03:11:ST3_ModuleSelector:DEBUG: M6UL4T3110363B2 08:03:11:ST3_ModuleSelector:DEBUG: L6UL401036 08:03:11:ST3_ModuleSelector:DEBUG: 18144 08:03:11:ST3_ModuleSelector:DEBUG: 62x124 08:03:11:ST3_ModuleSelector:DEBUG: A 08:03:18:ST3_ModuleSelector:INFO: M6UL4T3110363B2 08:03:18:ST3_ModuleSelector:INFO: 18144 08:03:18:febtest:INFO: Testing FEB with SN 1275 08:03:20:smx_tester:INFO: Scanning setup 08:03:20:elinks:INFO: Disabling clock on downlink 0 08:03:20:elinks:INFO: Disabling clock on downlink 1 08:03:20:elinks:INFO: Disabling clock on downlink 2 08:03:20:elinks:INFO: Disabling clock on downlink 3 08:03:20:elinks:INFO: Disabling clock on downlink 4 08:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:03:20:elinks:INFO: Disabling clock on downlink 0 08:03:20:elinks:INFO: Disabling clock on downlink 1 08:03:20:elinks:INFO: Disabling clock on downlink 2 08:03:20:elinks:INFO: Disabling clock on downlink 3 08:03:20:elinks:INFO: Disabling clock on downlink 4 08:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:03:20:elinks:INFO: Disabling clock on downlink 0 08:03:20:elinks:INFO: Disabling clock on downlink 1 08:03:20:elinks:INFO: Disabling clock on downlink 2 08:03:20:elinks:INFO: Disabling clock on downlink 3 08:03:20:elinks:INFO: Disabling clock on downlink 4 08:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:03:20:elinks:INFO: Disabling clock on downlink 0 08:03:20:elinks:INFO: Disabling clock on downlink 1 08:03:20:elinks:INFO: Disabling clock on downlink 2 08:03:20:elinks:INFO: Disabling clock on downlink 3 08:03:20:elinks:INFO: Disabling clock on downlink 4 08:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:03:20:elinks:INFO: Disabling clock on downlink 0 08:03:20:elinks:INFO: Disabling clock on downlink 1 08:03:20:elinks:INFO: Disabling clock on downlink 2 08:03:20:elinks:INFO: Disabling clock on downlink 3 08:03:20:elinks:INFO: Disabling clock on downlink 4 08:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 08:03:20:setup_element:INFO: Scanning clock phase 08:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:03:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:03:21:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:03:21:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 08:03:21:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 08:03:21:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:03:21:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:03:21:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:03:21:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:03:21:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:03:21:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:03:21:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:03:21:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:03:21:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:03:21:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 ==============================================OOO============================================== 08:03:21:setup_element:INFO: Scanning data phases 08:03:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:03:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:03:26:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:03:26:setup_element:INFO: Eye window for uplink 0 : ___________X_XXXXXXX____________________ Data delay found: 35 08:03:26:setup_element:INFO: Eye window for uplink 1 : ________XXXXXXX_________________________ Data delay found: 31 08:03:26:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX___________________________ Data delay found: 29 08:03:26:setup_element:INFO: Eye window for uplink 3 : ____XXXXXX______________________________ Data delay found: 26 08:03:26:setup_element:INFO: Eye window for uplink 4 : ______XXXXXXX___________________________ Data delay found: 29 08:03:26:setup_element:INFO: Eye window for uplink 5 : __XXXXXXX_______________________________ Data delay found: 25 08:03:26:setup_element:INFO: Eye window for uplink 6 : _XXXXXX_________________________________ Data delay found: 23 08:03:26:setup_element:INFO: Eye window for uplink 7 : XXXX________________________________XXXX Data delay found: 19 08:03:26:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________ Data delay found: 7 08:03:26:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXX___ Data delay found: 13 08:03:26:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXX_______ Data delay found: 9 08:03:26:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____ Data delay found: 12 08:03:26:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXXX_______ Data delay found: 9 08:03:26:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXXX____ Data delay found: 12 08:03:26:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXXXX____ Data delay found: 12 08:03:26:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXXXXXX Data delay found: 14 08:03:26:setup_element:INFO: Setting the data phase to 35 for uplink 0 08:03:26:setup_element:INFO: Setting the data phase to 31 for uplink 1 08:03:26:setup_element:INFO: Setting the data phase to 29 for uplink 2 08:03:26:setup_element:INFO: Setting the data phase to 26 for uplink 3 08:03:26:setup_element:INFO: Setting the data phase to 29 for uplink 4 08:03:26:setup_element:INFO: Setting the data phase to 25 for uplink 5 08:03:26:setup_element:INFO: Setting the data phase to 23 for uplink 6 08:03:26:setup_element:INFO: Setting the data phase to 19 for uplink 7 08:03:26:setup_element:INFO: Setting the data phase to 7 for uplink 8 08:03:26:setup_element:INFO: Setting the data phase to 13 for uplink 9 08:03:26:setup_element:INFO: Setting the data phase to 9 for uplink 10 08:03:26:setup_element:INFO: Setting the data phase to 12 for uplink 11 08:03:26:setup_element:INFO: Setting the data phase to 9 for uplink 12 08:03:26:setup_element:INFO: Setting the data phase to 12 for uplink 13 08:03:26:setup_element:INFO: Setting the data phase to 12 for uplink 14 08:03:26:setup_element:INFO: Setting the data phase to 14 for uplink 15 ==============================================OOO============================================== 08:03:26:setup_element:INFO: Beginning SMX ASICs map scan 08:03:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:03:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:03:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:03:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:03:26:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:03:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:03:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:03:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:03:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:03:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:03:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:03:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:03:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:03:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:03:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:03:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 08:03:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:03:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:03:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:03:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:03:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:03:29:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 68 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXXX Uplink 1: _______________________________________________________________________XXXXXXXXX Uplink 2: _____________________________________________________________________XXXXXXXXX__ Uplink 3: _____________________________________________________________________XXXXXXXXX__ Uplink 4: ______________________________________________________________________XXXXXXXXX_ Uplink 5: ______________________________________________________________________XXXXXXXXX_ Uplink 6: ______________________________________________________________________XXXXXXXXX_ Uplink 7: ______________________________________________________________________XXXXXXXXX_ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: ____________________________________________________________________XXXXXXXX____ Uplink 11: ____________________________________________________________________XXXXXXXX____ Uplink 12: ____________________________________________________________________XXXXXXXX____ Uplink 13: ____________________________________________________________________XXXXXXXX____ Uplink 14: ______________________________________________________________________XXXXXXXXX_ Uplink 15: ______________________________________________________________________XXXXXXXXX_ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 31 Eye Window: ___________X_XXXXXXX____________________ Uplink 1: Optimal Phase: 31 Window Length: 33 Eye Window: ________XXXXXXX_________________________ Uplink 2: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 3: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 4: Optimal Phase: 29 Window Length: 33 Eye Window: ______XXXXXXX___________________________ Uplink 5: Optimal Phase: 25 Window Length: 33 Eye Window: __XXXXXXX_______________________________ Uplink 6: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 7: Optimal Phase: 19 Window Length: 32 Eye Window: XXXX________________________________XXXX Uplink 8: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 10: Optimal Phase: 9 Window Length: 33 Eye Window: __________________________XXXXXXX_______ Uplink 11: Optimal Phase: 12 Window Length: 34 Eye Window: ______________________________XXXXXX____ Uplink 12: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 13: Optimal Phase: 12 Window Length: 33 Eye Window: _____________________________XXXXXXX____ Uplink 14: Optimal Phase: 12 Window Length: 33 Eye Window: _____________________________XXXXXXX____ Uplink 15: Optimal Phase: 14 Window Length: 30 Eye Window: ______________________________XXXXXXXXXX ==============================================OOO============================================== 08:03:29:setup_element:INFO: Performing Elink synchronization 08:03:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:03:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:03:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:03:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] ==============================================OOO============================================== 08:03:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:03:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 08:03:30:febtest:INFO: Init all SMX (CSA): 30 08:03:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:03:44:febtest:INFO: 01-00 | XA-000-09-004-004-011-016-10 | 21.9 | 1177.4 08:03:44:febtest:INFO: 08-01 | XA-000-09-004-004-011-019-10 | 28.2 | 1141.9 08:03:44:febtest:INFO: 03-02 | XA-000-09-004-004-011-015-13 | 21.9 | 1183.3 08:03:45:febtest:INFO: 10-03 | XA-000-09-004-004-011-014-13 | 21.9 | 1165.6 08:03:45:febtest:INFO: 05-04 | XA-000-09-004-004-012-013-05 | 34.6 | 1147.8 08:03:45:febtest:INFO: 12-05 | XA-000-09-004-004-012-015-05 | 21.9 | 1159.7 08:03:45:febtest:INFO: 07-06 | XA-000-09-004-004-012-019-02 | 31.4 | 1147.8 08:03:46:febtest:INFO: 14-07 | XA-000-09-004-004-012-017-02 | 9.3 | 1206.9 08:03:47:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 08:03:49:ST3_smx:INFO: chip: 1-0 21.902970 C 1189.190035 mV 08:03:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:03:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:03:49:ST3_smx:INFO: Electrons 08:03:49:ST3_smx:INFO: # loops 0 08:03:50:ST3_smx:INFO: # loops 1 08:03:52:ST3_smx:INFO: # loops 2 08:03:53:ST3_smx:INFO: # loops 3 08:03:55:ST3_smx:INFO: # loops 4 08:03:56:ST3_smx:INFO: Total # of broken channels: 0 08:03:56:ST3_smx:INFO: List of broken channels: [] 08:03:56:ST3_smx:INFO: Total # of broken channels: 0 08:03:56:ST3_smx:INFO: List of broken channels: [] 08:03:58:ST3_smx:INFO: chip: 8-1 31.389742 C 1153.732915 mV 08:03:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:03:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:03:58:ST3_smx:INFO: Electrons 08:03:58:ST3_smx:INFO: # loops 0 08:04:00:ST3_smx:INFO: # loops 1 08:04:02:ST3_smx:INFO: # loops 2 08:04:03:ST3_smx:INFO: # loops 3 08:04:05:ST3_smx:INFO: # loops 4 08:04:06:ST3_smx:INFO: Total # of broken channels: 0 08:04:06:ST3_smx:INFO: List of broken channels: [] 08:04:06:ST3_smx:INFO: Total # of broken channels: 0 08:04:06:ST3_smx:INFO: List of broken channels: [] 08:04:08:ST3_smx:INFO: chip: 3-2 21.902970 C 1195.082160 mV 08:04:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:08:ST3_smx:INFO: Electrons 08:04:08:ST3_smx:INFO: # loops 0 08:04:10:ST3_smx:INFO: # loops 1 08:04:11:ST3_smx:INFO: # loops 2 08:04:13:ST3_smx:INFO: # loops 3 08:04:15:ST3_smx:INFO: # loops 4 08:04:16:ST3_smx:INFO: Total # of broken channels: 0 08:04:16:ST3_smx:INFO: List of broken channels: [] 08:04:16:ST3_smx:INFO: Total # of broken channels: 0 08:04:16:ST3_smx:INFO: List of broken channels: [] 08:04:18:ST3_smx:INFO: chip: 10-3 21.902970 C 1177.390875 mV 08:04:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:18:ST3_smx:INFO: Electrons 08:04:18:ST3_smx:INFO: # loops 0 08:04:20:ST3_smx:INFO: # loops 1 08:04:21:ST3_smx:INFO: # loops 2 08:04:23:ST3_smx:INFO: # loops 3 08:04:24:ST3_smx:INFO: # loops 4 08:04:26:ST3_smx:INFO: Total # of broken channels: 0 08:04:26:ST3_smx:INFO: List of broken channels: [] 08:04:26:ST3_smx:INFO: Total # of broken channels: 0 08:04:26:ST3_smx:INFO: List of broken channels: [] 08:04:28:ST3_smx:INFO: chip: 5-4 34.556970 C 1153.732915 mV 08:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:28:ST3_smx:INFO: Electrons 08:04:28:ST3_smx:INFO: # loops 0 08:04:29:ST3_smx:INFO: # loops 1 08:04:31:ST3_smx:INFO: # loops 2 08:04:32:ST3_smx:INFO: # loops 3 08:04:34:ST3_smx:INFO: # loops 4 08:04:35:ST3_smx:INFO: Total # of broken channels: 0 08:04:35:ST3_smx:INFO: List of broken channels: [] 08:04:35:ST3_smx:INFO: Total # of broken channels: 7 08:04:35:ST3_smx:INFO: List of broken channels: [64, 66, 78, 80, 84, 86, 100] 08:04:37:ST3_smx:INFO: chip: 12-5 25.062742 C 1171.483840 mV 08:04:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:37:ST3_smx:INFO: Electrons 08:04:37:ST3_smx:INFO: # loops 0 08:04:39:ST3_smx:INFO: # loops 1 08:04:40:ST3_smx:INFO: # loops 2 08:04:42:ST3_smx:INFO: # loops 3 08:04:43:ST3_smx:INFO: # loops 4 08:04:45:ST3_smx:INFO: Total # of broken channels: 0 08:04:45:ST3_smx:INFO: List of broken channels: [] 08:04:45:ST3_smx:INFO: Total # of broken channels: 1 08:04:45:ST3_smx:INFO: List of broken channels: [73] 08:04:47:ST3_smx:INFO: chip: 7-6 34.556970 C 1153.732915 mV 08:04:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:47:ST3_smx:INFO: Electrons 08:04:47:ST3_smx:INFO: # loops 0 08:04:48:ST3_smx:INFO: # loops 1 08:04:50:ST3_smx:INFO: # loops 2 08:04:51:ST3_smx:INFO: # loops 3 08:04:53:ST3_smx:INFO: # loops 4 08:04:54:ST3_smx:INFO: Total # of broken channels: 0 08:04:54:ST3_smx:INFO: List of broken channels: [] 08:04:54:ST3_smx:INFO: Total # of broken channels: 0 08:04:54:ST3_smx:INFO: List of broken channels: [] 08:04:56:ST3_smx:INFO: chip: 14-7 9.288730 C 1218.600960 mV 08:04:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:04:56:ST3_smx:INFO: Electrons 08:04:56:ST3_smx:INFO: # loops 0 08:04:58:ST3_smx:INFO: # loops 1 08:04:59:ST3_smx:INFO: # loops 2 08:05:01:ST3_smx:INFO: # loops 3 08:05:02:ST3_smx:INFO: # loops 4 08:05:04:ST3_smx:INFO: Total # of broken channels: 0 08:05:04:ST3_smx:INFO: List of broken channels: [] 08:05:04:ST3_smx:INFO: Total # of broken channels: 0 08:05:04:ST3_smx:INFO: List of broken channels: [] 08:05:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:05:04:febtest:INFO: 01-00 | XA-000-09-004-004-011-016-10 | 25.1 | 1206.9 08:05:05:febtest:INFO: 08-01 | XA-000-09-004-004-011-019-10 | 31.4 | 1171.5 08:05:05:febtest:INFO: 03-02 | XA-000-09-004-004-011-015-13 | 21.9 | 1218.6 08:05:05:febtest:INFO: 10-03 | XA-000-09-004-004-011-014-13 | 25.1 | 1189.2 08:05:05:febtest:INFO: 05-04 | XA-000-09-004-004-012-013-05 | 34.6 | 1177.4 08:05:06:febtest:INFO: 12-05 | XA-000-09-004-004-012-015-05 | 25.1 | 1189.2 08:05:06:febtest:INFO: 07-06 | XA-000-09-004-004-012-019-02 | 34.6 | 1177.4 08:05:06:febtest:INFO: 14-07 | XA-000-09-004-004-012-017-02 | 12.4 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_11_08-08_02_57 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1275| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ SENSOR_NAME: 18144 | SIZE: 62x124 | GRADE: A MODULE_NAME: M6UL4T3110363B2 LADDER_NAME: L6UL401036 ------------------------------------------------------------ VI_before_Init : ['2.449', '1.5210', '1.849', '1.8970', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0270', '1.850', '2.5310', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5258', '0.000', '0.0000', '0.000', '0.0000']