FEB_1275    23.10.24 11:39:35

TextEdit.txt
            11:39:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:39:35:ST3_Shared:INFO:	                       FEB-Microcable                       
11:39:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:39:35:febtest:INFO:	Testing FEB with SN 1275
11:39:36:smx_tester:INFO:	Scanning setup
11:39:36:elinks:INFO:	Disabling clock on downlink 0
11:39:36:elinks:INFO:	Disabling clock on downlink 1
11:39:36:elinks:INFO:	Disabling clock on downlink 2
11:39:36:elinks:INFO:	Disabling clock on downlink 3
11:39:36:elinks:INFO:	Disabling clock on downlink 4
11:39:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:39:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:39:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:39:37:elinks:INFO:	Disabling clock on downlink 0
11:39:37:elinks:INFO:	Disabling clock on downlink 1
11:39:37:elinks:INFO:	Disabling clock on downlink 2
11:39:37:elinks:INFO:	Disabling clock on downlink 3
11:39:37:elinks:INFO:	Disabling clock on downlink 4
11:39:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:39:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:39:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:39:37:elinks:INFO:	Disabling clock on downlink 0
11:39:37:elinks:INFO:	Disabling clock on downlink 1
11:39:37:elinks:INFO:	Disabling clock on downlink 2
11:39:37:elinks:INFO:	Disabling clock on downlink 3
11:39:37:elinks:INFO:	Disabling clock on downlink 4
11:39:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:39:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:39:37:elinks:INFO:	Disabling clock on downlink 0
11:39:37:elinks:INFO:	Disabling clock on downlink 1
11:39:37:elinks:INFO:	Disabling clock on downlink 2
11:39:37:elinks:INFO:	Disabling clock on downlink 3
11:39:37:elinks:INFO:	Disabling clock on downlink 4
11:39:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:39:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:39:37:elinks:INFO:	Disabling clock on downlink 0
11:39:37:elinks:INFO:	Disabling clock on downlink 1
11:39:37:elinks:INFO:	Disabling clock on downlink 2
11:39:37:elinks:INFO:	Disabling clock on downlink 3
11:39:37:elinks:INFO:	Disabling clock on downlink 4
11:39:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:39:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:39:37:setup_element:INFO:	Scanning clock phase
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:39:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:39:37:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:39:37:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:39:37:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:39:37:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:39:37:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:39:37:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:39:37:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:39:37:setup_element:INFO:	Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:39:37:setup_element:INFO:	Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:39:37:setup_element:INFO:	Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:39:37:setup_element:INFO:	Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:39:37:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:39:37:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
11:39:37:setup_element:INFO:	Scanning data phases
11:39:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:39:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:39:43:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:39:43:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXXXX_____________________
Data delay found: 35
11:39:43:setup_element:INFO:	Eye window for uplink 1 : _______XXXXXXX__________________________
Data delay found: 30
11:39:43:setup_element:INFO:	Eye window for uplink 2 : ______XXXXXX____________________________
Data delay found: 28
11:39:43:setup_element:INFO:	Eye window for uplink 3 : ___XXXXXX_______________________________
Data delay found: 25
11:39:43:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXX____________________________
Data delay found: 28
11:39:43:setup_element:INFO:	Eye window for uplink 5 : __XXXXXX________________________________
Data delay found: 24
11:39:43:setup_element:INFO:	Eye window for uplink 6 : XXXXXX__________________________________
Data delay found: 22
11:39:43:setup_element:INFO:	Eye window for uplink 7 : XXX________________________________XXXXX
Data delay found: 18
11:39:43:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXXXX__________
Data delay found: 6
11:39:43:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
11:39:43:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXXX_______
Data delay found: 9
11:39:43:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXXX____
Data delay found: 12
11:39:43:setup_element:INFO:	Eye window for uplink 12: ________________________XXXXXXXX________
Data delay found: 7
11:39:43:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXXXX____
Data delay found: 11
11:39:43:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXXXX____
Data delay found: 11
11:39:43:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXXXXX___
Data delay found: 12
11:39:43:setup_element:INFO:	Setting the data phase to 35 for uplink 0
11:39:43:setup_element:INFO:	Setting the data phase to 30 for uplink 1
11:39:43:setup_element:INFO:	Setting the data phase to 28 for uplink 2
11:39:43:setup_element:INFO:	Setting the data phase to 25 for uplink 3
11:39:43:setup_element:INFO:	Setting the data phase to 28 for uplink 4
11:39:43:setup_element:INFO:	Setting the data phase to 24 for uplink 5
11:39:43:setup_element:INFO:	Setting the data phase to 22 for uplink 6
11:39:43:setup_element:INFO:	Setting the data phase to 18 for uplink 7
11:39:43:setup_element:INFO:	Setting the data phase to 6 for uplink 8
11:39:43:setup_element:INFO:	Setting the data phase to 11 for uplink 9
11:39:43:setup_element:INFO:	Setting the data phase to 9 for uplink 10
11:39:43:setup_element:INFO:	Setting the data phase to 12 for uplink 11
11:39:43:setup_element:INFO:	Setting the data phase to 7 for uplink 12
11:39:43:setup_element:INFO:	Setting the data phase to 11 for uplink 13
11:39:43:setup_element:INFO:	Setting the data phase to 11 for uplink 14
11:39:43:setup_element:INFO:	Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
11:39:43:setup_element:INFO:	Beginning SMX ASICs map scan
11:39:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:39:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:39:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:39:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:39:43:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:39:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:39:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:39:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:39:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:39:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:39:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:39:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:39:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:39:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:39:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:39:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:39:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:39:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:39:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:39:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:39:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:39:46:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXXX
      Uplink  1: _______________________________________________________________________XXXXXXXXX
      Uplink  2: _____________________________________________________________________XXXXXXXXX__
      Uplink  3: _____________________________________________________________________XXXXXXXXX__
      Uplink  4: ______________________________________________________________________XXXXXXXXX_
      Uplink  5: ______________________________________________________________________XXXXXXXXX_
      Uplink  6: ______________________________________________________________________XXXXXXXXX_
      Uplink  7: ______________________________________________________________________XXXXXXXXX_
      Uplink  8: ____________________________________________________________________XXXXXXXXX___
      Uplink  9: ____________________________________________________________________XXXXXXXXX___
      Uplink 10: ____________________________________________________________________XXXXXXXXX___
      Uplink 11: ____________________________________________________________________XXXXXXXXX___
      Uplink 12: ____________________________________________________________________XXXXXXXX____
      Uplink 13: ____________________________________________________________________XXXXXXXX____
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 3:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 8:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 33
      Eye Window: __________________________XXXXXXX_______
    Uplink 11:
      Optimal Phase: 12
      Window Length: 33
      Eye Window: _____________________________XXXXXXX____
    Uplink 12:
      Optimal Phase: 7
      Window Length: 32
      Eye Window: ________________________XXXXXXXX________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 32
      Eye Window: ____________________________XXXXXXXX____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 32
      Eye Window: ____________________________XXXXXXXX____
    Uplink 15:
      Optimal Phase: 12
      Window Length: 32
      Eye Window: _____________________________XXXXXXXX___

==============================================OOO==============================================
11:39:46:setup_element:INFO:	Performing Elink synchronization
11:39:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:39:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:39:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:39:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:39:46:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:39:46:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:39:47:febtest:INFO:	Init all SMX (CSA): 30
11:40:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:40:01:febtest:INFO:	01-00 | XA-000-09-004-004-011-016-10 |  34.6 | 1165.6
11:40:01:febtest:INFO:	08-01 | XA-000-09-004-004-011-019-10 |  40.9 | 1141.9
11:40:02:febtest:INFO:	03-02 | XA-000-09-004-004-011-015-13 |  34.6 | 1183.3
11:40:02:febtest:INFO:	10-03 | XA-000-09-004-004-011-014-13 |  34.6 | 1159.7
11:40:02:febtest:INFO:	05-04 | XA-000-09-004-004-012-013-05 |  44.1 | 1147.8
11:40:02:febtest:INFO:	12-05 | XA-000-09-004-004-012-015-05 |  34.6 | 1153.7
11:40:02:febtest:INFO:	07-06 | XA-000-09-004-004-012-019-02 |  40.9 | 1147.8
11:40:03:febtest:INFO:	14-07 | XA-000-09-004-004-012-017-02 |  21.9 | 1201.0
11:40:04:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:40:06:ST3_smx:INFO:	chip: 1-0 	 34.556970 C 	 1177.390875 mV
11:40:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:06:ST3_smx:INFO:		Electrons
11:40:06:ST3_smx:INFO:	# loops 0
11:40:07:ST3_smx:INFO:	# loops 1
11:40:09:ST3_smx:INFO:	# loops 2
11:40:11:ST3_smx:INFO:	Total # of broken channels: 1
11:40:11:ST3_smx:INFO:	List of broken channels: [46]
11:40:11:ST3_smx:INFO:	Total # of broken channels: 0
11:40:11:ST3_smx:INFO:	List of broken channels: []
11:40:13:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1147.806000 mV
11:40:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:13:ST3_smx:INFO:		Electrons
11:40:13:ST3_smx:INFO:	# loops 0
11:40:14:ST3_smx:INFO:	# loops 1
11:40:16:ST3_smx:INFO:	# loops 2
11:40:17:ST3_smx:INFO:	Total # of broken channels: 0
11:40:17:ST3_smx:INFO:	List of broken channels: []
11:40:17:ST3_smx:INFO:	Total # of broken channels: 24
11:40:17:ST3_smx:INFO:	List of broken channels: [9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 57]
11:40:19:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1195.082160 mV
11:40:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:19:ST3_smx:INFO:		Electrons
11:40:19:ST3_smx:INFO:	# loops 0
11:40:21:ST3_smx:INFO:	# loops 1
11:40:22:ST3_smx:INFO:	# loops 2
11:40:24:ST3_smx:INFO:	Total # of broken channels: 0
11:40:24:ST3_smx:INFO:	List of broken channels: []
11:40:24:ST3_smx:INFO:	Total # of broken channels: 22
11:40:24:ST3_smx:INFO:	List of broken channels: [20, 66, 74, 82, 84, 86, 92, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124]
11:40:26:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1171.483840 mV
11:40:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:26:ST3_smx:INFO:		Electrons
11:40:26:ST3_smx:INFO:	# loops 0
11:40:28:ST3_smx:INFO:	# loops 1
11:40:29:ST3_smx:INFO:	# loops 2
11:40:31:ST3_smx:INFO:	Total # of broken channels: 0
11:40:31:ST3_smx:INFO:	List of broken channels: []
11:40:31:ST3_smx:INFO:	Total # of broken channels: 0
11:40:31:ST3_smx:INFO:	List of broken channels: []
11:40:33:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1159.654860 mV
11:40:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:33:ST3_smx:INFO:		Electrons
11:40:33:ST3_smx:INFO:	# loops 0
11:40:34:ST3_smx:INFO:	# loops 1
11:40:36:ST3_smx:INFO:	# loops 2
11:40:37:ST3_smx:INFO:	Total # of broken channels: 2
11:40:37:ST3_smx:INFO:	List of broken channels: [66, 86]
11:40:37:ST3_smx:INFO:	Total # of broken channels: 8
11:40:37:ST3_smx:INFO:	List of broken channels: [64, 66, 70, 78, 80, 84, 86, 100]
11:40:39:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1165.571835 mV
11:40:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:39:ST3_smx:INFO:		Electrons
11:40:39:ST3_smx:INFO:	# loops 0
11:40:41:ST3_smx:INFO:	# loops 1
11:40:43:ST3_smx:INFO:	# loops 2
11:40:44:ST3_smx:INFO:	Total # of broken channels: 1
11:40:44:ST3_smx:INFO:	List of broken channels: [7]
11:40:44:ST3_smx:INFO:	Total # of broken channels: 31
11:40:44:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 63]
11:40:46:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1159.654860 mV
11:40:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:46:ST3_smx:INFO:		Electrons
11:40:46:ST3_smx:INFO:	# loops 0
11:40:48:ST3_smx:INFO:	# loops 1
11:40:49:ST3_smx:INFO:	# loops 2
11:40:51:ST3_smx:INFO:	Total # of broken channels: 0
11:40:51:ST3_smx:INFO:	List of broken channels: []
11:40:51:ST3_smx:INFO:	Total # of broken channels: 22
11:40:51:ST3_smx:INFO:	List of broken channels: [46, 48, 54, 60, 64, 66, 72, 76, 78, 84, 88, 90, 94, 98, 100, 102, 106, 108, 114, 116, 118, 120]
11:40:52:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1212.728715 mV
11:40:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:40:53:ST3_smx:INFO:		Electrons
11:40:53:ST3_smx:INFO:	# loops 0
11:40:54:ST3_smx:INFO:	# loops 1
11:40:56:ST3_smx:INFO:	# loops 2
11:40:57:ST3_smx:INFO:	Total # of broken channels: 0
11:40:57:ST3_smx:INFO:	List of broken channels: []
11:40:57:ST3_smx:INFO:	Total # of broken channels: 0
11:40:57:ST3_smx:INFO:	List of broken channels: []
11:40:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:40:58:febtest:INFO:	01-00 | XA-000-09-004-004-011-016-10 |  37.7 | 1201.0
11:40:58:febtest:INFO:	08-01 | XA-000-09-004-004-011-019-10 |  40.9 | 1171.5
11:40:58:febtest:INFO:	03-02 | XA-000-09-004-004-011-015-13 |  34.6 | 1218.6
11:40:59:febtest:INFO:	10-03 | XA-000-09-004-004-011-014-13 |  34.6 | 1195.1
11:40:59:febtest:INFO:	05-04 | XA-000-09-004-004-012-013-05 |  44.1 | 1183.3
11:40:59:febtest:INFO:	12-05 | XA-000-09-004-004-012-015-05 |  37.7 | 1183.3
11:40:59:febtest:INFO:	07-06 | XA-000-09-004-004-012-019-02 |  44.1 | 1183.3
11:40:59:febtest:INFO:	14-07 | XA-000-09-004-004-012-017-02 |  25.1 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_23-11_39_35
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1275| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5310', '1.848', '2.1720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9820', '1.850', '2.4450', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9710', '1.850', '0.5270', '0.000', '0.0000', '0.000', '0.0000']