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FEB_1278 07.11.24 10:51:15
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10:51:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:51:15:ST3_Shared:INFO: FEB-Microcable
10:51:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:51:15:febtest:INFO: Testing FEB with SN 1278
10:51:16:smx_tester:INFO: Scanning setup
10:51:16:elinks:INFO: Disabling clock on downlink 0
10:51:16:elinks:INFO: Disabling clock on downlink 1
10:51:16:elinks:INFO: Disabling clock on downlink 2
10:51:16:elinks:INFO: Disabling clock on downlink 3
10:51:16:elinks:INFO: Disabling clock on downlink 4
10:51:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:51:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:16:elinks:INFO: Disabling clock on downlink 0
10:51:16:elinks:INFO: Disabling clock on downlink 1
10:51:16:elinks:INFO: Disabling clock on downlink 2
10:51:16:elinks:INFO: Disabling clock on downlink 3
10:51:16:elinks:INFO: Disabling clock on downlink 4
10:51:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:51:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:51:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:16:elinks:INFO: Disabling clock on downlink 0
10:51:16:elinks:INFO: Disabling clock on downlink 1
10:51:16:elinks:INFO: Disabling clock on downlink 2
10:51:16:elinks:INFO: Disabling clock on downlink 3
10:51:16:elinks:INFO: Disabling clock on downlink 4
10:51:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:17:elinks:INFO: Disabling clock on downlink 0
10:51:17:elinks:INFO: Disabling clock on downlink 1
10:51:17:elinks:INFO: Disabling clock on downlink 2
10:51:17:elinks:INFO: Disabling clock on downlink 3
10:51:17:elinks:INFO: Disabling clock on downlink 4
10:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:51:17:elinks:INFO: Disabling clock on downlink 0
10:51:17:elinks:INFO: Disabling clock on downlink 1
10:51:17:elinks:INFO: Disabling clock on downlink 2
10:51:17:elinks:INFO: Disabling clock on downlink 3
10:51:17:elinks:INFO: Disabling clock on downlink 4
10:51:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:51:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:51:17:setup_element:INFO: Scanning clock phase
10:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:51:17:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:51:17:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:51:17:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:51:17:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:51:17:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:51:17:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:51:17:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:51:17:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:51:17:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
10:51:17:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
10:51:17:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 1
==============================================OOO==============================================
10:51:17:setup_element:INFO: Scanning data phases
10:51:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:51:23:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:51:23:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXXX_______________________
Data delay found: 32
10:51:23:setup_element:INFO: Eye window for uplink 1 : ____XXXXXXXX____________________________
Data delay found: 27
10:51:23:setup_element:INFO: Eye window for uplink 2 : ______XXXXXXXX__________________________
Data delay found: 29
10:51:23:setup_element:INFO: Eye window for uplink 3 : ____XXXXXXX_____________________________
Data delay found: 27
10:51:23:setup_element:INFO: Eye window for uplink 4 : _____XXXXXXX____________________________
Data delay found: 28
10:51:23:setup_element:INFO: Eye window for uplink 5 : _XXXXXX_________________________________
Data delay found: 23
10:51:23:setup_element:INFO: Eye window for uplink 6 : XXXXX_________________________________XX
Data delay found: 21
10:51:23:setup_element:INFO: Eye window for uplink 7 : XX_______________________________XXXXXXX
Data delay found: 17
10:51:23:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXX_______________
Data delay found: 2
10:51:23:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXXXX_________
Data delay found: 6
10:51:23:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXXXX___________
Data delay found: 4
10:51:23:setup_element:INFO: Eye window for uplink 11: _________________________XXXXXXX________
Data delay found: 8
10:51:23:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXXXX________
Data delay found: 7
10:51:23:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXXX______
Data delay found: 9
10:51:23:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXXXX__________
Data delay found: 5
10:51:23:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXXXXX________
Data delay found: 7
10:51:23:setup_element:INFO: Setting the data phase to 32 for uplink 0
10:51:23:setup_element:INFO: Setting the data phase to 27 for uplink 1
10:51:23:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:51:23:setup_element:INFO: Setting the data phase to 27 for uplink 3
10:51:23:setup_element:INFO: Setting the data phase to 28 for uplink 4
10:51:23:setup_element:INFO: Setting the data phase to 23 for uplink 5
10:51:23:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:51:23:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:51:23:setup_element:INFO: Setting the data phase to 2 for uplink 8
10:51:23:setup_element:INFO: Setting the data phase to 6 for uplink 9
10:51:23:setup_element:INFO: Setting the data phase to 4 for uplink 10
10:51:23:setup_element:INFO: Setting the data phase to 8 for uplink 11
10:51:23:setup_element:INFO: Setting the data phase to 7 for uplink 12
10:51:23:setup_element:INFO: Setting the data phase to 9 for uplink 13
10:51:23:setup_element:INFO: Setting the data phase to 5 for uplink 14
10:51:23:setup_element:INFO: Setting the data phase to 7 for uplink 15
==============================================OOO==============================================
10:51:23:setup_element:INFO: Beginning SMX ASICs map scan
10:51:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:51:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:51:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:51:23:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:51:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:51:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:51:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:51:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:51:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:51:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:51:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:51:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:51:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:51:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:51:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:51:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:51:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:51:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:51:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:51:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:51:26:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 67
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXXXX___
Uplink 1: _____________________________________________________________________XXXXXXXX___
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: _____________________________________________________________________XXXXXXXX___
Uplink 5: _____________________________________________________________________XXXXXXXX___
Uplink 6: _____________________________________________________________________XXXXXXX____
Uplink 7: _____________________________________________________________________XXXXXXX____
Uplink 8: _________________________________________________________________XXXXXXXX_______
Uplink 9: _________________________________________________________________XXXXXXXX_______
Uplink 10: __________________________________________________________________XXXXXXXX______
Uplink 11: __________________________________________________________________XXXXXXXX______
Uplink 12: __________________________________________________________________XXXXXXXX______
Uplink 13: __________________________________________________________________XXXXXXXX______
Uplink 14: ________________________________________________________________XXXXXXXX________
Uplink 15: ________________________________________________________________XXXXXXXX________
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 32
Eye Window: _________XXXXXXXX_______________________
Uplink 1:
Optimal Phase: 27
Window Length: 32
Eye Window: ____XXXXXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 3:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 7:
Optimal Phase: 17
Window Length: 31
Eye Window: XX_______________________________XXXXXXX
Uplink 8:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 9:
Optimal Phase: 6
Window Length: 32
Eye Window: _______________________XXXXXXXX_________
Uplink 10:
Optimal Phase: 4
Window Length: 32
Eye Window: _____________________XXXXXXXX___________
Uplink 11:
Optimal Phase: 8
Window Length: 33
Eye Window: _________________________XXXXXXX________
Uplink 12:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 13:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 14:
Optimal Phase: 5
Window Length: 31
Eye Window: _____________________XXXXXXXXX__________
Uplink 15:
Optimal Phase: 7
Window Length: 31
Eye Window: _______________________XXXXXXXXX________
==============================================OOO==============================================
10:51:26:setup_element:INFO: Performing Elink synchronization
10:51:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:51:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:51:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:51:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:51:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:51:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:51:26:febtest:INFO: Init all SMX (CSA): 30
10:51:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:51:41:febtest:INFO: 01-00 | XA-000-09-004-012-011-011-02 | 9.3 | 1265.4
10:51:41:febtest:INFO: 08-01 | XA-000-09-004-012-012-009-10 | -6.4 | 1317.7
10:51:41:febtest:INFO: 03-02 | XA-000-09-004-012-012-005-10 | 15.6 | 1247.9
10:51:42:febtest:INFO: 10-03 | XA-000-09-004-012-012-006-10 | 12.4 | 1253.7
10:51:42:febtest:INFO: 05-04 | XA-000-09-004-012-011-002-02 | 15.6 | 1253.7
10:51:42:febtest:INFO: 12-05 | XA-000-09-004-012-010-011-15 | 15.6 | 1242.0
10:51:42:febtest:INFO: 07-06 | XA-000-09-004-012-010-002-15 | 12.4 | 1259.6
10:51:43:febtest:INFO: 14-07 | XA-000-09-004-012-011-009-02 | -3.3 | 1311.9
10:51:44:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:51:46:ST3_smx:INFO: chip: 1-0 12.438562 C 1277.050060 mV
10:51:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:46:ST3_smx:INFO: Electrons
10:51:46:ST3_smx:INFO: # loops 0
10:51:47:ST3_smx:INFO: # loops 1
10:51:49:ST3_smx:INFO: # loops 2
10:51:51:ST3_smx:INFO: Total # of broken channels: 0
10:51:51:ST3_smx:INFO: List of broken channels: []
10:51:51:ST3_smx:INFO: Total # of broken channels: 0
10:51:51:ST3_smx:INFO: List of broken channels: []
10:51:52:ST3_smx:INFO: chip: 8-1 -6.423158 C 1323.451500 mV
10:51:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:52:ST3_smx:INFO: Electrons
10:51:52:ST3_smx:INFO: # loops 0
10:51:54:ST3_smx:INFO: # loops 1
10:51:56:ST3_smx:INFO: # loops 2
10:51:57:ST3_smx:INFO: Total # of broken channels: 0
10:51:57:ST3_smx:INFO: List of broken channels: []
10:51:57:ST3_smx:INFO: Total # of broken channels: 27
10:51:57:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 59, 67]
10:51:59:ST3_smx:INFO: chip: 3-2 15.590880 C 1253.730060 mV
10:51:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:51:59:ST3_smx:INFO: Electrons
10:51:59:ST3_smx:INFO: # loops 0
10:52:01:ST3_smx:INFO: # loops 1
10:52:02:ST3_smx:INFO: # loops 2
10:52:04:ST3_smx:INFO: Total # of broken channels: 0
10:52:04:ST3_smx:INFO: List of broken channels: []
10:52:04:ST3_smx:INFO: Total # of broken channels: 34
10:52:04:ST3_smx:INFO: List of broken channels: [42, 48, 52, 58, 62, 64, 66, 68, 70, 72, 74, 76, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 120, 122, 124, 126]
10:52:06:ST3_smx:INFO: chip: 10-3 12.438562 C 1259.567515 mV
10:52:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:06:ST3_smx:INFO: Electrons
10:52:06:ST3_smx:INFO: # loops 0
10:52:07:ST3_smx:INFO: # loops 1
10:52:09:ST3_smx:INFO: # loops 2
10:52:11:ST3_smx:INFO: Total # of broken channels: 0
10:52:11:ST3_smx:INFO: List of broken channels: []
10:52:11:ST3_smx:INFO: Total # of broken channels: 0
10:52:11:ST3_smx:INFO: List of broken channels: []
10:52:12:ST3_smx:INFO: chip: 5-4 15.590880 C 1259.567515 mV
10:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:12:ST3_smx:INFO: Electrons
10:52:12:ST3_smx:INFO: # loops 0
10:52:14:ST3_smx:INFO: # loops 1
10:52:16:ST3_smx:INFO: # loops 2
10:52:17:ST3_smx:INFO: Total # of broken channels: 0
10:52:17:ST3_smx:INFO: List of broken channels: []
10:52:17:ST3_smx:INFO: Total # of broken channels: 0
10:52:17:ST3_smx:INFO: List of broken channels: []
10:52:19:ST3_smx:INFO: chip: 12-5 15.590880 C 1253.730060 mV
10:52:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:19:ST3_smx:INFO: Electrons
10:52:19:ST3_smx:INFO: # loops 0
10:52:21:ST3_smx:INFO: # loops 1
10:52:22:ST3_smx:INFO: # loops 2
10:52:24:ST3_smx:INFO: Total # of broken channels: 0
10:52:24:ST3_smx:INFO: List of broken channels: []
10:52:24:ST3_smx:INFO: Total # of broken channels: 0
10:52:24:ST3_smx:INFO: List of broken channels: []
10:52:26:ST3_smx:INFO: chip: 7-6 12.438562 C 1271.227515 mV
10:52:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:26:ST3_smx:INFO: Electrons
10:52:26:ST3_smx:INFO: # loops 0
10:52:28:ST3_smx:INFO: # loops 1
10:52:29:ST3_smx:INFO: # loops 2
10:52:31:ST3_smx:INFO: Total # of broken channels: 0
10:52:31:ST3_smx:INFO: List of broken channels: []
10:52:31:ST3_smx:INFO: Total # of broken channels: 0
10:52:31:ST3_smx:INFO: List of broken channels: []
10:52:33:ST3_smx:INFO: chip: 14-7 -3.285750 C 1317.668715 mV
10:52:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:52:33:ST3_smx:INFO: Electrons
10:52:33:ST3_smx:INFO: # loops 0
10:52:34:ST3_smx:INFO: # loops 1
10:52:36:ST3_smx:INFO: # loops 2
10:52:38:ST3_smx:INFO: Total # of broken channels: 0
10:52:38:ST3_smx:INFO: List of broken channels: []
10:52:38:ST3_smx:INFO: Total # of broken channels: 0
10:52:38:ST3_smx:INFO: List of broken channels: []
10:52:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:52:38:febtest:INFO: 01-00 | XA-000-09-004-012-011-011-02 | 12.4 | 1288.7
10:52:38:febtest:INFO: 08-01 | XA-000-09-004-012-012-009-10 | -3.3 | 1340.8
10:52:39:febtest:INFO: 03-02 | XA-000-09-004-012-012-005-10 | 18.7 | 1271.2
10:52:39:febtest:INFO: 10-03 | XA-000-09-004-012-012-006-10 | 15.6 | 1271.2
10:52:39:febtest:INFO: 05-04 | XA-000-09-004-012-011-002-02 | 18.7 | 1277.1
10:52:39:febtest:INFO: 12-05 | XA-000-09-004-012-010-011-15 | 18.7 | 1265.4
10:52:39:febtest:INFO: 07-06 | XA-000-09-004-012-010-002-15 | 15.6 | 1282.9
10:52:40:febtest:INFO: 14-07 | XA-000-09-004-012-011-009-02 | -0.1 | 1329.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-10_51_15
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1278| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9620', '1.849', '1.3240', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.2000', '1.850', '1.7700', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.5202', '1.850', '1.7660', '0.000', '0.0000', '0.000', '0.0000']