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FEB_1281 16.12.24 14:31:16
TextEdit.txt
14:31:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:31:16:ST3_Shared:INFO: FEB-ASIC
14:31:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:31:21:ST3_Shared:INFO: STS mode selected
14:31:21:febtest:INFO: Testing FEB with SN 1281
14:31:22:smx_tester:INFO: Scanning setup
14:31:22:elinks:INFO: Disabling clock on downlink 0
14:31:22:elinks:INFO: Disabling clock on downlink 1
14:31:22:elinks:INFO: Disabling clock on downlink 2
14:31:22:elinks:INFO: Disabling clock on downlink 3
14:31:22:elinks:INFO: Disabling clock on downlink 4
14:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:31:22:elinks:INFO: Disabling clock on downlink 0
14:31:22:elinks:INFO: Disabling clock on downlink 1
14:31:22:elinks:INFO: Disabling clock on downlink 2
14:31:22:elinks:INFO: Disabling clock on downlink 3
14:31:22:elinks:INFO: Disabling clock on downlink 4
14:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:31:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:31:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:31:23:elinks:INFO: Disabling clock on downlink 0
14:31:23:elinks:INFO: Disabling clock on downlink 1
14:31:23:elinks:INFO: Disabling clock on downlink 2
14:31:23:elinks:INFO: Disabling clock on downlink 3
14:31:23:elinks:INFO: Disabling clock on downlink 4
14:31:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:31:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:31:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:31:23:elinks:INFO: Disabling clock on downlink 0
14:31:23:elinks:INFO: Disabling clock on downlink 1
14:31:23:elinks:INFO: Disabling clock on downlink 2
14:31:23:elinks:INFO: Disabling clock on downlink 3
14:31:23:elinks:INFO: Disabling clock on downlink 4
14:31:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:31:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:31:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:31:23:elinks:INFO: Disabling clock on downlink 0
14:31:23:elinks:INFO: Disabling clock on downlink 1
14:31:23:elinks:INFO: Disabling clock on downlink 2
14:31:23:elinks:INFO: Disabling clock on downlink 3
14:31:23:elinks:INFO: Disabling clock on downlink 4
14:31:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:31:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:31:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:31:23:setup_element:INFO: Scanning clock phase
14:31:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:31:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:23:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:31:23:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXX
Clock Delay: 47
14:31:23:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXX
Clock Delay: 47
14:31:23:setup_element:INFO: Eye window for uplink 2 : _______________XXXXX____________________________________________________________
Clock Delay: 57
14:31:23:setup_element:INFO: Eye window for uplink 3 : _______________XXXXX____________________________________________________________
Clock Delay: 57
14:31:23:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Clock Delay: 44
14:31:23:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Clock Delay: 44
14:31:23:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXX_X________________________________________________________________
Clock Delay: 47
14:31:23:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXX_X________________________________________________________________
Clock Delay: 47
14:31:23:setup_element:INFO: Eye window for uplink 8 : XXXXXX_X________________________________________________________________________
Clock Delay: 43
14:31:23:setup_element:INFO: Eye window for uplink 9 : XXXXXX_X________________________________________________________________________
Clock Delay: 43
14:31:23:setup_element:INFO: Eye window for uplink 10: XXXXXX_X________________________________________________________________________
Clock Delay: 43
14:31:23:setup_element:INFO: Eye window for uplink 11: XXXXXX_X________________________________________________________________________
Clock Delay: 43
14:31:23:setup_element:INFO: Eye window for uplink 12: XXXXXXXXXX______________________________________________________________________
Clock Delay: 44
14:31:23:setup_element:INFO: Eye window for uplink 13: XXXXXXXXXX______________________________________________________________________
Clock Delay: 44
14:31:23:setup_element:INFO: Eye window for uplink 14: XXX___________________________________________________________________XXXXXXXXXX
Clock Delay: 36
14:31:23:setup_element:INFO: Eye window for uplink 15: XXX___________________________________________________________________XXXXXXXXXX
Clock Delay: 36
14:31:23:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
14:31:23:setup_element:INFO: Scanning data phases
14:31:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:31:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:29:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:31:29:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXX__________XX_______________XXX
Data delay found: 29
14:31:29:setup_element:INFO: Eye window for uplink 1 : XXXX________________XX__________XXXXXXXX
Data delay found: 11
14:31:29:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXX___XXXXXXXXXXXX__XXXXXXXX
Data delay found: 16
14:31:29:setup_element:INFO: Eye window for uplink 3 : XXX__XXXXXXXXXX___XXXXXXXXXXXX__XXXXXXXX
Data delay found: 16
14:31:29:setup_element:INFO: Eye window for uplink 4 : XXX__XXXXXXX______________________X_XXXX
Data delay found: 22
14:31:29:setup_element:INFO: Eye window for uplink 5 : _____XXXXXXX___________________XXXXXXX__
Data delay found: 21
14:31:29:setup_element:INFO: Eye window for uplink 6 : __________________________XXXXXXXX______
Data delay found: 9
14:31:29:setup_element:INFO: Eye window for uplink 7 : _____________________X_XXXXXXXX_________
Data delay found: 5
14:31:29:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXX__XXXXXXXXXXXXXXXXX
Data delay found: 7
14:31:29:setup_element:INFO: Eye window for uplink 9 : ___________________XXXXXXXXXXXXXXXXXXXXX
Data delay found: 9
14:31:29:setup_element:INFO: Eye window for uplink 10: _____________XXXXXXXXXXX________________
Data delay found: 38
14:31:29:setup_element:INFO: Eye window for uplink 11: _________________XXXXXXXXXXX____________
Data delay found: 2
14:31:29:setup_element:INFO: Eye window for uplink 12: _____XXX______X_XXXXXXXXXXX_____________
Data delay found: 35
14:31:29:setup_element:INFO: Eye window for uplink 13: _____XXX__________XXXXXXXXXXX___________
Data delay found: 36
14:31:29:setup_element:INFO: Eye window for uplink 14: _____XXXXXXXXXXXXXXXXXXXXXX_______XXXXXX
Data delay found: 30
14:31:29:setup_element:INFO: Eye window for uplink 15: _____XXXXXXXX__XXXXXXXXXXXX_______XXXXXX
Data delay found: 30
14:31:29:setup_element:INFO: Setting the data phase to 29 for uplink 0
14:31:29:setup_element:INFO: Setting the data phase to 11 for uplink 1
14:31:29:setup_element:INFO: Setting the data phase to 16 for uplink 2
14:31:29:setup_element:INFO: Setting the data phase to 16 for uplink 3
14:31:29:setup_element:INFO: Setting the data phase to 22 for uplink 4
14:31:29:setup_element:INFO: Setting the data phase to 21 for uplink 5
14:31:29:setup_element:INFO: Setting the data phase to 9 for uplink 6
14:31:29:setup_element:INFO: Setting the data phase to 5 for uplink 7
14:31:29:setup_element:INFO: Setting the data phase to 7 for uplink 8
14:31:29:setup_element:INFO: Setting the data phase to 9 for uplink 9
14:31:29:setup_element:INFO: Setting the data phase to 38 for uplink 10
14:31:29:setup_element:INFO: Setting the data phase to 2 for uplink 11
14:31:29:setup_element:INFO: Setting the data phase to 35 for uplink 12
14:31:29:setup_element:INFO: Setting the data phase to 36 for uplink 13
14:31:29:setup_element:INFO: Setting the data phase to 30 for uplink 14
14:31:29:setup_element:INFO: Setting the data phase to 30 for uplink 15
==============================================OOO==============================================
14:31:29:setup_element:INFO: Beginning SMX ASICs map scan
14:31:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:31:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:31:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:31:29:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:31:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:31:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:31:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:31:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:31:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:31:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:31:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:31:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:31:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:31:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:31:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:31:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:31:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:31:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:31:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:31:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:31:32:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 48
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXX
Uplink 2: _______________XXXXX____________________________________________________________
Uplink 3: _______________XXXXX____________________________________________________________
Uplink 4: XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Uplink 5: XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Uplink 6: XXXXXXXXXXXXXX_X________________________________________________________________
Uplink 7: XXXXXXXXXXXXXX_X________________________________________________________________
Uplink 8: XXXXXX_X________________________________________________________________________
Uplink 9: XXXXXX_X________________________________________________________________________
Uplink 10: XXXXXX_X________________________________________________________________________
Uplink 11: XXXXXX_X________________________________________________________________________
Uplink 12: XXXXXXXXXX______________________________________________________________________
Uplink 13: XXXXXXXXXX______________________________________________________________________
Uplink 14: XXX___________________________________________________________________XXXXXXXXXX
Uplink 15: XXX___________________________________________________________________XXXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 29
Window Length: 15
Eye Window: XXXXXXXXXX__________XX_______________XXX
Uplink 1:
Optimal Phase: 11
Window Length: 16
Eye Window: XXXX________________XX__________XXXXXXXX
Uplink 2:
Optimal Phase: 16
Window Length: 3
Eye Window: XXXXXXXXXXXXXXX___XXXXXXXXXXXX__XXXXXXXX
Uplink 3:
Optimal Phase: 16
Window Length: 3
Eye Window: XXX__XXXXXXXXXX___XXXXXXXXXXXX__XXXXXXXX
Uplink 4:
Optimal Phase: 22
Window Length: 22
Eye Window: XXX__XXXXXXX______________________X_XXXX
Uplink 5:
Optimal Phase: 21
Window Length: 19
Eye Window: _____XXXXXXX___________________XXXXXXX__
Uplink 6:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 7:
Optimal Phase: 5
Window Length: 30
Eye Window: _____________________X_XXXXXXXX_________
Uplink 8:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXX__XXXXXXXXXXXXXXXXX
Uplink 9:
Optimal Phase: 9
Window Length: 19
Eye Window: ___________________XXXXXXXXXXXXXXXXXXXXX
Uplink 10:
Optimal Phase: 38
Window Length: 29
Eye Window: _____________XXXXXXXXXXX________________
Uplink 11:
Optimal Phase: 2
Window Length: 29
Eye Window: _________________XXXXXXXXXXX____________
Uplink 12:
Optimal Phase: 35
Window Length: 18
Eye Window: _____XXX______X_XXXXXXXXXXX_____________
Uplink 13:
Optimal Phase: 36
Window Length: 16
Eye Window: _____XXX__________XXXXXXXXXXX___________
Uplink 14:
Optimal Phase: 30
Window Length: 7
Eye Window: _____XXXXXXXXXXXXXXXXXXXXXX_______XXXXXX
Uplink 15:
Optimal Phase: 30
Window Length: 7
Eye Window: _____XXXXXXXX__XXXXXXXXXXXX_______XXXXXX
==============================================OOO==============================================
14:31:32:setup_element:INFO: Performing Elink synchronization
14:31:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:31:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:31:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:31:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:31:32:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:31:33:febtest:INFO: Init all SMX (CSA): 30
14:31:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:31:47:febtest:INFO: 01-00 | XA-000-09-004-008-012-016-06 | 40.9 | 1135.9
14:31:47:febtest:INFO: 08-01 | XA-000-09-004-008-006-025-09 | 44.1 | 1135.9
14:31:48:febtest:INFO: 03-02 | XA-000-09-004-008-008-026-00 | 28.2 | 1183.3
14:31:48:febtest:INFO: 10-03 | XA-000-09-004-008-008-025-00 | 34.6 | 1171.5
14:31:48:febtest:INFO: 05-04 | XA-000-09-004-008-004-023-10 | 31.4 | 1171.5
14:31:48:febtest:INFO: 12-05 | XA-000-09-004-008-015-022-08 | 28.2 | 1195.1
14:31:48:febtest:INFO: 07-06 | XA-000-09-004-008-007-019-04 | 44.1 | 1124.0
14:31:49:febtest:INFO: 14-07 | XA-000-09-004-008-008-021-00 | 37.7 | 1153.7
14:31:50:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:31:52:ST3_smx:INFO: chip: 1-0 40.898880 C 1147.806000 mV
14:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:52:ST3_smx:INFO: Electrons
14:31:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:31:54:ST3_smx:INFO: ----> Checking Analog response
14:31:54:ST3_smx:INFO: ----> Checking broken channels
14:31:55:ST3_smx:INFO: Total # broken ch: 0
14:31:55:ST3_smx:INFO: List FAST: []
14:31:55:ST3_smx:INFO: List SLOW: []
14:31:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:55:ST3_smx:INFO: Holes
14:31:55:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:31:57:ST3_smx:INFO: ----> Checking Analog response
14:31:57:ST3_smx:INFO: ----> Checking broken channels
14:31:57:ST3_smx:INFO: Total # broken ch: 0
14:31:57:ST3_smx:INFO: List FAST: []
14:31:57:ST3_smx:INFO: List SLOW: []
14:31:59:ST3_smx:INFO: chip: 8-1 44.073563 C 1147.806000 mV
14:31:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:59:ST3_smx:INFO: Electrons
14:31:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:01:ST3_smx:INFO: ----> Checking Analog response
14:32:01:ST3_smx:INFO: ----> Checking broken channels
14:32:01:ST3_smx:INFO: Total # broken ch: 0
14:32:01:ST3_smx:INFO: List FAST: []
14:32:01:ST3_smx:INFO: List SLOW: []
14:32:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:01:ST3_smx:INFO: Holes
14:32:01:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:04:ST3_smx:INFO: ----> Checking Analog response
14:32:04:ST3_smx:INFO: ----> Checking broken channels
14:32:04:ST3_smx:INFO: Total # broken ch: 0
14:32:04:ST3_smx:INFO: List FAST: []
14:32:04:ST3_smx:INFO: List SLOW: []
14:32:05:ST3_smx:INFO: chip: 3-2 28.225000 C 1195.082160 mV
14:32:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:05:ST3_smx:INFO: Electrons
14:32:05:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:08:ST3_smx:INFO: ----> Checking Analog response
14:32:08:ST3_smx:INFO: ----> Checking broken channels
14:32:08:ST3_smx:INFO: Total # broken ch: 0
14:32:08:ST3_smx:INFO: List FAST: []
14:32:08:ST3_smx:INFO: List SLOW: []
14:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:08:ST3_smx:INFO: Holes
14:32:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:10:ST3_smx:INFO: ----> Checking Analog response
14:32:10:ST3_smx:INFO: ----> Checking broken channels
14:32:10:ST3_smx:INFO: Total # broken ch: 0
14:32:10:ST3_smx:INFO: List FAST: []
14:32:10:ST3_smx:INFO: List SLOW: []
14:32:12:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV
14:32:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:12:ST3_smx:INFO: Electrons
14:32:12:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:14:ST3_smx:INFO: ----> Checking Analog response
14:32:14:ST3_smx:INFO: ----> Checking broken channels
14:32:14:ST3_smx:INFO: Total # broken ch: 0
14:32:14:ST3_smx:INFO: List FAST: []
14:32:14:ST3_smx:INFO: List SLOW: []
14:32:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:14:ST3_smx:INFO: Holes
14:32:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:17:ST3_smx:INFO: ----> Checking Analog response
14:32:17:ST3_smx:INFO: ----> Checking broken channels
14:32:17:ST3_smx:INFO: Total # broken ch: 0
14:32:17:ST3_smx:INFO: List FAST: []
14:32:17:ST3_smx:INFO: List SLOW: []
14:32:18:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV
14:32:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:18:ST3_smx:INFO: Electrons
14:32:18:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:21:ST3_smx:INFO: ----> Checking Analog response
14:32:21:ST3_smx:INFO: ----> Checking broken channels
14:32:21:ST3_smx:INFO: Total # broken ch: 0
14:32:21:ST3_smx:INFO: List FAST: []
14:32:21:ST3_smx:INFO: List SLOW: []
14:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:21:ST3_smx:INFO: Holes
14:32:21:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:23:ST3_smx:INFO: ----> Checking Analog response
14:32:23:ST3_smx:INFO: ----> Checking broken channels
14:32:24:ST3_smx:INFO: Total # broken ch: 0
14:32:24:ST3_smx:INFO: List FAST: []
14:32:24:ST3_smx:INFO: List SLOW: []
14:32:25:ST3_smx:INFO: chip: 12-5 31.389742 C 1212.728715 mV
14:32:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:25:ST3_smx:INFO: Electrons
14:32:25:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:27:ST3_smx:INFO: ----> Checking Analog response
14:32:27:ST3_smx:INFO: ----> Checking broken channels
14:32:28:ST3_smx:INFO: Total # broken ch: 0
14:32:28:ST3_smx:INFO: List FAST: []
14:32:28:ST3_smx:INFO: List SLOW: []
14:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:28:ST3_smx:INFO: Holes
14:32:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:30:ST3_smx:INFO: ----> Checking Analog response
14:32:30:ST3_smx:INFO: ----> Checking broken channels
14:32:30:ST3_smx:INFO: Total # broken ch: 0
14:32:30:ST3_smx:INFO: List FAST: []
14:32:30:ST3_smx:INFO: List SLOW: []
14:32:32:ST3_smx:INFO: chip: 7-6 50.430383 C 1135.937260 mV
14:32:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:32:ST3_smx:INFO: Electrons
14:32:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:34:ST3_smx:INFO: ----> Checking Analog response
14:32:34:ST3_smx:INFO: ----> Checking broken channels
14:32:34:ST3_smx:INFO: Total # broken ch: 0
14:32:34:ST3_smx:INFO: List FAST: []
14:32:34:ST3_smx:INFO: List SLOW: []
14:32:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:34:ST3_smx:INFO: Holes
14:32:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:37:ST3_smx:INFO: ----> Checking Analog response
14:32:37:ST3_smx:INFO: ----> Checking broken channels
14:32:37:ST3_smx:INFO: Total # broken ch: 0
14:32:37:ST3_smx:INFO: List FAST: []
14:32:37:ST3_smx:INFO: List SLOW: []
14:32:38:ST3_smx:INFO: chip: 14-7 44.073563 C 1165.571835 mV
14:32:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:38:ST3_smx:INFO: Electrons
14:32:38:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:41:ST3_smx:INFO: ----> Checking Analog response
14:32:41:ST3_smx:INFO: ----> Checking broken channels
14:32:41:ST3_smx:INFO: Total # broken ch: 0
14:32:41:ST3_smx:INFO: List FAST: []
14:32:41:ST3_smx:INFO: List SLOW: []
14:32:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:32:41:ST3_smx:INFO: Holes
14:32:41:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:32:43:ST3_smx:INFO: ----> Checking Analog response
14:32:43:ST3_smx:INFO: ----> Checking broken channels
14:32:44:ST3_smx:INFO: Total # broken ch: 0
14:32:44:ST3_smx:INFO: List FAST: []
14:32:44:ST3_smx:INFO: List SLOW: []
14:32:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:32:44:febtest:INFO: 01-00 | XA-000-09-004-008-012-016-06 | 47.3 | 1165.6
14:32:44:febtest:INFO: 08-01 | XA-000-09-004-008-006-025-09 | 47.3 | 1171.5
14:32:44:febtest:INFO: 03-02 | XA-000-09-004-008-008-026-00 | 34.6 | 1212.7
14:32:44:febtest:INFO: 10-03 | XA-000-09-004-008-008-025-00 | 40.9 | 1201.0
14:32:45:febtest:INFO: 05-04 | XA-000-09-004-008-004-023-10 | 37.7 | 1201.0
14:32:45:febtest:INFO: 12-05 | XA-000-09-004-008-015-022-08 | 34.6 | 1236.2
14:32:45:febtest:INFO: 07-06 | XA-000-09-004-008-007-019-04 | 53.6 | 1153.7
14:32:45:febtest:INFO: 14-07 | XA-000-09-004-008-008-021-00 | 47.3 | 1183.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_12_16-14_31_16
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1281| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3470', '1.849', '2.3140', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9610', '1.850', '2.4910', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9900', '1.850', '0.5639', '0.000', '0.0000', '0.000', '0.0000']