09:02:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:35:ST3_Shared:INFO:	                         FEB-Sensor                         
09:02:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:44:ST3_ModuleSelector:DEBUG:	
09:02:44:ST3_ModuleSelector:DEBUG:	
09:02:44:ST3_ModuleSelector:DEBUG:	
09:02:44:ST3_ModuleSelector:DEBUG:	
09:02:44:ST3_ModuleSelector:DEBUG:	Unknown
09:02:56:ST3_ModuleSelector:DEBUG:	M7UL1B0110390A2
09:02:56:ST3_ModuleSelector:DEBUG:	L7UL101039
09:02:56:ST3_ModuleSelector:DEBUG:	04120
09:02:56:ST3_ModuleSelector:DEBUG:	62x22
09:02:56:ST3_ModuleSelector:DEBUG:	A
09:02:56:ST3_ModuleSelector:DEBUG:	M7UL1B0110390A2
09:02:56:ST3_ModuleSelector:DEBUG:	L7UL101039
09:02:56:ST3_ModuleSelector:DEBUG:	04120
09:02:56:ST3_ModuleSelector:DEBUG:	62x22
09:02:56:ST3_ModuleSelector:DEBUG:	A
09:04:19:ST3_ModuleSelector:INFO:	M7UL1B0110390A2
09:04:19:ST3_ModuleSelector:INFO:	04120
09:04:19:febtest:INFO:	Testing FEB with SN 1282
09:04:20:smx_tester:INFO:	Scanning setup
09:04:20:elinks:INFO:	Disabling clock on downlink 0
09:04:20:elinks:INFO:	Disabling clock on downlink 1
09:04:20:elinks:INFO:	Disabling clock on downlink 2
09:04:20:elinks:INFO:	Disabling clock on downlink 3
09:04:20:elinks:INFO:	Disabling clock on downlink 4
09:04:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:04:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:04:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:04:21:elinks:INFO:	Disabling clock on downlink 0
09:04:21:elinks:INFO:	Disabling clock on downlink 1
09:04:21:elinks:INFO:	Disabling clock on downlink 2
09:04:21:elinks:INFO:	Disabling clock on downlink 3
09:04:21:elinks:INFO:	Disabling clock on downlink 4
09:04:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:04:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:04:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:04:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:04:21:elinks:INFO:	Disabling clock on downlink 0
09:04:21:elinks:INFO:	Disabling clock on downlink 1
09:04:21:elinks:INFO:	Disabling clock on downlink 2
09:04:21:elinks:INFO:	Disabling clock on downlink 3
09:04:21:elinks:INFO:	Disabling clock on downlink 4
09:04:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:04:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:04:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:04:21:elinks:INFO:	Disabling clock on downlink 0
09:04:21:elinks:INFO:	Disabling clock on downlink 1
09:04:21:elinks:INFO:	Disabling clock on downlink 2
09:04:21:elinks:INFO:	Disabling clock on downlink 3
09:04:21:elinks:INFO:	Disabling clock on downlink 4
09:04:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:04:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:04:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:04:21:elinks:INFO:	Disabling clock on downlink 0
09:04:21:elinks:INFO:	Disabling clock on downlink 1
09:04:21:elinks:INFO:	Disabling clock on downlink 2
09:04:21:elinks:INFO:	Disabling clock on downlink 3
09:04:21:elinks:INFO:	Disabling clock on downlink 4
09:04:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:04:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:04:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:04:21:setup_element:INFO:	Scanning clock phase
09:04:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:04:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:22:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:04:22:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:04:22:setup_element:INFO:	Eye window for uplink 1 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:04:22:setup_element:INFO:	Eye window for uplink 2 : ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 3 : ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:04:22:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:04:22:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:04:22:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:04:22:setup_element:INFO:	Eye window for uplink 8 : __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:04:22:setup_element:INFO:	Eye window for uplink 9 : __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:04:22:setup_element:INFO:	Eye window for uplink 10: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 11: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 12: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 13: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:04:22:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:04:22:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:04:22:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 1
==============================================OOO==============================================
09:04:22:setup_element:INFO:	Scanning data phases
09:04:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:04:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:27:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:04:27:setup_element:INFO:	Eye window for uplink 0 : _________XXXXXX_________________________
Data delay found: 31
09:04:27:setup_element:INFO:	Eye window for uplink 1 : _____XXXXX______________________________
Data delay found: 27
09:04:27:setup_element:INFO:	Eye window for uplink 2 : ____XXXX________________________________
Data delay found: 25
09:04:27:setup_element:INFO:	Eye window for uplink 3 : XXXXXX__________________________________
Data delay found: 22
09:04:27:setup_element:INFO:	Eye window for uplink 4 : ___XXXXXX_______________________________
Data delay found: 25
09:04:27:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
09:04:27:setup_element:INFO:	Eye window for uplink 6 : X___________________________________XXXX
Data delay found: 18
09:04:27:setup_element:INFO:	Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
09:04:27:setup_element:INFO:	Eye window for uplink 8 : _____________________XXXXX______________
Data delay found: 3
09:04:27:setup_element:INFO:	Eye window for uplink 9 : __________________________XXXXX_________
Data delay found: 8
09:04:27:setup_element:INFO:	Eye window for uplink 10: _______________________XXXXX____________
Data delay found: 5
09:04:27:setup_element:INFO:	Eye window for uplink 11: __________________________XXXXXX________
Data delay found: 8
09:04:27:setup_element:INFO:	Eye window for uplink 12: _______________________XXXXXX___________
Data delay found: 5
09:04:27:setup_element:INFO:	Eye window for uplink 13: __________________________XXXXXX________
Data delay found: 8
09:04:27:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
09:04:27:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
09:04:27:setup_element:INFO:	Setting the data phase to 31 for uplink 0
09:04:27:setup_element:INFO:	Setting the data phase to 27 for uplink 1
09:04:27:setup_element:INFO:	Setting the data phase to 25 for uplink 2
09:04:27:setup_element:INFO:	Setting the data phase to 22 for uplink 3
09:04:27:setup_element:INFO:	Setting the data phase to 25 for uplink 4
09:04:27:setup_element:INFO:	Setting the data phase to 21 for uplink 5
09:04:27:setup_element:INFO:	Setting the data phase to 18 for uplink 6
09:04:27:setup_element:INFO:	Setting the data phase to 14 for uplink 7
09:04:27:setup_element:INFO:	Setting the data phase to 3 for uplink 8
09:04:27:setup_element:INFO:	Setting the data phase to 8 for uplink 9
09:04:27:setup_element:INFO:	Setting the data phase to 5 for uplink 10
09:04:27:setup_element:INFO:	Setting the data phase to 8 for uplink 11
09:04:27:setup_element:INFO:	Setting the data phase to 5 for uplink 12
09:04:27:setup_element:INFO:	Setting the data phase to 8 for uplink 13
09:04:27:setup_element:INFO:	Setting the data phase to 8 for uplink 14
09:04:27:setup_element:INFO:	Setting the data phase to 10 for uplink 15
==============================================OOO==============================================
09:04:27:setup_element:INFO:	Beginning SMX ASICs map scan
09:04:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:04:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:04:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:04:27:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:04:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:04:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:04:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:04:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:04:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:04:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:04:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:04:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:04:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:04:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:04:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:04:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:04:29:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:04:29:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:04:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:04:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:04:30:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink  0: _____________________________________________________________________XXXXXXX____
      Uplink  1: _____________________________________________________________________XXXXXXX____
      Uplink  2: ___________________________________________________________________XXXXXXX______
      Uplink  3: ___________________________________________________________________XXXXXXX______
      Uplink  4: _____________________________________________________________________XXXXXX_____
      Uplink  5: _____________________________________________________________________XXXXXX_____
      Uplink  6: _____________________________________________________________________XXXXXX_____
      Uplink  7: _____________________________________________________________________XXXXXX_____
      Uplink  8: __________________________________________________________________XXXXXXXX______
      Uplink  9: __________________________________________________________________XXXXXXXX______
      Uplink 10: ___________________________________________________________________XXXXXXXX_____
      Uplink 11: ___________________________________________________________________XXXXXXXX_____
      Uplink 12: ___________________________________________________________________XXXXXXXX_____
      Uplink 13: ___________________________________________________________________XXXXXXXX_____
      Uplink 14: _____________________________________________________________________XXXXXXX____
      Uplink 15: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 2:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 3:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 4:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 7:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 8:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 9:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 10:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 11:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 12:
      Optimal Phase: 5
      Window Length: 34
      Eye Window: _______________________XXXXXX___________
    Uplink 13:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 14:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______

==============================================OOO==============================================
09:04:30:setup_element:INFO:	Performing Elink synchronization
09:04:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:04:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:04:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:04:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:04:30:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:04:30:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:04:31:febtest:INFO:	Init all SMX (CSA): 30
09:04:45:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:46:febtest:INFO:	01-00 | XA-020-08-002-003-007-021-02 |  37.7 | 1141.9
09:04:46:febtest:INFO:	08-01 | XA-007-08-002-003-007-021-03 |  47.3 | 1112.1
09:04:46:febtest:INFO:	03-02 | XA-022-08-002-003-007-021-13 |  40.9 | 1135.9
09:04:46:febtest:INFO:	10-03 | XA-005-08-002-003-007-021-12 |  60.0 | 1064.3
09:04:47:febtest:INFO:	05-04 | XA-019-08-002-003-007-021-01 |  50.4 | 1112.1
09:04:47:febtest:INFO:	12-05 | XA-006-08-002-003-007-021-08 |  50.4 | 1112.1
09:04:47:febtest:INFO:	07-06 | XA-018-08-002-003-007-021-10 |  50.4 | 1112.1
09:04:47:febtest:INFO:	14-07 | XA-004-08-002-003-007-021-07 |  47.3 | 1112.1
09:04:48:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:04:50:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1153.732915 mV
09:04:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:50:ST3_smx:INFO:		Electrons
09:04:50:ST3_smx:INFO:	# loops 0
09:04:52:ST3_smx:INFO:	# loops 1
09:04:54:ST3_smx:INFO:	# loops 2
09:04:55:ST3_smx:INFO:	# loops 3
09:04:57:ST3_smx:INFO:	# loops 4
09:04:59:ST3_smx:INFO:	Total # of broken channels: 0
09:04:59:ST3_smx:INFO:	List of broken channels: []
09:04:59:ST3_smx:INFO:	Total # of broken channels: 4
09:04:59:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 77]
09:05:01:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1124.048640 mV
09:05:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:01:ST3_smx:INFO:		Electrons
09:05:01:ST3_smx:INFO:	# loops 0
09:05:02:ST3_smx:INFO:	# loops 1
09:05:04:ST3_smx:INFO:	# loops 2
09:05:06:ST3_smx:INFO:	# loops 3
09:05:07:ST3_smx:INFO:	# loops 4
09:05:09:ST3_smx:INFO:	Total # of broken channels: 0
09:05:09:ST3_smx:INFO:	List of broken channels: []
09:05:09:ST3_smx:INFO:	Total # of broken channels: 5
09:05:09:ST3_smx:INFO:	List of broken channels: [72, 88, 96, 108, 111]
09:05:11:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1147.806000 mV
09:05:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:11:ST3_smx:INFO:		Electrons
09:05:11:ST3_smx:INFO:	# loops 0
09:05:12:ST3_smx:INFO:	# loops 1
09:05:14:ST3_smx:INFO:	# loops 2
09:05:16:ST3_smx:INFO:	# loops 3
09:05:17:ST3_smx:INFO:	# loops 4
09:05:19:ST3_smx:INFO:	Total # of broken channels: 0
09:05:19:ST3_smx:INFO:	List of broken channels: []
09:05:19:ST3_smx:INFO:	Total # of broken channels: 1
09:05:19:ST3_smx:INFO:	List of broken channels: [124]
09:05:21:ST3_smx:INFO:	chip: 10-3 	 59.984250 C 	 1076.295360 mV
09:05:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:21:ST3_smx:INFO:		Electrons
09:05:21:ST3_smx:INFO:	# loops 0
09:05:22:ST3_smx:INFO:	# loops 1
09:05:24:ST3_smx:INFO:	# loops 2
09:05:25:ST3_smx:INFO:	# loops 3
09:05:27:ST3_smx:INFO:	# loops 4
09:05:29:ST3_smx:INFO:	Total # of broken channels: 0
09:05:29:ST3_smx:INFO:	List of broken channels: []
09:05:29:ST3_smx:INFO:	Total # of broken channels: 16
09:05:29:ST3_smx:INFO:	List of broken channels: [16, 17, 24, 25, 27, 44, 53, 54, 76, 77, 81, 82, 88, 103, 123, 125]
09:05:30:ST3_smx:INFO:	chip: 5-4 	 50.430383 C 	 1124.048640 mV
09:05:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:30:ST3_smx:INFO:		Electrons
09:05:30:ST3_smx:INFO:	# loops 0
09:05:32:ST3_smx:INFO:	# loops 1
09:05:34:ST3_smx:INFO:	# loops 2
09:05:35:ST3_smx:INFO:	# loops 3
09:05:37:ST3_smx:INFO:	# loops 4
09:05:39:ST3_smx:INFO:	Total # of broken channels: 0
09:05:39:ST3_smx:INFO:	List of broken channels: []
09:05:39:ST3_smx:INFO:	Total # of broken channels: 3
09:05:39:ST3_smx:INFO:	List of broken channels: [7, 25, 28]
09:05:40:ST3_smx:INFO:	chip: 12-5 	 50.430383 C 	 1124.048640 mV
09:05:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:40:ST3_smx:INFO:		Electrons
09:05:40:ST3_smx:INFO:	# loops 0
09:05:42:ST3_smx:INFO:	# loops 1
09:05:44:ST3_smx:INFO:	# loops 2
09:05:45:ST3_smx:INFO:	# loops 3
09:05:47:ST3_smx:INFO:	# loops 4
09:05:48:ST3_smx:INFO:	Total # of broken channels: 0
09:05:48:ST3_smx:INFO:	List of broken channels: []
09:05:48:ST3_smx:INFO:	Total # of broken channels: 4
09:05:48:ST3_smx:INFO:	List of broken channels: [15, 47, 111, 115]
09:05:50:ST3_smx:INFO:	chip: 7-6 	 50.430383 C 	 1124.048640 mV
09:05:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:50:ST3_smx:INFO:		Electrons
09:05:50:ST3_smx:INFO:	# loops 0
09:05:52:ST3_smx:INFO:	# loops 1
09:05:53:ST3_smx:INFO:	# loops 2
09:05:55:ST3_smx:INFO:	# loops 3
09:05:57:ST3_smx:INFO:	# loops 4
09:05:58:ST3_smx:INFO:	Total # of broken channels: 0
09:05:58:ST3_smx:INFO:	List of broken channels: []
09:05:58:ST3_smx:INFO:	Total # of broken channels: 1
09:05:58:ST3_smx:INFO:	List of broken channels: [19]
09:06:00:ST3_smx:INFO:	chip: 14-7 	 47.250730 C 	 1124.048640 mV
09:06:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:06:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:06:00:ST3_smx:INFO:		Electrons
09:06:00:ST3_smx:INFO:	# loops 0
09:06:02:ST3_smx:INFO:	# loops 1
09:06:03:ST3_smx:INFO:	# loops 2
09:06:05:ST3_smx:INFO:	# loops 3
09:06:07:ST3_smx:INFO:	# loops 4
09:06:08:ST3_smx:INFO:	Total # of broken channels: 0
09:06:08:ST3_smx:INFO:	List of broken channels: []
09:06:08:ST3_smx:INFO:	Total # of broken channels: 1
09:06:08:ST3_smx:INFO:	List of broken channels: [3]
09:06:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:06:09:febtest:INFO:	01-00 | XA-020-08-002-003-007-021-02 |  40.9 | 1177.4
09:06:09:febtest:INFO:	08-01 | XA-007-08-002-003-007-021-03 |  47.3 | 1147.8
09:06:09:febtest:INFO:	03-02 | XA-022-08-002-003-007-021-13 |  44.1 | 1171.5
09:06:10:febtest:INFO:	10-03 | XA-005-08-002-003-007-021-12 |  63.2 | 1100.2
09:06:10:febtest:INFO:	05-04 | XA-019-08-002-003-007-021-01 |  53.6 | 1147.8
09:06:10:febtest:INFO:	12-05 | XA-006-08-002-003-007-021-08 |  53.6 | 1147.8
09:06:10:febtest:INFO:	07-06 | XA-018-08-002-003-007-021-10 |  50.4 | 1141.9
09:06:10:febtest:INFO:	14-07 | XA-004-08-002-003-007-021-07 |  50.4 | 1141.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_12-09_02_35
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_NAME: 04120 | SIZE: 62x22 | GRADE: A
MODULE_NAME: M7UL1B0110390A2
LADDER_NAME: L7UL101039
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9530', '1.849', '1.9460', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9980', '1.849', '2.5460', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5244', '0.000', '0.0000', '0.000', '0.0000']