Go Back
FEB_1283 20.11.24 09:06:22
Info
09:06:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:22:ST3_Shared:INFO: FEB-Sensor
09:06:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:29:ST3_ModuleSelector:DEBUG: M3DR2T0000120B2
09:06:29:ST3_ModuleSelector:DEBUG: L3DR200012
09:06:29:ST3_ModuleSelector:DEBUG: 21402
09:06:29:ST3_ModuleSelector:DEBUG: 62x42
09:06:29:ST3_ModuleSelector:DEBUG: A
09:06:29:ST3_ModuleSelector:DEBUG: M3DR2T0000120B2
09:06:29:ST3_ModuleSelector:DEBUG: L3DR200012
09:06:29:ST3_ModuleSelector:DEBUG: 21402
09:06:29:ST3_ModuleSelector:DEBUG: 62x42
09:06:29:ST3_ModuleSelector:DEBUG: A
09:06:54:ST3_ModuleSelector:INFO: M3DR2T0000120B2
09:06:54:ST3_ModuleSelector:INFO: 21402
09:06:54:febtest:INFO: Testing FEB with SN 1283
09:06:56:smx_tester:INFO: Scanning setup
09:06:56:elinks:INFO: Disabling clock on downlink 0
09:06:56:elinks:INFO: Disabling clock on downlink 1
09:06:56:elinks:INFO: Disabling clock on downlink 2
09:06:56:elinks:INFO: Disabling clock on downlink 3
09:06:56:elinks:INFO: Disabling clock on downlink 4
09:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:56:elinks:INFO: Disabling clock on downlink 0
09:06:56:elinks:INFO: Disabling clock on downlink 1
09:06:56:elinks:INFO: Disabling clock on downlink 2
09:06:56:elinks:INFO: Disabling clock on downlink 3
09:06:56:elinks:INFO: Disabling clock on downlink 4
09:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:06:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:56:elinks:INFO: Disabling clock on downlink 0
09:06:56:elinks:INFO: Disabling clock on downlink 1
09:06:56:elinks:INFO: Disabling clock on downlink 2
09:06:56:elinks:INFO: Disabling clock on downlink 3
09:06:56:elinks:INFO: Disabling clock on downlink 4
09:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:56:elinks:INFO: Disabling clock on downlink 0
09:06:56:elinks:INFO: Disabling clock on downlink 1
09:06:56:elinks:INFO: Disabling clock on downlink 2
09:06:56:elinks:INFO: Disabling clock on downlink 3
09:06:56:elinks:INFO: Disabling clock on downlink 4
09:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:56:elinks:INFO: Disabling clock on downlink 0
09:06:56:elinks:INFO: Disabling clock on downlink 1
09:06:56:elinks:INFO: Disabling clock on downlink 2
09:06:56:elinks:INFO: Disabling clock on downlink 3
09:06:56:elinks:INFO: Disabling clock on downlink 4
09:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:06:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:06:57:setup_element:INFO: Scanning clock phase
09:06:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:06:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:06:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:06:57:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:57:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:57:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:06:57:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:06:57:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:57:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:57:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:06:57:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:06:57:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:57:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
09:06:57:setup_element:INFO: Scanning data phases
09:06:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:06:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:07:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:07:03:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________
Data delay found: 33
09:07:03:setup_element:INFO: Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
09:07:03:setup_element:INFO: Eye window for uplink 2 : _________XXXXXX_________________________
Data delay found: 31
09:07:03:setup_element:INFO: Eye window for uplink 3 : ______XXXXXXX___________________________
Data delay found: 29
09:07:03:setup_element:INFO: Eye window for uplink 4 : ______XXXXXXX___________________________
Data delay found: 29
09:07:03:setup_element:INFO: Eye window for uplink 5 : ___XXXXXX_______________________________
Data delay found: 25
09:07:03:setup_element:INFO: Eye window for uplink 6 : XXXXXXX_______________________________XX
Data delay found: 22
09:07:03:setup_element:INFO: Eye window for uplink 7 : XXXX______________________________XXXXXX
Data delay found: 18
09:07:03:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXXXX_______
Data delay found: 9
09:07:03:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXXX__
Data delay found: 14
09:07:03:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXXX________
Data delay found: 8
09:07:03:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXXX___
Data delay found: 13
09:07:03:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXXXXX__
Data delay found: 13
09:07:03:setup_element:INFO: Eye window for uplink 13: X_______________________________XXXXXXXX
Data delay found: 16
09:07:03:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXX___
Data delay found: 13
09:07:03:setup_element:INFO: Eye window for uplink 15: X_______________________________XXXXXXXX
Data delay found: 16
09:07:03:setup_element:INFO: Setting the data phase to 33 for uplink 0
09:07:03:setup_element:INFO: Setting the data phase to 29 for uplink 1
09:07:03:setup_element:INFO: Setting the data phase to 31 for uplink 2
09:07:03:setup_element:INFO: Setting the data phase to 29 for uplink 3
09:07:03:setup_element:INFO: Setting the data phase to 29 for uplink 4
09:07:03:setup_element:INFO: Setting the data phase to 25 for uplink 5
09:07:03:setup_element:INFO: Setting the data phase to 22 for uplink 6
09:07:03:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:07:03:setup_element:INFO: Setting the data phase to 9 for uplink 8
09:07:03:setup_element:INFO: Setting the data phase to 14 for uplink 9
09:07:03:setup_element:INFO: Setting the data phase to 8 for uplink 10
09:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 11
09:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 12
09:07:03:setup_element:INFO: Setting the data phase to 16 for uplink 13
09:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 14
09:07:03:setup_element:INFO: Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
09:07:03:setup_element:INFO: Beginning SMX ASICs map scan
09:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:07:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:07:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:07:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:07:03:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:07:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:07:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:07:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:07:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:07:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:07:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:07:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:07:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:07:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:07:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:07:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:07:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:07:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:07:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:07:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:07:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:07:05:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXXXX
Uplink 7: _______________________________________________________________________XXXXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 3:
Optimal Phase: 29
Window Length: 33
Eye Window: ______XXXXXXX___________________________
Uplink 4:
Optimal Phase: 29
Window Length: 33
Eye Window: ______XXXXXXX___________________________
Uplink 5:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 6:
Optimal Phase: 22
Window Length: 31
Eye Window: XXXXXXX_______________________________XX
Uplink 7:
Optimal Phase: 18
Window Length: 30
Eye Window: XXXX______________________________XXXXXX
Uplink 8:
Optimal Phase: 9
Window Length: 33
Eye Window: __________________________XXXXXXX_______
Uplink 9:
Optimal Phase: 14
Window Length: 33
Eye Window: _______________________________XXXXXXX__
Uplink 10:
Optimal Phase: 8
Window Length: 33
Eye Window: _________________________XXXXXXX________
Uplink 11:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 12:
Optimal Phase: 13
Window Length: 32
Eye Window: ______________________________XXXXXXXX__
Uplink 13:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
Uplink 14:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 15:
Optimal Phase: 16
Window Length: 31
Eye Window: X_______________________________XXXXXXXX
==============================================OOO==============================================
09:07:05:setup_element:INFO: Performing Elink synchronization
09:07:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:07:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:07:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:07:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:07:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:07:05:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:07:06:febtest:INFO: Init all SMX (CSA): 30
09:07:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:07:20:febtest:INFO: 01-00 | XA-000-09-004-003-005-015-14 | 18.7 | 1183.3
09:07:21:febtest:INFO: 08-01 | XA-000-09-004-003-005-017-09 | 18.7 | 1177.4
09:07:21:febtest:INFO: 03-02 | XA-000-09-004-003-005-014-14 | 25.1 | 1159.7
09:07:21:febtest:INFO: 10-03 | XA-000-09-004-003-005-018-09 | 31.4 | 1141.9
09:07:21:febtest:INFO: 05-04 | XA-000-09-004-003-005-013-14 | 28.2 | 1153.7
09:07:22:febtest:INFO: 12-05 | XA-000-09-004-003-004-022-04 | 3.0 | 1242.0
09:07:22:febtest:INFO: 07-06 | XA-000-09-004-003-005-016-09 | 25.1 | 1177.4
09:07:22:febtest:INFO: 14-07 | XA-000-09-004-003-005-023-09 | 21.9 | 1177.4
09:07:23:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:07:25:ST3_smx:INFO: chip: 1-0 18.745682 C 1195.082160 mV
09:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:25:ST3_smx:INFO: Electrons
09:07:25:ST3_smx:INFO: # loops 0
09:07:27:ST3_smx:INFO: # loops 1
09:07:28:ST3_smx:INFO: # loops 2
09:07:30:ST3_smx:INFO: # loops 3
09:07:32:ST3_smx:INFO: # loops 4
09:07:34:ST3_smx:INFO: Total # of broken channels: 2
09:07:34:ST3_smx:INFO: List of broken channels: [75, 115]
09:07:34:ST3_smx:INFO: Total # of broken channels: 48
09:07:34:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 75, 76, 80, 84, 86, 88, 90, 92, 100, 102, 115]
09:07:35:ST3_smx:INFO: chip: 8-1 18.745682 C 1189.190035 mV
09:07:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:36:ST3_smx:INFO: Electrons
09:07:36:ST3_smx:INFO: # loops 0
09:07:37:ST3_smx:INFO: # loops 1
09:07:39:ST3_smx:INFO: # loops 2
09:07:40:ST3_smx:INFO: # loops 3
09:07:42:ST3_smx:INFO: # loops 4
09:07:44:ST3_smx:INFO: Total # of broken channels: 1
09:07:44:ST3_smx:INFO: List of broken channels: [59]
09:07:44:ST3_smx:INFO: Total # of broken channels: 53
09:07:44:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 59, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 98, 100, 104, 106, 112]
09:07:45:ST3_smx:INFO: chip: 3-2 28.225000 C 1171.483840 mV
09:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:45:ST3_smx:INFO: Electrons
09:07:45:ST3_smx:INFO: # loops 0
09:07:47:ST3_smx:INFO: # loops 1
09:07:49:ST3_smx:INFO: # loops 2
09:07:51:ST3_smx:INFO: # loops 3
09:07:52:ST3_smx:INFO: # loops 4
09:07:54:ST3_smx:INFO: Total # of broken channels: 0
09:07:54:ST3_smx:INFO: List of broken channels: []
09:07:54:ST3_smx:INFO: Total # of broken channels: 60
09:07:54:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 114, 116, 118, 120, 122]
09:07:56:ST3_smx:INFO: chip: 10-3 31.389742 C 1159.654860 mV
09:07:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:56:ST3_smx:INFO: Electrons
09:07:56:ST3_smx:INFO: # loops 0
09:07:57:ST3_smx:INFO: # loops 1
09:07:59:ST3_smx:INFO: # loops 2
09:08:01:ST3_smx:INFO: # loops 3
09:08:02:ST3_smx:INFO: # loops 4
09:08:04:ST3_smx:INFO: Total # of broken channels: 1
09:08:04:ST3_smx:INFO: List of broken channels: [127]
09:08:04:ST3_smx:INFO: Total # of broken channels: 58
09:08:04:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 112, 120, 127]
09:08:05:ST3_smx:INFO: chip: 5-4 28.225000 C 1165.571835 mV
09:08:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:05:ST3_smx:INFO: Electrons
09:08:05:ST3_smx:INFO: # loops 0
09:08:07:ST3_smx:INFO: # loops 1
09:08:09:ST3_smx:INFO: # loops 2
09:08:10:ST3_smx:INFO: # loops 3
09:08:12:ST3_smx:INFO: # loops 4
09:08:13:ST3_smx:INFO: Total # of broken channels: 1
09:08:13:ST3_smx:INFO: List of broken channels: [46]
09:08:13:ST3_smx:INFO: Total # of broken channels: 57
09:08:13:ST3_smx:INFO: List of broken channels: [0, 6, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 116, 118, 120, 122]
09:08:15:ST3_smx:INFO: chip: 12-5 2.996520 C 1253.730060 mV
09:08:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:15:ST3_smx:INFO: Electrons
09:08:15:ST3_smx:INFO: # loops 0
09:08:17:ST3_smx:INFO: # loops 1
09:08:18:ST3_smx:INFO: # loops 2
09:08:20:ST3_smx:INFO: # loops 3
09:08:22:ST3_smx:INFO: # loops 4
09:08:23:ST3_smx:INFO: Total # of broken channels: 2
09:08:23:ST3_smx:INFO: List of broken channels: [11, 20]
09:08:23:ST3_smx:INFO: Total # of broken channels: 62
09:08:23:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 11, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120]
09:08:25:ST3_smx:INFO: chip: 7-6 25.062742 C 1189.190035 mV
09:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:25:ST3_smx:INFO: Electrons
09:08:25:ST3_smx:INFO: # loops 0
09:08:27:ST3_smx:INFO: # loops 1
09:08:28:ST3_smx:INFO: # loops 2
09:08:30:ST3_smx:INFO: # loops 3
09:08:31:ST3_smx:INFO: # loops 4
09:08:33:ST3_smx:INFO: Total # of broken channels: 1
09:08:33:ST3_smx:INFO: List of broken channels: [7]
09:08:33:ST3_smx:INFO: Total # of broken channels: 53
09:08:33:ST3_smx:INFO: List of broken channels: [0, 7, 14, 16, 18, 20, 22, 24, 28, 30, 32, 34, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118]
09:08:35:ST3_smx:INFO: chip: 14-7 21.902970 C 1189.190035 mV
09:08:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:08:35:ST3_smx:INFO: Electrons
09:08:35:ST3_smx:INFO: # loops 0
09:08:36:ST3_smx:INFO: # loops 1
09:08:38:ST3_smx:INFO: # loops 2
09:08:40:ST3_smx:INFO: # loops 3
09:08:41:ST3_smx:INFO: # loops 4
09:08:43:ST3_smx:INFO: Total # of broken channels: 3
09:08:43:ST3_smx:INFO: List of broken channels: [0, 17, 72]
09:08:43:ST3_smx:INFO: Total # of broken channels: 62
09:08:43:ST3_smx:INFO: List of broken channels: [0, 1, 2, 4, 6, 8, 10, 12, 14, 16, 17, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 120, 122]
09:08:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:08:43:febtest:INFO: 01-00 | XA-000-09-004-003-005-015-14 | 21.9 | 1218.6
09:08:43:febtest:INFO: 08-01 | XA-000-09-004-003-005-017-09 | 21.9 | 1212.7
09:08:44:febtest:INFO: 03-02 | XA-000-09-004-003-005-014-14 | 28.2 | 1195.1
09:08:44:febtest:INFO: 10-03 | XA-000-09-004-003-005-018-09 | 34.6 | 1177.4
09:08:44:febtest:INFO: 05-04 | XA-000-09-004-003-005-013-14 | 28.2 | 1189.2
09:08:44:febtest:INFO: 12-05 | XA-000-09-004-003-004-022-04 | 3.0 | 1271.2
09:08:45:febtest:INFO: 07-06 | XA-000-09-004-003-005-016-09 | 28.2 | 1201.0
09:08:45:febtest:INFO: 14-07 | XA-000-09-004-003-005-023-09 | 25.1 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_20-09_06_22
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1283| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : MUCH
------------------------------------------------------------
SENSOR_NAME: 21402 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M3DR2T0000120B2
LADDER_NAME: L3DR200012
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9180', '1.849', '2.3130', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9810', '1.850', '2.5160', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5234', '0.000', '0.0000', '0.000', '0.0000']