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FEB_1287 08.11.24 13:51:19
Info
13:51:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:19:ST3_Shared:INFO: FEB-Microcable
13:51:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:19:febtest:INFO: Testing FEB with SN 1287
13:51:21:smx_tester:INFO: Scanning setup
13:51:21:elinks:INFO: Disabling clock on downlink 0
13:51:21:elinks:INFO: Disabling clock on downlink 1
13:51:21:elinks:INFO: Disabling clock on downlink 2
13:51:21:elinks:INFO: Disabling clock on downlink 3
13:51:21:elinks:INFO: Disabling clock on downlink 4
13:51:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:51:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:21:elinks:INFO: Disabling clock on downlink 0
13:51:21:elinks:INFO: Disabling clock on downlink 1
13:51:21:elinks:INFO: Disabling clock on downlink 2
13:51:21:elinks:INFO: Disabling clock on downlink 3
13:51:21:elinks:INFO: Disabling clock on downlink 4
13:51:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:51:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:51:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:21:elinks:INFO: Disabling clock on downlink 0
13:51:21:elinks:INFO: Disabling clock on downlink 1
13:51:21:elinks:INFO: Disabling clock on downlink 2
13:51:21:elinks:INFO: Disabling clock on downlink 3
13:51:21:elinks:INFO: Disabling clock on downlink 4
13:51:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:21:elinks:INFO: Disabling clock on downlink 0
13:51:21:elinks:INFO: Disabling clock on downlink 1
13:51:21:elinks:INFO: Disabling clock on downlink 2
13:51:21:elinks:INFO: Disabling clock on downlink 3
13:51:21:elinks:INFO: Disabling clock on downlink 4
13:51:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:51:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:21:elinks:INFO: Disabling clock on downlink 0
13:51:21:elinks:INFO: Disabling clock on downlink 1
13:51:21:elinks:INFO: Disabling clock on downlink 2
13:51:21:elinks:INFO: Disabling clock on downlink 3
13:51:21:elinks:INFO: Disabling clock on downlink 4
13:51:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:51:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:51:22:setup_element:INFO: Scanning clock phase
13:51:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:22:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:51:22:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:51:22:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:51:22:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:51:22:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:51:22:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:51:22:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:51:22:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:51:22:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:51:22:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:51:22:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:51:22:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:51:22:setup_element:INFO: Scanning data phases
13:51:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:27:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:51:27:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXXXX____________________
Data delay found: 35
13:51:27:setup_element:INFO: Eye window for uplink 1 : _______XXXXXXXXX________________________
Data delay found: 31
13:51:27:setup_element:INFO: Eye window for uplink 2 : ________XXXXXXXX________________________
Data delay found: 31
13:51:27:setup_element:INFO: Eye window for uplink 3 : _____XXXXXXXXX__________________________
Data delay found: 29
13:51:27:setup_element:INFO: Eye window for uplink 4 : ______XXXXXX____________________________
Data delay found: 28
13:51:27:setup_element:INFO: Eye window for uplink 5 : ___XXXXXX_______________________________
Data delay found: 25
13:51:27:setup_element:INFO: Eye window for uplink 6 : XXXXXXXX___________________________XXXXX
Data delay found: 21
13:51:27:setup_element:INFO: Eye window for uplink 7 : XXXXX___________________________XXXXXXXX
Data delay found: 18
13:51:27:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
13:51:27:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXX______
Data delay found: 10
13:51:27:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXXXX_____
Data delay found: 10
13:51:27:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXXXX__
Data delay found: 13
13:51:27:setup_element:INFO: Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
13:51:27:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXXXXX____
Data delay found: 11
13:51:27:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXXXXXXXX___
Data delay found: 10
13:51:27:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXXXXXXXX
Data delay found: 12
13:51:27:setup_element:INFO: Setting the data phase to 35 for uplink 0
13:51:27:setup_element:INFO: Setting the data phase to 31 for uplink 1
13:51:27:setup_element:INFO: Setting the data phase to 31 for uplink 2
13:51:27:setup_element:INFO: Setting the data phase to 29 for uplink 3
13:51:27:setup_element:INFO: Setting the data phase to 28 for uplink 4
13:51:27:setup_element:INFO: Setting the data phase to 25 for uplink 5
13:51:27:setup_element:INFO: Setting the data phase to 21 for uplink 6
13:51:27:setup_element:INFO: Setting the data phase to 18 for uplink 7
13:51:27:setup_element:INFO: Setting the data phase to 6 for uplink 8
13:51:27:setup_element:INFO: Setting the data phase to 10 for uplink 9
13:51:27:setup_element:INFO: Setting the data phase to 10 for uplink 10
13:51:27:setup_element:INFO: Setting the data phase to 13 for uplink 11
13:51:27:setup_element:INFO: Setting the data phase to 8 for uplink 12
13:51:27:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:51:27:setup_element:INFO: Setting the data phase to 10 for uplink 14
13:51:27:setup_element:INFO: Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
13:51:27:setup_element:INFO: Beginning SMX ASICs map scan
13:51:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:51:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:51:28:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:51:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:51:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:51:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:51:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:51:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:51:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:51:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:51:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:51:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:51:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:51:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:51:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:51:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:51:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:51:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:51:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:51:30:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXXX
Uplink 1: _______________________________________________________________________XXXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: ____________________________________________________________________XXXXXXXXX___
Uplink 13: ____________________________________________________________________XXXXXXXXX___
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 32
Eye Window: ____________XXXXXXXX____________________
Uplink 1:
Optimal Phase: 31
Window Length: 31
Eye Window: _______XXXXXXXXX________________________
Uplink 2:
Optimal Phase: 31
Window Length: 32
Eye Window: ________XXXXXXXX________________________
Uplink 3:
Optimal Phase: 29
Window Length: 31
Eye Window: _____XXXXXXXXX__________________________
Uplink 4:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 5:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 6:
Optimal Phase: 21
Window Length: 27
Eye Window: XXXXXXXX___________________________XXXXX
Uplink 7:
Optimal Phase: 18
Window Length: 27
Eye Window: XXXXX___________________________XXXXXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 10:
Optimal Phase: 10
Window Length: 32
Eye Window: ___________________________XXXXXXXX_____
Uplink 11:
Optimal Phase: 13
Window Length: 32
Eye Window: ______________________________XXXXXXXX__
Uplink 12:
Optimal Phase: 8
Window Length: 33
Eye Window: _________________________XXXXXXX________
Uplink 13:
Optimal Phase: 11
Window Length: 31
Eye Window: ___________________________XXXXXXXXX____
Uplink 14:
Optimal Phase: 10
Window Length: 28
Eye Window: _________________________XXXXXXXXXXXX___
Uplink 15:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
==============================================OOO==============================================
13:51:30:setup_element:INFO: Performing Elink synchronization
13:51:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:51:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:51:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:51:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:51:30:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:51:31:febtest:INFO: Init all SMX (CSA): 30
13:51:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:45:febtest:INFO: 01-00 | XA-000-09-004-003-005-004-14 | 31.4 | 1177.4
13:51:45:febtest:INFO: 08-01 | XA-000-09-004-003-006-009-00 | 25.1 | 1189.2
13:51:45:febtest:INFO: 03-02 | XA-000-09-004-003-006-004-00 | 44.1 | 1141.9
13:51:46:febtest:INFO: 10-03 | XA-000-09-004-003-006-010-00 | 34.6 | 1159.7
13:51:46:febtest:INFO: 05-04 | XA-000-09-004-003-006-011-00 | 31.4 | 1177.4
13:51:46:febtest:INFO: 12-05 | XA-000-09-004-003-006-012-00 | 37.7 | 1147.8
13:51:46:febtest:INFO: 07-06 | XA-000-09-004-003-006-008-00 | 40.9 | 1147.8
13:51:46:febtest:INFO: 14-07 | XA-000-09-004-003-006-007-00 | 40.9 | 1135.9
13:51:47:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:51:49:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV
13:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:49:ST3_smx:INFO: Electrons
13:51:49:ST3_smx:INFO: # loops 0
13:51:51:ST3_smx:INFO: # loops 1
13:51:52:ST3_smx:INFO: # loops 2
13:51:54:ST3_smx:INFO: Total # of broken channels: 1
13:51:54:ST3_smx:INFO: List of broken channels: [62]
13:51:54:ST3_smx:INFO: Total # of broken channels: 0
13:51:54:ST3_smx:INFO: List of broken channels: []
13:51:56:ST3_smx:INFO: chip: 8-1 25.062742 C 1206.851500 mV
13:51:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:56:ST3_smx:INFO: Electrons
13:51:56:ST3_smx:INFO: # loops 0
13:51:57:ST3_smx:INFO: # loops 1
13:51:59:ST3_smx:INFO: # loops 2
13:52:00:ST3_smx:INFO: Total # of broken channels: 0
13:52:00:ST3_smx:INFO: List of broken channels: []
13:52:00:ST3_smx:INFO: Total # of broken channels: 0
13:52:00:ST3_smx:INFO: List of broken channels: []
13:52:02:ST3_smx:INFO: chip: 3-2 44.073563 C 1153.732915 mV
13:52:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:02:ST3_smx:INFO: Electrons
13:52:02:ST3_smx:INFO: # loops 0
13:52:04:ST3_smx:INFO: # loops 1
13:52:05:ST3_smx:INFO: # loops 2
13:52:07:ST3_smx:INFO: Total # of broken channels: 1
13:52:07:ST3_smx:INFO: List of broken channels: [79]
13:52:07:ST3_smx:INFO: Total # of broken channels: 6
13:52:07:ST3_smx:INFO: List of broken channels: [25, 42, 44, 46, 48, 79]
13:52:09:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
13:52:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:09:ST3_smx:INFO: Electrons
13:52:09:ST3_smx:INFO: # loops 0
13:52:10:ST3_smx:INFO: # loops 1
13:52:12:ST3_smx:INFO: # loops 2
13:52:14:ST3_smx:INFO: Total # of broken channels: 0
13:52:14:ST3_smx:INFO: List of broken channels: []
13:52:14:ST3_smx:INFO: Total # of broken channels: 20
13:52:14:ST3_smx:INFO: List of broken channels: [87, 89, 91, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
13:52:15:ST3_smx:INFO: chip: 5-4 31.389742 C 1195.082160 mV
13:52:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:15:ST3_smx:INFO: Electrons
13:52:15:ST3_smx:INFO: # loops 0
13:52:17:ST3_smx:INFO: # loops 1
13:52:18:ST3_smx:INFO: # loops 2
13:52:20:ST3_smx:INFO: Total # of broken channels: 0
13:52:20:ST3_smx:INFO: List of broken channels: []
13:52:20:ST3_smx:INFO: Total # of broken channels: 1
13:52:20:ST3_smx:INFO: List of broken channels: [47]
13:52:22:ST3_smx:INFO: chip: 12-5 37.726682 C 1159.654860 mV
13:52:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:22:ST3_smx:INFO: Electrons
13:52:22:ST3_smx:INFO: # loops 0
13:52:23:ST3_smx:INFO: # loops 1
13:52:25:ST3_smx:INFO: # loops 2
13:52:26:ST3_smx:INFO: Total # of broken channels: 0
13:52:26:ST3_smx:INFO: List of broken channels: []
13:52:26:ST3_smx:INFO: Total # of broken channels: 0
13:52:26:ST3_smx:INFO: List of broken channels: []
13:52:28:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
13:52:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:28:ST3_smx:INFO: Electrons
13:52:28:ST3_smx:INFO: # loops 0
13:52:30:ST3_smx:INFO: # loops 1
13:52:31:ST3_smx:INFO: # loops 2
13:52:33:ST3_smx:INFO: Total # of broken channels: 0
13:52:33:ST3_smx:INFO: List of broken channels: []
13:52:33:ST3_smx:INFO: Total # of broken channels: 1
13:52:33:ST3_smx:INFO: List of broken channels: [13]
13:52:35:ST3_smx:INFO: chip: 14-7 44.073563 C 1147.806000 mV
13:52:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:52:35:ST3_smx:INFO: Electrons
13:52:35:ST3_smx:INFO: # loops 0
13:52:36:ST3_smx:INFO: # loops 1
13:52:38:ST3_smx:INFO: # loops 2
13:52:40:ST3_smx:INFO: Total # of broken channels: 1
13:52:40:ST3_smx:INFO: List of broken channels: [93]
13:52:40:ST3_smx:INFO: Total # of broken channels: 44
13:52:40:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 71, 73, 77, 81, 89, 107, 109, 111, 117, 119]
13:52:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:52:40:febtest:INFO: 01-00 | XA-000-09-004-003-005-004-14 | 31.4 | 1212.7
13:52:40:febtest:INFO: 08-01 | XA-000-09-004-003-006-009-00 | 28.2 | 1230.3
13:52:41:febtest:INFO: 03-02 | XA-000-09-004-003-006-004-00 | 44.1 | 1177.4
13:52:41:febtest:INFO: 10-03 | XA-000-09-004-003-006-010-00 | 37.7 | 1195.1
13:52:41:febtest:INFO: 05-04 | XA-000-09-004-003-006-011-00 | 31.4 | 1212.7
13:52:41:febtest:INFO: 12-05 | XA-000-09-004-003-006-012-00 | 37.7 | 1183.3
13:52:41:febtest:INFO: 07-06 | XA-000-09-004-003-006-008-00 | 40.9 | 1177.4
13:52:42:febtest:INFO: 14-07 | XA-000-09-004-003-006-007-00 | 44.1 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_08-13_51_19
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1287| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5670', '1.848', '2.7080', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0500', '1.850', '2.3750', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5269', '0.000', '0.0000', '0.000', '0.0000']