FEB_1290    25.11.24 10:20:50

TextEdit.txt
            10:20:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:20:50:ST3_Shared:INFO:	                         FEB-Sensor                         
10:20:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:21:05:ST3_ModuleSelector:DEBUG:	M3DR6T1000151B2
10:21:05:ST3_ModuleSelector:DEBUG:	L3DR600015
10:21:05:ST3_ModuleSelector:DEBUG:	05183
10:21:05:ST3_ModuleSelector:DEBUG:	62x62
10:21:05:ST3_ModuleSelector:DEBUG:	B
10:21:05:ST3_ModuleSelector:DEBUG:	M3DR6T1000151B2
10:21:05:ST3_ModuleSelector:DEBUG:	L3DR600015
10:21:05:ST3_ModuleSelector:DEBUG:	05183
10:21:05:ST3_ModuleSelector:DEBUG:	62x62
10:21:05:ST3_ModuleSelector:DEBUG:	B
10:21:13:ST3_ModuleSelector:INFO:	M3DR6T1000151B2
10:21:13:ST3_ModuleSelector:INFO:	05183
10:21:13:febtest:INFO:	Testing FEB with SN 1290
10:21:15:smx_tester:INFO:	Scanning setup
10:21:15:elinks:INFO:	Disabling clock on downlink 0
10:21:15:elinks:INFO:	Disabling clock on downlink 1
10:21:15:elinks:INFO:	Disabling clock on downlink 2
10:21:15:elinks:INFO:	Disabling clock on downlink 3
10:21:15:elinks:INFO:	Disabling clock on downlink 4
10:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:21:15:elinks:INFO:	Disabling clock on downlink 0
10:21:15:elinks:INFO:	Disabling clock on downlink 1
10:21:15:elinks:INFO:	Disabling clock on downlink 2
10:21:15:elinks:INFO:	Disabling clock on downlink 3
10:21:15:elinks:INFO:	Disabling clock on downlink 4
10:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:21:15:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:21:15:elinks:INFO:	Disabling clock on downlink 0
10:21:15:elinks:INFO:	Disabling clock on downlink 1
10:21:15:elinks:INFO:	Disabling clock on downlink 2
10:21:15:elinks:INFO:	Disabling clock on downlink 3
10:21:15:elinks:INFO:	Disabling clock on downlink 4
10:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:21:15:elinks:INFO:	Disabling clock on downlink 0
10:21:15:elinks:INFO:	Disabling clock on downlink 1
10:21:15:elinks:INFO:	Disabling clock on downlink 2
10:21:15:elinks:INFO:	Disabling clock on downlink 3
10:21:15:elinks:INFO:	Disabling clock on downlink 4
10:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:21:15:elinks:INFO:	Disabling clock on downlink 0
10:21:15:elinks:INFO:	Disabling clock on downlink 1
10:21:15:elinks:INFO:	Disabling clock on downlink 2
10:21:15:elinks:INFO:	Disabling clock on downlink 3
10:21:15:elinks:INFO:	Disabling clock on downlink 4
10:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:21:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:21:16:setup_element:INFO:	Scanning clock phase
10:21:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:21:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:21:16:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:21:16:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:21:16:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:21:16:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
10:21:16:setup_element:INFO:	Scanning data phases
10:21:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:21:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:21:22:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:21:22:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXXXX_____________________
Data delay found: 35
10:21:22:setup_element:INFO:	Eye window for uplink 1 : ________XXXXXX__________________________
Data delay found: 30
10:21:22:setup_element:INFO:	Eye window for uplink 2 : ______XXXXXXXX__________________________
Data delay found: 29
10:21:22:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXXX_____________________________
Data delay found: 27
10:21:22:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXX____________________________
Data delay found: 28
10:21:22:setup_element:INFO:	Eye window for uplink 5 : __XXXXXX________________________________
Data delay found: 24
10:21:22:setup_element:INFO:	Eye window for uplink 6 : XXXXXX_________________________________X
Data delay found: 22
10:21:22:setup_element:INFO:	Eye window for uplink 7 : XXX_______________________________XXXXXX
Data delay found: 18
10:21:22:setup_element:INFO:	Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
10:21:22:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
10:21:22:setup_element:INFO:	Eye window for uplink 10: ______________________________XXXXXXX___
Data delay found: 13
10:21:22:setup_element:INFO:	Eye window for uplink 11: X_________________________________XXXXXX
Data delay found: 17
10:21:22:setup_element:INFO:	Eye window for uplink 12: ______________________________XXXXXX____
Data delay found: 12
10:21:22:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXXXX_
Data delay found: 15
10:21:22:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXXXXX___
Data delay found: 12
10:21:22:setup_element:INFO:	Eye window for uplink 15: ____________________________X_XXXXXXXXX_
Data delay found: 13
10:21:22:setup_element:INFO:	Setting the data phase to 35 for uplink 0
10:21:22:setup_element:INFO:	Setting the data phase to 30 for uplink 1
10:21:22:setup_element:INFO:	Setting the data phase to 29 for uplink 2
10:21:22:setup_element:INFO:	Setting the data phase to 27 for uplink 3
10:21:22:setup_element:INFO:	Setting the data phase to 28 for uplink 4
10:21:22:setup_element:INFO:	Setting the data phase to 24 for uplink 5
10:21:22:setup_element:INFO:	Setting the data phase to 22 for uplink 6
10:21:22:setup_element:INFO:	Setting the data phase to 18 for uplink 7
10:21:22:setup_element:INFO:	Setting the data phase to 9 for uplink 8
10:21:22:setup_element:INFO:	Setting the data phase to 13 for uplink 9
10:21:22:setup_element:INFO:	Setting the data phase to 13 for uplink 10
10:21:22:setup_element:INFO:	Setting the data phase to 17 for uplink 11
10:21:22:setup_element:INFO:	Setting the data phase to 12 for uplink 12
10:21:22:setup_element:INFO:	Setting the data phase to 15 for uplink 13
10:21:22:setup_element:INFO:	Setting the data phase to 12 for uplink 14
10:21:22:setup_element:INFO:	Setting the data phase to 13 for uplink 15
==============================================OOO==============================================
10:21:22:setup_element:INFO:	Beginning SMX ASICs map scan
10:21:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:21:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:21:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:21:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:21:22:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:21:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:21:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:21:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:21:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:21:22:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:21:22:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:21:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:21:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:21:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:21:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:21:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:21:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:21:23:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:21:23:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:21:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:21:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:21:25:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXXX
      Uplink  1: _______________________________________________________________________XXXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXXX_
      Uplink  3: _______________________________________________________________________XXXXXXXX_
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: _______________________________________________________________________XXXXXXXX_
      Uplink  7: _______________________________________________________________________XXXXXXXX_
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _______________________________________________________________________XXXXXXXXX
      Uplink 11: _______________________________________________________________________XXXXXXXXX
      Uplink 12: ______________________________________________________________________XXXXXXXXX_
      Uplink 13: ______________________________________________________________________XXXXXXXXX_
      Uplink 14: _______________________________________________________________________XXXXXXXXX
      Uplink 15: _______________________________________________________________________XXXXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 32
      Eye Window: ______XXXXXXXX__________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 33
      Eye Window: ____XXXXXXX_____________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 7:
      Optimal Phase: 18
      Window Length: 31
      Eye Window: XXX_______________________________XXXXXX
    Uplink 8:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 9:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 10:
      Optimal Phase: 13
      Window Length: 33
      Eye Window: ______________________________XXXXXXX___
    Uplink 11:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 12:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 13:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 14:
      Optimal Phase: 12
      Window Length: 31
      Eye Window: ____________________________XXXXXXXXX___
    Uplink 15:
      Optimal Phase: 13
      Window Length: 29
      Eye Window: ____________________________X_XXXXXXXXX_

==============================================OOO==============================================
10:21:25:setup_element:INFO:	Performing Elink synchronization
10:21:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:21:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:21:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:21:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:21:25:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:21:25:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:21:25:febtest:INFO:	Init all SMX (CSA): 30
10:21:39:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:21:40:febtest:INFO:	01-00 | XA-000-09-004-002-015-017-14 |  31.4 | 1153.7
10:21:40:febtest:INFO:	08-01 | XA-000-09-004-012-016-010-12 |  28.2 | 1165.6
10:21:40:febtest:INFO:	03-02 | XA-000-09-004-012-016-009-12 |  15.6 | 1218.6
10:21:40:febtest:INFO:	10-03 | XA-000-09-004-012-018-011-15 |  37.7 | 1135.9
10:21:41:febtest:INFO:	05-04 | XA-000-09-004-002-015-012-09 |  34.6 | 1153.7
10:21:41:febtest:INFO:	12-05 | XA-000-09-004-012-017-011-01 |  31.4 | 1153.7
10:21:41:febtest:INFO:	07-06 | XA-000-09-004-002-015-022-14 |  18.7 | 1201.0
10:21:41:febtest:INFO:	14-07 | XA-000-09-004-012-016-011-12 |  18.7 | 1195.1
10:21:42:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:21:45:ST3_smx:INFO:	chip: 1-0 	 34.556970 C 	 1165.571835 mV
10:21:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:21:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:21:45:ST3_smx:INFO:		Electrons
10:21:45:ST3_smx:INFO:	# loops 0
10:21:46:ST3_smx:INFO:	# loops 1
10:21:48:ST3_smx:INFO:	# loops 2
10:21:50:ST3_smx:INFO:	# loops 3
10:21:52:ST3_smx:INFO:	# loops 4
10:21:54:ST3_smx:INFO:	Total # of broken channels: 6
10:21:54:ST3_smx:INFO:	List of broken channels: [90, 96, 102, 110, 120, 122]
10:21:54:ST3_smx:INFO:	Total # of broken channels: 100
10:21:54:ST3_smx:INFO:	List of broken channels: [3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 15, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 38, 39, 41, 42, 43, 44, 45, 47, 48, 49, 50, 52, 54, 55, 56, 57, 58, 59, 61, 63, 65, 66, 67, 69, 71, 73, 75, 76, 77, 79, 80, 82, 83, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 115, 118, 119, 120, 121, 122, 124, 125, 126, 127]
10:21:56:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1177.390875 mV
10:21:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:21:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:21:56:ST3_smx:INFO:		Electrons
10:21:56:ST3_smx:INFO:	# loops 0
10:21:58:ST3_smx:INFO:	# loops 1
10:21:59:ST3_smx:INFO:	# loops 2
10:22:01:ST3_smx:INFO:	# loops 3
10:22:02:ST3_smx:INFO:	# loops 4
10:22:04:ST3_smx:INFO:	Total # of broken channels: 9
10:22:04:ST3_smx:INFO:	List of broken channels: [4, 8, 10, 11, 14, 18, 21, 28, 90]
10:22:04:ST3_smx:INFO:	Total # of broken channels: 97
10:22:04:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, 31, 32, 33, 34, 35, 37, 38, 39, 40, 41, 42, 43, 44, 47, 48, 49, 50, 51, 52, 53, 54, 56, 57, 58, 59, 60, 61, 62, 63, 64, 66, 67, 69, 70, 72, 73, 74, 75, 76, 77, 78, 79, 80, 82, 83, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 96, 97, 98, 99, 100, 101, 103, 104, 106, 107, 109, 110, 111, 113, 115, 118, 120, 123]
10:22:06:ST3_smx:INFO:	chip: 3-2 	 15.590880 C 	 1236.187875 mV
10:22:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:06:ST3_smx:INFO:		Electrons
10:22:06:ST3_smx:INFO:	# loops 0
10:22:08:ST3_smx:INFO:	# loops 1
10:22:10:ST3_smx:INFO:	# loops 2
10:22:11:ST3_smx:INFO:	# loops 3
10:22:13:ST3_smx:INFO:	# loops 4
10:22:15:ST3_smx:INFO:	Total # of broken channels: 5
10:22:15:ST3_smx:INFO:	List of broken channels: [25, 52, 84, 92, 100]
10:22:15:ST3_smx:INFO:	Total # of broken channels: 119
10:22:15:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 124, 125]
10:22:16:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1153.732915 mV
10:22:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:16:ST3_smx:INFO:		Electrons
10:22:16:ST3_smx:INFO:	# loops 0
10:22:19:ST3_smx:INFO:	# loops 1
10:22:21:ST3_smx:INFO:	# loops 2
10:22:23:ST3_smx:INFO:	# loops 3
10:22:24:ST3_smx:INFO:	# loops 4
10:22:26:ST3_smx:INFO:	Total # of broken channels: 7
10:22:26:ST3_smx:INFO:	List of broken channels: [18, 26, 32, 40, 70, 71, 72]
10:22:26:ST3_smx:INFO:	Total # of broken channels: 117
10:22:26:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 119, 120, 121]
10:22:28:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1165.571835 mV
10:22:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:28:ST3_smx:INFO:		Electrons
10:22:28:ST3_smx:INFO:	# loops 0
10:22:29:ST3_smx:INFO:	# loops 1
10:22:31:ST3_smx:INFO:	# loops 2
10:22:32:ST3_smx:INFO:	# loops 3
10:22:34:ST3_smx:INFO:	# loops 4
10:22:36:ST3_smx:INFO:	Total # of broken channels: 0
10:22:36:ST3_smx:INFO:	List of broken channels: []
10:22:36:ST3_smx:INFO:	Total # of broken channels: 55
10:22:36:ST3_smx:INFO:	List of broken channels: [0, 4, 6, 8, 10, 12, 14, 16, 18, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 46, 48, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 120]
10:22:37:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1165.571835 mV
10:22:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:37:ST3_smx:INFO:		Electrons
10:22:37:ST3_smx:INFO:	# loops 0
10:22:39:ST3_smx:INFO:	# loops 1
10:22:40:ST3_smx:INFO:	# loops 2
10:22:42:ST3_smx:INFO:	# loops 3
10:22:44:ST3_smx:INFO:	# loops 4
10:22:46:ST3_smx:INFO:	Total # of broken channels: 0
10:22:46:ST3_smx:INFO:	List of broken channels: []
10:22:46:ST3_smx:INFO:	Total # of broken channels: 45
10:22:46:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 15, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 45, 46, 48, 50, 52, 56, 58, 61, 62, 66, 68, 70, 72, 74, 76, 77, 84, 86, 94, 100, 108]
10:22:47:ST3_smx:INFO:	chip: 7-6 	 18.745682 C 	 1212.728715 mV
10:22:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:47:ST3_smx:INFO:		Electrons
10:22:47:ST3_smx:INFO:	# loops 0
10:22:49:ST3_smx:INFO:	# loops 1
10:22:51:ST3_smx:INFO:	# loops 2
10:22:52:ST3_smx:INFO:	# loops 3
10:22:54:ST3_smx:INFO:	# loops 4
10:22:56:ST3_smx:INFO:	Total # of broken channels: 4
10:22:56:ST3_smx:INFO:	List of broken channels: [4, 94, 95, 120]
10:22:56:ST3_smx:INFO:	Total # of broken channels: 116
10:22:56:ST3_smx:INFO:	List of broken channels: [1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 38, 40, 41, 42, 43, 44, 45, 46, 47, 49, 50, 51, 52, 53, 54, 55, 56, 57, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 76, 77, 78, 79, 80, 81, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 122, 123, 124, 125, 126]
10:22:57:ST3_smx:INFO:	chip: 14-7 	 18.745682 C 	 1206.851500 mV
10:22:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:22:57:ST3_smx:INFO:		Electrons
10:22:57:ST3_smx:INFO:	# loops 0
10:22:59:ST3_smx:INFO:	# loops 1
10:23:01:ST3_smx:INFO:	# loops 2
10:23:02:ST3_smx:INFO:	# loops 3
10:23:04:ST3_smx:INFO:	# loops 4
10:23:06:ST3_smx:INFO:	Total # of broken channels: 67
10:23:06:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 55, 56, 59, 60, 61, 64, 65, 66, 68, 70, 74, 75, 78, 82, 92, 93]
10:23:06:ST3_smx:INFO:	Total # of broken channels: 118
10:23:06:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 104, 105, 106, 107, 108, 111, 112, 113, 114, 115, 116, 117, 118, 119, 121, 122]
10:23:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:23:06:febtest:INFO:	01-00 | XA-000-09-004-002-015-017-14 |  34.6 | 1189.2
10:23:06:febtest:INFO:	08-01 | XA-000-09-004-012-016-010-12 |  28.2 | 1201.0
10:23:07:febtest:INFO:	03-02 | XA-000-09-004-012-016-009-12 |  15.6 | 1265.4
10:23:07:febtest:INFO:	10-03 | XA-000-09-004-012-018-011-15 |  37.7 | 1171.5
10:23:07:febtest:INFO:	05-04 | XA-000-09-004-002-015-012-09 |  34.6 | 1183.3
10:23:07:febtest:INFO:	12-05 | XA-000-09-004-012-017-011-01 |  34.6 | 1183.3
10:23:08:febtest:INFO:	07-06 | XA-000-09-004-002-015-022-14 |  18.7 | 1236.2
10:23:08:febtest:INFO:	14-07 | XA-000-09-004-012-016-011-12 |  18.7 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_25-10_20_50
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1290| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : MUCH
------------------------------------------------------------
SENSOR_NAME: 05183 | SIZE: 62x62 | GRADE: B
MODULE_NAME: M3DR6T1000151B2
LADDER_NAME: L3DR600015
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9150', '1.849', '1.9770', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9890', '1.850', '2.3900', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9520', '1.850', '0.5258', '0.000', '0.0000', '0.000', '0.0000']