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FEB_1293 21.11.24 10:18:16
Info
10:18:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:18:16:ST3_Shared:INFO: FEB-ASIC
10:18:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:18:16:febtest:INFO: Testing FEB with SN 1293
10:18:18:smx_tester:INFO: Scanning setup
10:18:18:elinks:INFO: Disabling clock on downlink 0
10:18:18:elinks:INFO: Disabling clock on downlink 1
10:18:18:elinks:INFO: Disabling clock on downlink 2
10:18:18:elinks:INFO: Disabling clock on downlink 3
10:18:18:elinks:INFO: Disabling clock on downlink 4
10:18:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:18:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:18:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:18:18:elinks:INFO: Disabling clock on downlink 0
10:18:18:elinks:INFO: Disabling clock on downlink 1
10:18:18:elinks:INFO: Disabling clock on downlink 2
10:18:18:elinks:INFO: Disabling clock on downlink 3
10:18:18:elinks:INFO: Disabling clock on downlink 4
10:18:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:18:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:18:18:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:18:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:18:18:elinks:INFO: Disabling clock on downlink 0
10:18:18:elinks:INFO: Disabling clock on downlink 1
10:18:18:elinks:INFO: Disabling clock on downlink 2
10:18:18:elinks:INFO: Disabling clock on downlink 3
10:18:18:elinks:INFO: Disabling clock on downlink 4
10:18:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:18:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:18:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:18:18:elinks:INFO: Disabling clock on downlink 0
10:18:18:elinks:INFO: Disabling clock on downlink 1
10:18:18:elinks:INFO: Disabling clock on downlink 2
10:18:18:elinks:INFO: Disabling clock on downlink 3
10:18:18:elinks:INFO: Disabling clock on downlink 4
10:18:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:18:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:18:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:18:19:elinks:INFO: Disabling clock on downlink 0
10:18:19:elinks:INFO: Disabling clock on downlink 1
10:18:19:elinks:INFO: Disabling clock on downlink 2
10:18:19:elinks:INFO: Disabling clock on downlink 3
10:18:19:elinks:INFO: Disabling clock on downlink 4
10:18:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:18:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:18:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:18:19:setup_element:INFO: Scanning clock phase
10:18:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:18:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:19:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:18:19:setup_element:INFO: Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:18:19:setup_element:INFO: Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
10:18:19:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:18:19:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:18:19:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:18:19:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:18:19:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:18:19:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:18:19:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:18:19:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:18:19:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:18:19:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:18:19:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:18:19:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:18:19:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:18:19:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:18:19:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
10:18:19:setup_element:INFO: Scanning data phases
10:18:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:18:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:24:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:18:24:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXXXXXXX___________________
Data delay found: 34
10:18:24:setup_element:INFO: Eye window for uplink 1 : ______XXXXXXXXX_________________________
Data delay found: 30
10:18:24:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXXX____________________________
Data delay found: 27
10:18:24:setup_element:INFO: Eye window for uplink 3 : __XXXXXXX_______________________________
Data delay found: 25
10:18:24:setup_element:INFO: Eye window for uplink 4 : ____XXXXXX______________________________
Data delay found: 26
10:18:24:setup_element:INFO: Eye window for uplink 5 : XXXXXX________________________________XX
Data delay found: 21
10:18:24:setup_element:INFO: Eye window for uplink 6 : X________________________________XXXXXXX
Data delay found: 16
10:18:24:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXXXX___
Data delay found: 13
10:18:24:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
10:18:24:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXXX___
Data delay found: 13
10:18:24:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXXXX_______
Data delay found: 8
10:18:24:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXXXXX____
Data delay found: 11
10:18:24:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXXX_________
Data delay found: 7
10:18:24:setup_element:INFO: Eye window for uplink 13: ________________________XXXXXXXXX_______
Data delay found: 8
10:18:24:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXXXX__________
Data delay found: 5
10:18:24:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXXXXXXXX______
Data delay found: 7
10:18:24:setup_element:INFO: Setting the data phase to 34 for uplink 0
10:18:24:setup_element:INFO: Setting the data phase to 30 for uplink 1
10:18:24:setup_element:INFO: Setting the data phase to 27 for uplink 2
10:18:24:setup_element:INFO: Setting the data phase to 25 for uplink 3
10:18:24:setup_element:INFO: Setting the data phase to 26 for uplink 4
10:18:24:setup_element:INFO: Setting the data phase to 21 for uplink 5
10:18:24:setup_element:INFO: Setting the data phase to 16 for uplink 6
10:18:24:setup_element:INFO: Setting the data phase to 13 for uplink 7
10:18:24:setup_element:INFO: Setting the data phase to 8 for uplink 8
10:18:24:setup_element:INFO: Setting the data phase to 13 for uplink 9
10:18:24:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:18:24:setup_element:INFO: Setting the data phase to 11 for uplink 11
10:18:24:setup_element:INFO: Setting the data phase to 7 for uplink 12
10:18:24:setup_element:INFO: Setting the data phase to 8 for uplink 13
10:18:24:setup_element:INFO: Setting the data phase to 5 for uplink 14
10:18:24:setup_element:INFO: Setting the data phase to 7 for uplink 15
==============================================OOO==============================================
10:18:24:setup_element:INFO: Beginning SMX ASICs map scan
10:18:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:18:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:18:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:18:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:18:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:18:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:18:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:18:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:18:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:18:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:18:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:18:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:18:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:18:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:18:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:18:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:18:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:18:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:18:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:18:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:18:27:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 68
Eye Windows:
Uplink 0: X__________________________________________________________________________XXXXX
Uplink 1: X__________________________________________________________________________XXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXXX__
Uplink 9: _____________________________________________________________________XXXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXXX__
Uplink 11: _____________________________________________________________________XXXXXXXXX__
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 28
Eye Window: _________XXXXXXXXXXXX___________________
Uplink 1:
Optimal Phase: 30
Window Length: 31
Eye Window: ______XXXXXXXXX_________________________
Uplink 2:
Optimal Phase: 27
Window Length: 32
Eye Window: ____XXXXXXXX____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 33
Eye Window: __XXXXXXX_______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 32
Eye Window: XXXXXX________________________________XX
Uplink 6:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXXXX
Uplink 7:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 33
Eye Window: ______________________________XXXXXXX___
Uplink 10:
Optimal Phase: 8
Window Length: 31
Eye Window: ________________________XXXXXXXXX_______
Uplink 11:
Optimal Phase: 11
Window Length: 31
Eye Window: ___________________________XXXXXXXXX____
Uplink 12:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 13:
Optimal Phase: 8
Window Length: 31
Eye Window: ________________________XXXXXXXXX_______
Uplink 14:
Optimal Phase: 5
Window Length: 31
Eye Window: _____________________XXXXXXXXX__________
Uplink 15:
Optimal Phase: 7
Window Length: 28
Eye Window: ______________________XXXXXXXXXXXX______
==============================================OOO==============================================
10:18:27:setup_element:INFO: Performing Elink synchronization
10:18:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:18:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:18:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:18:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:18:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:18:28:febtest:INFO: Init all SMX (CSA): 30
10:18:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:18:41:febtest:INFO: 01-00 | XA-000-09-004-015-002-010-02 | -432.3 | 1578.5
10:18:41:febtest:INFO: 08-01 | XA-000-09-004-015-002-011-02 | 44.1 | 1141.9
10:18:42:febtest:INFO: 03-02 | XA-000-09-004-017-007-006-11 | 40.9 | 1189.2
10:18:42:febtest:INFO: 10-03 | XA-000-09-004-015-007-004-09 | 34.6 | 1183.3
10:18:42:febtest:INFO: 05-04 | XA-000-09-004-016-014-010-02 | 40.9 | 1153.7
10:18:42:febtest:INFO: 12-05 | XA-000-09-004-015-013-006-06 | 60.0 | 1094.2
10:18:42:febtest:INFO: 07-06 | XA-000-09-004-016-014-012-02 | 37.7 | 1159.7
10:18:43:febtest:INFO: 14-07 | XA-000-09-004-015-013-015-06 | 34.6 | 1165.6
10:18:44:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:18:46:ST3_smx:INFO: chip: 1-0 -432.266438 C 1578.532875 mV
10:18:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:18:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:18:46:ST3_smx:INFO: Electrons
10:18:46:ST3_smx:INFO: Injected pulses: 255LSB, amp_cal 14.280000 fC
10:18:56:ST3_smx:INFO: ----> Checking Analog response
10:18:56:ST3_smx:INFO: ----> Checking broken channels
10:19:05:ST3_smx:INFO: Total # broken ch: 0
10:19:05:ST3_smx:INFO: List FAST: []
10:19:05:ST3_smx:INFO: List SLOW: []
10:19:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:05:ST3_smx:INFO: Holes
10:19:05:ST3_smx:INFO: Injected pulses: 255LSB, amp_cal 14.280000 fC
10:19:24:ST3_smx:INFO: ----> Checking Analog response
10:19:24:ST3_smx:INFO: ----> Checking broken channels
10:19:33:ST3_smx:INFO: Total # broken ch: 0
10:19:33:ST3_smx:INFO: List FAST: []
10:19:33:ST3_smx:INFO: List SLOW: []
10:19:34:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
10:19:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:34:ST3_smx:INFO: Electrons
10:19:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:36:ST3_smx:INFO: ----> Checking Analog response
10:19:36:ST3_smx:INFO: ----> Checking broken channels
10:19:36:ST3_smx:INFO: Total # broken ch: 0
10:19:36:ST3_smx:INFO: List FAST: []
10:19:36:ST3_smx:INFO: List SLOW: []
10:19:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:36:ST3_smx:INFO: Holes
10:19:36:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:39:ST3_smx:INFO: ----> Checking Analog response
10:19:39:ST3_smx:INFO: ----> Checking broken channels
10:19:39:ST3_smx:INFO: Total # broken ch: 0
10:19:39:ST3_smx:INFO: List FAST: []
10:19:39:ST3_smx:INFO: List SLOW: []
10:19:40:ST3_smx:INFO: chip: 3-2 40.898880 C 1230.330540 mV
10:19:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:40:ST3_smx:INFO: Electrons
10:19:40:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:43:ST3_smx:INFO: ----> Checking Analog response
10:19:43:ST3_smx:INFO: ----> Checking broken channels
10:19:43:ST3_smx:INFO: Total # broken ch: 0
10:19:43:ST3_smx:INFO: List FAST: []
10:19:43:ST3_smx:INFO: List SLOW: []
10:19:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:43:ST3_smx:INFO: Holes
10:19:43:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:45:ST3_smx:INFO: ----> Checking Analog response
10:19:45:ST3_smx:INFO: ----> Checking broken channels
10:19:45:ST3_smx:INFO: Total # broken ch: 0
10:19:45:ST3_smx:INFO: List FAST: []
10:19:45:ST3_smx:INFO: List SLOW: []
10:19:47:ST3_smx:INFO: chip: 10-3 31.389742 C 1195.082160 mV
10:19:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:47:ST3_smx:INFO: Electrons
10:19:47:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:49:ST3_smx:INFO: ----> Checking Analog response
10:19:49:ST3_smx:INFO: ----> Checking broken channels
10:19:49:ST3_smx:INFO: Total # broken ch: 3
10:19:49:ST3_smx:INFO: List FAST: [116]
10:19:49:ST3_smx:INFO: List SLOW: [75, 116]
10:19:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:49:ST3_smx:INFO: Holes
10:19:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:52:ST3_smx:INFO: ----> Checking Analog response
10:19:52:ST3_smx:INFO: ----> Checking broken channels
10:19:52:ST3_smx:INFO: Total # broken ch: 3
10:19:52:ST3_smx:INFO: List FAST: [116]
10:19:52:ST3_smx:INFO: List SLOW: [75, 116]
10:19:53:ST3_smx:INFO: chip: 5-4 40.898880 C 1159.654860 mV
10:19:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:53:ST3_smx:INFO: Electrons
10:19:53:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:55:ST3_smx:INFO: ----> Checking Analog response
10:19:55:ST3_smx:INFO: ----> Checking broken channels
10:19:56:ST3_smx:INFO: Total # broken ch: 0
10:19:56:ST3_smx:INFO: List FAST: []
10:19:56:ST3_smx:INFO: List SLOW: []
10:19:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:56:ST3_smx:INFO: Holes
10:19:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:19:58:ST3_smx:INFO: ----> Checking Analog response
10:19:58:ST3_smx:INFO: ----> Checking broken channels
10:19:58:ST3_smx:INFO: Total # broken ch: 0
10:19:58:ST3_smx:INFO: List FAST: []
10:19:58:ST3_smx:INFO: List SLOW: []
10:19:59:ST3_smx:INFO: chip: 12-5 59.984250 C 1100.211760 mV
10:19:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:19:59:ST3_smx:INFO: Electrons
10:19:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:02:ST3_smx:INFO: ----> Checking Analog response
10:20:02:ST3_smx:INFO: ----> Checking broken channels
10:20:02:ST3_smx:INFO: Total # broken ch: 2
10:20:02:ST3_smx:INFO: List FAST: [31]
10:20:02:ST3_smx:INFO: List SLOW: [31]
10:20:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:02:ST3_smx:INFO: Holes
10:20:02:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:04:ST3_smx:INFO: ----> Checking Analog response
10:20:04:ST3_smx:INFO: ----> Checking broken channels
10:20:04:ST3_smx:INFO: Total # broken ch: 2
10:20:04:ST3_smx:INFO: List FAST: [31]
10:20:04:ST3_smx:INFO: List SLOW: [31]
10:20:06:ST3_smx:INFO: chip: 7-6 37.726682 C 1165.571835 mV
10:20:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:06:ST3_smx:INFO: Electrons
10:20:06:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:08:ST3_smx:INFO: ----> Checking Analog response
10:20:08:ST3_smx:INFO: ----> Checking broken channels
10:20:08:ST3_smx:INFO: Total # broken ch: 0
10:20:08:ST3_smx:INFO: List FAST: []
10:20:08:ST3_smx:INFO: List SLOW: []
10:20:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:08:ST3_smx:INFO: Holes
10:20:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:10:ST3_smx:INFO: ----> Checking Analog response
10:20:10:ST3_smx:INFO: ----> Checking broken channels
10:20:11:ST3_smx:INFO: Total # broken ch: 0
10:20:11:ST3_smx:INFO: List FAST: []
10:20:11:ST3_smx:INFO: List SLOW: []
10:20:12:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
10:20:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:12:ST3_smx:INFO: Electrons
10:20:12:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:14:ST3_smx:INFO: ----> Checking Analog response
10:20:14:ST3_smx:INFO: ----> Checking broken channels
10:20:15:ST3_smx:INFO: Total # broken ch: 0
10:20:15:ST3_smx:INFO: List FAST: []
10:20:15:ST3_smx:INFO: List SLOW: []
10:20:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:15:ST3_smx:INFO: Holes
10:20:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:20:17:ST3_smx:INFO: ----> Checking Analog response
10:20:17:ST3_smx:INFO: ----> Checking broken channels
10:20:17:ST3_smx:INFO: Total # broken ch: 0
10:20:17:ST3_smx:INFO: List FAST: []
10:20:17:ST3_smx:INFO: List SLOW: []
10:20:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:20:17:febtest:INFO: 01-00 | XA-000-09-004-015-002-010-02 | -432.3 | 1578.5
10:20:17:febtest:INFO: 08-01 | XA-000-09-004-015-002-011-02 | 44.1 | 1171.5
10:20:18:febtest:INFO: 03-02 | XA-000-09-004-017-007-006-11 | 40.9 | 1578.5
10:20:18:febtest:INFO: 10-03 | XA-000-09-004-015-007-004-09 | 34.6 | 1212.7
10:20:18:febtest:INFO: 05-04 | XA-000-09-004-016-014-010-02 | 44.1 | 1177.4
10:20:18:febtest:INFO: 12-05 | XA-000-09-004-015-013-006-06 | 60.0 | 1124.0
10:20:19:febtest:INFO: 07-06 | XA-000-09-004-016-014-012-02 | 40.9 | 1183.3
10:20:19:febtest:INFO: 14-07 | XA-000-09-004-015-013-015-06 | 40.9 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_21-10_18_16
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1293| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAMEM3DR6T0000150B2
------------------------------------------------------------
VI_before_Init : ['2.449', '1.7360', '1.849', '2.2320', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.1910', '1.850', '2.1940', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.1830', '1.850', '0.5902', '0.000', '0.0000', '0.000', '0.0000']