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FEB_1303 12.12.24 08:27:22
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08:27:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:27:22:ST3_Shared:INFO: FEB-Sensor
08:27:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:27:31:ST3_Shared:INFO: STS mode selected
08:27:37:ST3_ModuleSelector:DEBUG: M4UR1T2011312A2
08:27:37:ST3_ModuleSelector:DEBUG: L4UR101131
08:27:37:ST3_ModuleSelector:DEBUG: 05202
08:27:37:ST3_ModuleSelector:DEBUG: 62x42
08:27:37:ST3_ModuleSelector:DEBUG: A
08:27:37:ST3_ModuleSelector:DEBUG: M4UR1T2011312A2
08:27:37:ST3_ModuleSelector:DEBUG: L4UR101131
08:27:37:ST3_ModuleSelector:DEBUG: 05202
08:27:37:ST3_ModuleSelector:DEBUG: 62x42
08:27:37:ST3_ModuleSelector:DEBUG: A
08:27:44:ST3_ModuleSelector:INFO: M4UR1T2011312A2
08:27:44:ST3_ModuleSelector:INFO: 05202
08:27:44:febtest:INFO: Testing FEB with SN 1303
08:27:45:smx_tester:INFO: Scanning setup
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:27:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:46:elinks:INFO: Disabling clock on downlink 0
08:27:46:elinks:INFO: Disabling clock on downlink 1
08:27:46:elinks:INFO: Disabling clock on downlink 2
08:27:46:elinks:INFO: Disabling clock on downlink 3
08:27:46:elinks:INFO: Disabling clock on downlink 4
08:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:46:elinks:INFO: Disabling clock on downlink 0
08:27:46:elinks:INFO: Disabling clock on downlink 1
08:27:46:elinks:INFO: Disabling clock on downlink 2
08:27:46:elinks:INFO: Disabling clock on downlink 3
08:27:46:elinks:INFO: Disabling clock on downlink 4
08:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:46:elinks:INFO: Disabling clock on downlink 0
08:27:46:elinks:INFO: Disabling clock on downlink 1
08:27:46:elinks:INFO: Disabling clock on downlink 2
08:27:46:elinks:INFO: Disabling clock on downlink 3
08:27:46:elinks:INFO: Disabling clock on downlink 4
08:27:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:27:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:27:46:setup_element:INFO: Scanning clock phase
08:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:27:47:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Clock Delay: 47
08:27:47:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Clock Delay: 47
08:27:47:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
08:27:47:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
08:27:47:setup_element:INFO: Eye window for uplink 4 : XXXXXXX_________________________________________________________________XXXXXXXX
Clock Delay: 39
08:27:47:setup_element:INFO: Eye window for uplink 5 : XXXXXXX_________________________________________________________________XXXXXXXX
Clock Delay: 39
08:27:47:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Clock Delay: 44
08:27:47:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Clock Delay: 44
08:27:47:setup_element:INFO: Eye window for uplink 8 : XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
08:27:47:setup_element:INFO: Eye window for uplink 9 : XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
08:27:47:setup_element:INFO: Eye window for uplink 10: XXXXXXXXX_______________________________________________________________________
Clock Delay: 44
08:27:47:setup_element:INFO: Eye window for uplink 11: XXXXXXXXX_______________________________________________________________________
Clock Delay: 44
08:27:47:setup_element:INFO: Eye window for uplink 12: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
08:27:47:setup_element:INFO: Eye window for uplink 13: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
08:27:47:setup_element:INFO: Eye window for uplink 14: XXX_____________________________________________________________________________
Clock Delay: 41
08:27:47:setup_element:INFO: Eye window for uplink 15: XXX_____________________________________________________________________________
Clock Delay: 41
08:27:47:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
08:27:47:setup_element:INFO: Scanning data phases
08:27:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:27:52:setup_element:INFO: Eye window for uplink 0 : _XXXXXXXX_______________________________
Data delay found: 24
08:27:52:setup_element:INFO: Eye window for uplink 1 : XXXX_______________________________XXXXX
Data delay found: 19
08:27:52:setup_element:INFO: Eye window for uplink 2 : XXXXX____________________________X_XXXXX
Data delay found: 18
08:27:52:setup_element:INFO: Eye window for uplink 3 : XX_____________________________XXXXXXXXX
Data delay found: 16
08:27:52:setup_element:INFO: Eye window for uplink 4 : XXX______________________________XXXXXXX
Data delay found: 17
08:27:52:setup_element:INFO: Eye window for uplink 5 : _____________________________XXXXXXXX___
Data delay found: 12
08:27:52:setup_element:INFO: Eye window for uplink 6 : __________________________XXXXXXXXXX____
Data delay found: 10
08:27:52:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXX________
Data delay found: 7
08:27:52:setup_element:WARNING: Group 0, downlink 1, uplink 8: No True values in scanned data!
Traceback (most recent call last):
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
data_delay, window_len = find_center(fcl)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!
08:27:52:setup_element:WARNING: Group 0, downlink 1, uplink 9: No True values in scanned data!
Traceback (most recent call last):
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
data_delay, window_len = find_center(fcl)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!
08:27:52:setup_element:INFO: Eye window for uplink 10: _____________XXXXXXXXXX_________________
Data delay found: 37
08:27:52:setup_element:INFO: Eye window for uplink 11: _______________XXXXXXXXXXXX_____________
Data delay found: 0
08:27:52:setup_element:INFO: Eye window for uplink 12: XXXX____________XXXXXXXXX_______________
Data delay found: 32
08:27:52:setup_element:INFO: Eye window for uplink 13: XXXX________________XXXXXXXX____________
Data delay found: 11
08:27:52:setup_element:INFO: Eye window for uplink 14: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
08:27:52:setup_element:INFO: Eye window for uplink 15: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
08:27:52:setup_element:INFO: Setting the data phase to 24 for uplink 0
08:27:52:setup_element:INFO: Setting the data phase to 19 for uplink 1
08:27:52:setup_element:INFO: Setting the data phase to 18 for uplink 2
08:27:52:setup_element:INFO: Setting the data phase to 16 for uplink 3
08:27:52:setup_element:INFO: Setting the data phase to 17 for uplink 4
08:27:52:setup_element:INFO: Setting the data phase to 12 for uplink 5
08:27:52:setup_element:INFO: Setting the data phase to 10 for uplink 6
08:27:52:setup_element:INFO: Setting the data phase to 7 for uplink 7
08:27:52:setup_element:INFO: Setting the data phase to 37 for uplink 10
08:27:52:setup_element:INFO: Setting the data phase to 0 for uplink 11
08:27:52:setup_element:INFO: Setting the data phase to 32 for uplink 12
08:27:52:setup_element:INFO: Setting the data phase to 11 for uplink 13
08:27:52:setup_element:INFO: Setting the data phase to 6 for uplink 14
08:27:52:setup_element:INFO: Setting the data phase to 7 for uplink 15
==============================================OOO==============================================
08:27:52:setup_element:INFO: Beginning SMX ASICs map scan
08:27:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:27:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:27:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:27:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:27:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:27:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:27:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:27:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:27:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:27:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:27:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:27:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:27:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:27:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:27:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:27:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:27:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:27:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:27:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:27:55:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 46
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Uplink 4: XXXXXXX_________________________________________________________________XXXXXXXX
Uplink 5: XXXXXXX_________________________________________________________________XXXXXXXX
Uplink 6: XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Uplink 7: XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Uplink 8: XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Uplink 9: XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Uplink 10: XXXXXXXXX_______________________________________________________________________
Uplink 11: XXXXXXXXX_______________________________________________________________________
Uplink 12: XXXX_________________________________________________________________XXXXXXXXXXX
Uplink 13: XXXX_________________________________________________________________XXXXXXXXXXX
Uplink 14: XXX_____________________________________________________________________________
Uplink 15: XXX_____________________________________________________________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 32
Eye Window: _XXXXXXXX_______________________________
Uplink 1:
Optimal Phase: 19
Window Length: 31
Eye Window: XXXX_______________________________XXXXX
Uplink 2:
Optimal Phase: 18
Window Length: 28
Eye Window: XXXXX____________________________X_XXXXX
Uplink 3:
Optimal Phase: 16
Window Length: 29
Eye Window: XX_____________________________XXXXXXXXX
Uplink 4:
Optimal Phase: 17
Window Length: 30
Eye Window: XXX______________________________XXXXXXX
Uplink 5:
Optimal Phase: 12
Window Length: 32
Eye Window: _____________________________XXXXXXXX___
Uplink 6:
Optimal Phase: 10
Window Length: 30
Eye Window: __________________________XXXXXXXXXX____
Uplink 7:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 10:
Optimal Phase: 37
Window Length: 30
Eye Window: _____________XXXXXXXXXX_________________
Uplink 11:
Optimal Phase: 0
Window Length: 28
Eye Window: _______________XXXXXXXXXXXX_____________
Uplink 12:
Optimal Phase: 32
Window Length: 15
Eye Window: XXXX____________XXXXXXXXX_______________
Uplink 13:
Optimal Phase: 11
Window Length: 16
Eye Window: XXXX________________XXXXXXXX____________
Uplink 14:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
==============================================OOO==============================================
08:27:55:setup_element:INFO: Performing Elink synchronization
08:27:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:27:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:27:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:27:55:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:27:55:febtest:INFO: Init all SMX (CSA): 30
08:28:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:28:10:febtest:INFO: 01-00 | XA-000-09-004-012-005-007-11 | 18.7 | 1189.2
08:28:10:febtest:INFO: 08-01 | XA-000-09-004-012-004-007-06 | 21.9 | 1177.4
08:28:10:febtest:INFO: 03-02 | XA-000-09-004-012-005-008-11 | 40.9 | 1135.9
08:28:10:febtest:INFO: 10-03 | XA-000-09-004-012-004-006-06 | 21.9 | 1177.4
08:28:10:febtest:INFO: 05-04 | XA-000-09-004-012-006-008-05 | 28.2 | 1171.5
08:28:11:febtest:INFO: 12-05 | XA-000-09-004-012-006-013-05 | 21.9 | 1177.4
08:28:11:febtest:INFO: 07-06 | XA-000-09-004-012-006-007-05 | 31.4 | 1159.7
08:28:11:febtest:INFO: 14-07 | XA-000-09-004-012-006-014-05 | 15.6 | 1195.1
08:28:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:28:14:ST3_smx:INFO: chip: 1-0 18.745682 C 1200.969315 mV
08:28:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:14:ST3_smx:INFO: Electrons
08:28:14:ST3_smx:INFO: # loops 0
08:28:16:ST3_smx:INFO: # loops 1
08:28:17:ST3_smx:INFO: # loops 2
08:28:19:ST3_smx:INFO: # loops 3
08:28:21:ST3_smx:INFO: # loops 4
08:28:22:ST3_smx:INFO: Total # of broken channels: 0
08:28:22:ST3_smx:INFO: List of broken channels: []
08:28:22:ST3_smx:INFO: Total # of broken channels: 0
08:28:22:ST3_smx:INFO: List of broken channels: []
08:28:24:ST3_smx:INFO: chip: 8-1 21.902970 C 1189.190035 mV
08:28:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:24:ST3_smx:INFO: Electrons
08:28:24:ST3_smx:INFO: # loops 0
08:28:26:ST3_smx:INFO: # loops 1
08:28:28:ST3_smx:INFO: # loops 2
08:28:29:ST3_smx:INFO: # loops 3
08:28:31:ST3_smx:INFO: # loops 4
08:28:32:ST3_smx:INFO: Total # of broken channels: 0
08:28:32:ST3_smx:INFO: List of broken channels: []
08:28:32:ST3_smx:INFO: Total # of broken channels: 0
08:28:32:ST3_smx:INFO: List of broken channels: []
08:28:34:ST3_smx:INFO: chip: 3-2 37.726682 C 1147.806000 mV
08:28:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:34:ST3_smx:INFO: Electrons
08:28:34:ST3_smx:INFO: # loops 0
08:28:36:ST3_smx:INFO: # loops 1
08:28:37:ST3_smx:INFO: # loops 2
08:28:39:ST3_smx:INFO: # loops 3
08:28:40:ST3_smx:INFO: # loops 4
08:28:42:ST3_smx:INFO: Total # of broken channels: 0
08:28:42:ST3_smx:INFO: List of broken channels: []
08:28:42:ST3_smx:INFO: Total # of broken channels: 0
08:28:42:ST3_smx:INFO: List of broken channels: []
08:28:44:ST3_smx:INFO: chip: 10-3 21.902970 C 1189.190035 mV
08:28:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:44:ST3_smx:INFO: Electrons
08:28:44:ST3_smx:INFO: # loops 0
08:28:45:ST3_smx:INFO: # loops 1
08:28:47:ST3_smx:INFO: # loops 2
08:28:49:ST3_smx:INFO: # loops 3
08:28:50:ST3_smx:INFO: # loops 4
08:28:52:ST3_smx:INFO: Total # of broken channels: 0
08:28:52:ST3_smx:INFO: List of broken channels: []
08:28:52:ST3_smx:INFO: Total # of broken channels: 0
08:28:52:ST3_smx:INFO: List of broken channels: []
08:28:53:ST3_smx:INFO: chip: 5-4 28.225000 C 1183.292940 mV
08:28:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:53:ST3_smx:INFO: Electrons
08:28:53:ST3_smx:INFO: # loops 0
08:28:55:ST3_smx:INFO: # loops 1
08:28:57:ST3_smx:INFO: # loops 2
08:28:58:ST3_smx:INFO: # loops 3
08:29:00:ST3_smx:INFO: # loops 4
08:29:01:ST3_smx:INFO: Total # of broken channels: 0
08:29:01:ST3_smx:INFO: List of broken channels: []
08:29:01:ST3_smx:INFO: Total # of broken channels: 2
08:29:01:ST3_smx:INFO: List of broken channels: [58, 68]
08:29:03:ST3_smx:INFO: chip: 12-5 21.902970 C 1195.082160 mV
08:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:03:ST3_smx:INFO: Electrons
08:29:03:ST3_smx:INFO: # loops 0
08:29:05:ST3_smx:INFO: # loops 1
08:29:06:ST3_smx:INFO: # loops 2
08:29:08:ST3_smx:INFO: # loops 3
08:29:09:ST3_smx:INFO: # loops 4
08:29:11:ST3_smx:INFO: Total # of broken channels: 0
08:29:11:ST3_smx:INFO: List of broken channels: []
08:29:11:ST3_smx:INFO: Total # of broken channels: 0
08:29:11:ST3_smx:INFO: List of broken channels: []
08:29:13:ST3_smx:INFO: chip: 7-6 31.389742 C 1171.483840 mV
08:29:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:13:ST3_smx:INFO: Electrons
08:29:13:ST3_smx:INFO: # loops 0
08:29:15:ST3_smx:INFO: # loops 1
08:29:16:ST3_smx:INFO: # loops 2
08:29:18:ST3_smx:INFO: # loops 3
08:29:19:ST3_smx:INFO: # loops 4
08:29:21:ST3_smx:INFO: Total # of broken channels: 0
08:29:21:ST3_smx:INFO: List of broken channels: []
08:29:21:ST3_smx:INFO: Total # of broken channels: 0
08:29:21:ST3_smx:INFO: List of broken channels: []
08:29:22:ST3_smx:INFO: chip: 14-7 18.745682 C 1206.851500 mV
08:29:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:22:ST3_smx:INFO: Electrons
08:29:22:ST3_smx:INFO: # loops 0
08:29:24:ST3_smx:INFO: # loops 1
08:29:26:ST3_smx:INFO: # loops 2
08:29:28:ST3_smx:INFO: # loops 3
08:29:29:ST3_smx:INFO: # loops 4
08:29:31:ST3_smx:INFO: Total # of broken channels: 0
08:29:31:ST3_smx:INFO: List of broken channels: []
08:29:31:ST3_smx:INFO: Total # of broken channels: 1
08:29:31:ST3_smx:INFO: List of broken channels: [48]
08:29:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:29:31:febtest:INFO: 01-00 | XA-000-09-004-012-005-007-11 | 21.9 | 1224.5
08:29:32:febtest:INFO: 08-01 | XA-000-09-004-012-004-007-06 | 21.9 | 1206.9
08:29:32:febtest:INFO: 03-02 | XA-000-09-004-012-005-008-11 | 40.9 | 1165.6
08:29:32:febtest:INFO: 10-03 | XA-000-09-004-012-004-006-06 | 25.1 | 1212.7
08:29:32:febtest:INFO: 05-04 | XA-000-09-004-012-006-008-05 | 31.4 | 1201.0
08:29:33:febtest:INFO: 12-05 | XA-000-09-004-012-006-013-05 | 25.1 | 1212.7
08:29:33:febtest:INFO: 07-06 | XA-000-09-004-012-006-007-05 | 31.4 | 1189.2
08:29:33:febtest:INFO: 14-07 | XA-000-09-004-012-006-014-05 | 18.7 | 1224.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_12_12-08_27_22
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 05202 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4UR1T2011312A2
LADDER_NAME: L4UR101131
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5360', '1.849', '2.3140', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0160', '1.850', '2.3760', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5206', '0.000', '0.0000', '0.000', '0.0000']