09:12:46:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:12:46:ST3_Shared:INFO:	                       FEB-Microcable                       
09:12:46:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:12:48:ST3_Shared:INFO:	STS mode selected
09:12:48:febtest:INFO:	Testing FEB with SN 1303
09:12:49:smx_tester:INFO:	Scanning setup
09:12:49:elinks:INFO:	Disabling clock on downlink 0
09:12:49:elinks:INFO:	Disabling clock on downlink 1
09:12:49:elinks:INFO:	Disabling clock on downlink 2
09:12:49:elinks:INFO:	Disabling clock on downlink 3
09:12:49:elinks:INFO:	Disabling clock on downlink 4
09:12:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:12:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:50:elinks:INFO:	Disabling clock on downlink 0
09:12:50:elinks:INFO:	Disabling clock on downlink 1
09:12:50:elinks:INFO:	Disabling clock on downlink 2
09:12:50:elinks:INFO:	Disabling clock on downlink 3
09:12:50:elinks:INFO:	Disabling clock on downlink 4
09:12:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:12:50:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:12:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:50:elinks:INFO:	Disabling clock on downlink 0
09:12:50:elinks:INFO:	Disabling clock on downlink 1
09:12:50:elinks:INFO:	Disabling clock on downlink 2
09:12:50:elinks:INFO:	Disabling clock on downlink 3
09:12:50:elinks:INFO:	Disabling clock on downlink 4
09:12:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:50:elinks:INFO:	Disabling clock on downlink 0
09:12:50:elinks:INFO:	Disabling clock on downlink 1
09:12:50:elinks:INFO:	Disabling clock on downlink 2
09:12:50:elinks:INFO:	Disabling clock on downlink 3
09:12:50:elinks:INFO:	Disabling clock on downlink 4
09:12:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:12:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:50:elinks:INFO:	Disabling clock on downlink 0
09:12:50:elinks:INFO:	Disabling clock on downlink 1
09:12:50:elinks:INFO:	Disabling clock on downlink 2
09:12:50:elinks:INFO:	Disabling clock on downlink 3
09:12:50:elinks:INFO:	Disabling clock on downlink 4
09:12:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:12:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:12:50:setup_element:INFO:	Scanning clock phase
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:12:50:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:12:50:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:12:50:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:12:50:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:12:50:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:12:50:setup_element:INFO:	Eye window for uplink 8 : ___________________________________________________________________________XXX__
Clock Delay: 36
09:12:50:setup_element:INFO:	Eye window for uplink 9 : ___________________________________________________________________________XXX__
Clock Delay: 36
09:12:50:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:50:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:50:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:50:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:50:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:12:50:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
==============================================OOO==============================================
09:12:50:setup_element:INFO:	Scanning data phases
09:12:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:12:56:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:12:56:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:12:56:setup_element:INFO:	Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:12:56:setup_element:INFO:	Eye window for uplink 2 : ___X___XXXXX____________________________
Data delay found: 27
09:12:56:setup_element:INFO:	Eye window for uplink 3 : _X_XXXXXX_______________________________
Data delay found: 24
09:12:56:setup_element:INFO:	Eye window for uplink 4 : ___X_XXXXX______________________________
Data delay found: 26
09:12:56:setup_element:INFO:	Eye window for uplink 5 : XX_XXX__________________________________
Data delay found: 22
09:12:56:setup_element:INFO:	Eye window for uplink 6 : XXXX____________________________________
Data delay found: 21
09:12:56:setup_element:INFO:	Eye window for uplink 7 : XXX_________________________________XXXX
Data delay found: 19
09:12:56:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:12:56:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
09:12:56:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXXX________
Data delay found: 8
09:12:56:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXXX____
Data delay found: 12
09:12:56:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
09:12:56:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
09:12:56:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXXX______
Data delay found: 10
09:12:56:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
09:12:56:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:12:56:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:12:56:setup_element:INFO:	Setting the data phase to 27 for uplink 2
09:12:56:setup_element:INFO:	Setting the data phase to 24 for uplink 3
09:12:56:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:12:56:setup_element:INFO:	Setting the data phase to 22 for uplink 5
09:12:56:setup_element:INFO:	Setting the data phase to 21 for uplink 6
09:12:56:setup_element:INFO:	Setting the data phase to 19 for uplink 7
09:12:56:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:12:56:setup_element:INFO:	Setting the data phase to 13 for uplink 9
09:12:56:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:12:56:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:12:56:setup_element:INFO:	Setting the data phase to 10 for uplink 12
09:12:56:setup_element:INFO:	Setting the data phase to 13 for uplink 13
09:12:56:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:12:56:setup_element:INFO:	Setting the data phase to 12 for uplink 15
==============================================OOO==============================================
09:12:56:setup_element:INFO:	Beginning SMX ASICs map scan
09:12:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:12:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:12:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:12:56:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:12:56:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:12:56:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:12:56:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:12:56:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:12:56:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:12:56:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:12:56:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:12:56:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:12:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:12:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:12:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:12:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:12:57:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:12:57:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:12:57:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:12:57:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:12:59:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXX_
      Uplink  1: ________________________________________________________________________XXXXXXX_
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXX__
      Uplink  7: _________________________________________________________________________XXXXX__
      Uplink  8: ___________________________________________________________________________XXX__
      Uplink  9: ___________________________________________________________________________XXX__
      Uplink 10: ______________________________________________________________________XXXXXXX___
      Uplink 11: ______________________________________________________________________XXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 2:
      Optimal Phase: 27
      Window Length: 31
      Eye Window: ___X___XXXXX____________________________
    Uplink 3:
      Optimal Phase: 24
      Window Length: 32
      Eye Window: _X_XXXXXX_______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 33
      Eye Window: ___X_XXXXX______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XX_XXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 36
      Eye Window: XXXX____________________________________
    Uplink 7:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 33
      Eye Window: _________________________XXXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 33
      Eye Window: _____________________________XXXXXXX____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____

==============================================OOO==============================================
09:12:59:setup_element:INFO:	Performing Elink synchronization
09:12:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:12:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:12:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
09:12:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:12:59:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
09:12:59:febtest:INFO:	Init all SMX (CSA): 30
09:13:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:13:14:febtest:INFO:	01-00 | XA-000-09-004-012-005-007-11 |  15.6 | 1224.5
09:13:14:febtest:INFO:	08-01 | XA-000-09-004-012-004-007-06 |  15.6 | 1206.9
09:13:14:febtest:INFO:	03-02 | XA-000-09-004-012-005-008-11 |  31.4 | 1171.5
09:13:15:febtest:INFO:	10-03 | XA-000-09-004-012-004-006-06 |  18.7 | 1206.9
09:13:15:febtest:INFO:	05-04 | XA-000-09-004-012-006-008-05 |  21.9 | 1206.9
09:13:15:febtest:INFO:	12-05 | XA-000-09-004-012-006-013-05 |  15.6 | 1212.7
09:13:15:febtest:INFO:	07-06 | XA-000-09-004-012-006-007-05 |  21.9 | 1195.1
09:13:15:febtest:INFO:	14-07 | XA-000-09-004-012-006-014-05 |   9.3 | 1224.5
09:13:16:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:13:19:ST3_smx:INFO:	chip: 1-0 	 15.590880 C 	 1230.330540 mV
09:13:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:19:ST3_smx:INFO:		Electrons
09:13:19:ST3_smx:INFO:	# loops 0
09:13:20:ST3_smx:INFO:	# loops 1
09:13:22:ST3_smx:INFO:	# loops 2
09:13:23:ST3_smx:INFO:	Total # of broken channels: 0
09:13:23:ST3_smx:INFO:	List of broken channels: []
09:13:23:ST3_smx:INFO:	Total # of broken channels: 0
09:13:23:ST3_smx:INFO:	List of broken channels: []
09:13:25:ST3_smx:INFO:	chip: 8-1 	 15.590880 C 	 1218.600960 mV
09:13:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:25:ST3_smx:INFO:		Electrons
09:13:25:ST3_smx:INFO:	# loops 0
09:13:27:ST3_smx:INFO:	# loops 1
09:13:28:ST3_smx:INFO:	# loops 2
09:13:30:ST3_smx:INFO:	Total # of broken channels: 0
09:13:30:ST3_smx:INFO:	List of broken channels: []
09:13:30:ST3_smx:INFO:	Total # of broken channels: 0
09:13:30:ST3_smx:INFO:	List of broken channels: []
09:13:32:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1177.390875 mV
09:13:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:32:ST3_smx:INFO:		Electrons
09:13:32:ST3_smx:INFO:	# loops 0
09:13:33:ST3_smx:INFO:	# loops 1
09:13:35:ST3_smx:INFO:	# loops 2
09:13:37:ST3_smx:INFO:	Total # of broken channels: 0
09:13:37:ST3_smx:INFO:	List of broken channels: []
09:13:37:ST3_smx:INFO:	Total # of broken channels: 13
09:13:37:ST3_smx:INFO:	List of broken channels: [98, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124]
09:13:38:ST3_smx:INFO:	chip: 10-3 	 18.745682 C 	 1212.728715 mV
09:13:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:38:ST3_smx:INFO:		Electrons
09:13:38:ST3_smx:INFO:	# loops 0
09:13:40:ST3_smx:INFO:	# loops 1
09:13:42:ST3_smx:INFO:	# loops 2
09:13:43:ST3_smx:INFO:	Total # of broken channels: 0
09:13:43:ST3_smx:INFO:	List of broken channels: []
09:13:43:ST3_smx:INFO:	Total # of broken channels: 0
09:13:43:ST3_smx:INFO:	List of broken channels: []
09:13:45:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1212.728715 mV
09:13:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:45:ST3_smx:INFO:		Electrons
09:13:45:ST3_smx:INFO:	# loops 0
09:13:47:ST3_smx:INFO:	# loops 1
09:13:48:ST3_smx:INFO:	# loops 2
09:13:50:ST3_smx:INFO:	Total # of broken channels: 0
09:13:50:ST3_smx:INFO:	List of broken channels: []
09:13:50:ST3_smx:INFO:	Total # of broken channels: 1
09:13:50:ST3_smx:INFO:	List of broken channels: [58]
09:13:52:ST3_smx:INFO:	chip: 12-5 	 15.590880 C 	 1224.468235 mV
09:13:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:52:ST3_smx:INFO:		Electrons
09:13:52:ST3_smx:INFO:	# loops 0
09:13:54:ST3_smx:INFO:	# loops 1
09:13:55:ST3_smx:INFO:	# loops 2
09:13:57:ST3_smx:INFO:	Total # of broken channels: 1
09:13:57:ST3_smx:INFO:	List of broken channels: [74]
09:13:57:ST3_smx:INFO:	Total # of broken channels: 0
09:13:57:ST3_smx:INFO:	List of broken channels: []
09:13:59:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1206.851500 mV
09:13:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:59:ST3_smx:INFO:		Electrons
09:13:59:ST3_smx:INFO:	# loops 0
09:14:00:ST3_smx:INFO:	# loops 1
09:14:02:ST3_smx:INFO:	# loops 2
09:14:03:ST3_smx:INFO:	Total # of broken channels: 0
09:14:03:ST3_smx:INFO:	List of broken channels: []
09:14:03:ST3_smx:INFO:	Total # of broken channels: 0
09:14:03:ST3_smx:INFO:	List of broken channels: []
09:14:05:ST3_smx:INFO:	chip: 14-7 	 12.438562 C 	 1236.187875 mV
09:14:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:14:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:14:05:ST3_smx:INFO:		Electrons
09:14:05:ST3_smx:INFO:	# loops 0
09:14:07:ST3_smx:INFO:	# loops 1
09:14:08:ST3_smx:INFO:	# loops 2
09:14:10:ST3_smx:INFO:	Total # of broken channels: 0
09:14:10:ST3_smx:INFO:	List of broken channels: []
09:14:10:ST3_smx:INFO:	Total # of broken channels: 0
09:14:10:ST3_smx:INFO:	List of broken channels: []
09:14:10:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:14:10:febtest:INFO:	01-00 | XA-000-09-004-012-005-007-11 |  15.6 | 1253.7
09:14:11:febtest:INFO:	08-01 | XA-000-09-004-012-004-007-06 |  18.7 | 1236.2
09:14:11:febtest:INFO:	03-02 | XA-000-09-004-012-005-008-11 |  34.6 | 1201.0
09:14:11:febtest:INFO:	10-03 | XA-000-09-004-012-004-006-06 |  18.7 | 1236.2
09:14:11:febtest:INFO:	05-04 | XA-000-09-004-012-006-008-05 |  25.1 | 1236.2
09:14:12:febtest:INFO:	12-05 | XA-000-09-004-012-006-013-05 |  18.7 | 1242.0
09:14:12:febtest:INFO:	07-06 | XA-000-09-004-012-006-007-05 |  25.1 | 1224.5
09:14:12:febtest:INFO:	14-07 | XA-000-09-004-012-006-014-05 |  12.4 | 1253.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_06-09_12_46
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1303| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9480', '1.849', '2.2960', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9390', '1.850', '2.3910', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9230', '1.850', '0.5173', '0.000', '0.0000', '0.000', '0.0000']