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FEB_1306 25.11.24 14:14:43
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14:14:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:43:ST3_Shared:INFO: FEB-ASIC
14:14:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:43:febtest:INFO: Testing FEB with SN 1306
14:14:44:smx_tester:INFO: Scanning setup
14:14:44:elinks:INFO: Disabling clock on downlink 0
14:14:44:elinks:INFO: Disabling clock on downlink 1
14:14:44:elinks:INFO: Disabling clock on downlink 2
14:14:44:elinks:INFO: Disabling clock on downlink 3
14:14:44:elinks:INFO: Disabling clock on downlink 4
14:14:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:14:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:44:elinks:INFO: Disabling clock on downlink 0
14:14:44:elinks:INFO: Disabling clock on downlink 1
14:14:44:elinks:INFO: Disabling clock on downlink 2
14:14:44:elinks:INFO: Disabling clock on downlink 3
14:14:44:elinks:INFO: Disabling clock on downlink 4
14:14:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:14:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:14:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:44:elinks:INFO: Disabling clock on downlink 0
14:14:44:elinks:INFO: Disabling clock on downlink 1
14:14:44:elinks:INFO: Disabling clock on downlink 2
14:14:44:elinks:INFO: Disabling clock on downlink 3
14:14:44:elinks:INFO: Disabling clock on downlink 4
14:14:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:14:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:45:elinks:INFO: Disabling clock on downlink 0
14:14:45:elinks:INFO: Disabling clock on downlink 1
14:14:45:elinks:INFO: Disabling clock on downlink 2
14:14:45:elinks:INFO: Disabling clock on downlink 3
14:14:45:elinks:INFO: Disabling clock on downlink 4
14:14:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:14:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:45:elinks:INFO: Disabling clock on downlink 0
14:14:45:elinks:INFO: Disabling clock on downlink 1
14:14:45:elinks:INFO: Disabling clock on downlink 2
14:14:45:elinks:INFO: Disabling clock on downlink 3
14:14:45:elinks:INFO: Disabling clock on downlink 4
14:14:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:14:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:14:45:setup_element:INFO: Scanning clock phase
14:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:45:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:14:45:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Clock Delay: 46
14:14:45:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Clock Delay: 46
14:14:45:setup_element:INFO: Eye window for uplink 2 : X__XXXXXXX_________________________________________________________________XXXXX
Clock Delay: 42
14:14:45:setup_element:INFO: Eye window for uplink 3 : X__XXXXXXX_________________________________________________________________XXXXX
Clock Delay: 42
14:14:45:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXX________________________________________________________________XXXX
Clock Delay: 43
14:14:45:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXX________________________________________________________________XXXX
Clock Delay: 43
14:14:45:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Clock Delay: 43
14:14:45:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Clock Delay: 43
14:14:45:setup_element:INFO: Eye window for uplink 8 : XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
14:14:45:setup_element:INFO: Eye window for uplink 9 : XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
14:14:45:setup_element:INFO: Eye window for uplink 10: XXXXXXXX_______________________________________________________________XXXXXXXXX
Clock Delay: 39
14:14:45:setup_element:INFO: Eye window for uplink 11: XXXXXXXX_______________________________________________________________XXXXXXXXX
Clock Delay: 39
14:14:45:setup_element:INFO: Eye window for uplink 12: XXXX_X_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:14:45:setup_element:INFO: Eye window for uplink 13: XXXX_X_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:14:45:setup_element:INFO: Eye window for uplink 14: XXXX_XX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:14:45:setup_element:INFO: Eye window for uplink 15: XXXX_XX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:14:45:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
14:14:45:setup_element:INFO: Scanning data phases
14:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:51:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:14:51:setup_element:INFO: Eye window for uplink 0 : XXXXXXXX___________________________XXXXX
Data delay found: 21
14:14:51:setup_element:INFO: Eye window for uplink 1 : XXX______________________________XXXXXXX
Data delay found: 17
14:14:51:setup_element:INFO: Eye window for uplink 2 : XXXXXXX_____________X____XXXXX____XXXXXX
Data delay found: 13
14:14:51:setup_element:INFO: Eye window for uplink 3 : XXXX________________X____XXXXX____XXXXXX
Data delay found: 11
14:14:51:setup_element:INFO: Eye window for uplink 4 : XXXX_____XXXX______XX____XXXXXX____XXXXX
Data delay found: 15
14:14:51:setup_element:INFO: Eye window for uplink 5 : _________XXXX______XX____XXXXXX_XXXXXX__
Data delay found: 3
14:14:51:setup_element:INFO: Eye window for uplink 6 : _________________________XXXXXXXXXXX____
Data delay found: 10
14:14:51:setup_element:INFO: Eye window for uplink 7 : _______________________XXXXXXXXXX_______
Data delay found: 7
14:14:51:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXX_____________________
Data delay found: 35
14:14:51:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXX_______________
Data delay found: 0
14:14:51:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXXXX______________
Data delay found: 1
14:14:51:setup_element:INFO: Eye window for uplink 11: _____________________XXXXXXXX___________
Data delay found: 4
14:14:51:setup_element:INFO: Eye window for uplink 12: _______________XXXXXXXX___________XXXX__
Data delay found: 6
14:14:51:setup_element:INFO: Eye window for uplink 13: __________________XXXXXXXX________XXXX__
Data delay found: 7
14:14:51:setup_element:INFO: Eye window for uplink 14: ___________XXXXXXXXXX_____________XXXXXX
Data delay found: 27
14:14:51:setup_element:INFO: Eye window for uplink 15: _____________XXXXXXXXXX___________XXXXXX
Data delay found: 6
14:14:51:setup_element:INFO: Setting the data phase to 21 for uplink 0
14:14:51:setup_element:INFO: Setting the data phase to 17 for uplink 1
14:14:51:setup_element:INFO: Setting the data phase to 13 for uplink 2
14:14:51:setup_element:INFO: Setting the data phase to 11 for uplink 3
14:14:51:setup_element:INFO: Setting the data phase to 15 for uplink 4
14:14:51:setup_element:INFO: Setting the data phase to 3 for uplink 5
14:14:51:setup_element:INFO: Setting the data phase to 10 for uplink 6
14:14:51:setup_element:INFO: Setting the data phase to 7 for uplink 7
14:14:51:setup_element:INFO: Setting the data phase to 35 for uplink 8
14:14:51:setup_element:INFO: Setting the data phase to 0 for uplink 9
14:14:51:setup_element:INFO: Setting the data phase to 1 for uplink 10
14:14:51:setup_element:INFO: Setting the data phase to 4 for uplink 11
14:14:51:setup_element:INFO: Setting the data phase to 6 for uplink 12
14:14:51:setup_element:INFO: Setting the data phase to 7 for uplink 13
14:14:51:setup_element:INFO: Setting the data phase to 27 for uplink 14
14:14:51:setup_element:INFO: Setting the data phase to 6 for uplink 15
==============================================OOO==============================================
14:14:51:setup_element:INFO: Beginning SMX ASICs map scan
14:14:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:14:51:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:14:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:14:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:14:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:14:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:14:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:14:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:14:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:14:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:14:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:14:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:14:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:14:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:14:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:14:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:14:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:14:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:14:54:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 47
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXX
Uplink 2: X__XXXXXXX_________________________________________________________________XXXXX
Uplink 3: X__XXXXXXX_________________________________________________________________XXXXX
Uplink 4: XXXXXXXXXXXX________________________________________________________________XXXX
Uplink 5: XXXXXXXXXXXX________________________________________________________________XXXX
Uplink 6: XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Uplink 7: XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Uplink 8: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Uplink 9: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Uplink 10: XXXXXXXX_______________________________________________________________XXXXXXXXX
Uplink 11: XXXXXXXX_______________________________________________________________XXXXXXXXX
Uplink 12: XXXX_X_______________________________________________________________XXXXXXXXXXX
Uplink 13: XXXX_X_______________________________________________________________XXXXXXXXXXX
Uplink 14: XXXX_XX______________________________________________________________XXXXXXXXXXX
Uplink 15: XXXX_XX______________________________________________________________XXXXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 21
Window Length: 27
Eye Window: XXXXXXXX___________________________XXXXX
Uplink 1:
Optimal Phase: 17
Window Length: 30
Eye Window: XXX______________________________XXXXXXX
Uplink 2:
Optimal Phase: 13
Window Length: 13
Eye Window: XXXXXXX_____________X____XXXXX____XXXXXX
Uplink 3:
Optimal Phase: 11
Window Length: 16
Eye Window: XXXX________________X____XXXXX____XXXXXX
Uplink 4:
Optimal Phase: 15
Window Length: 6
Eye Window: XXXX_____XXXX______XX____XXXXXX____XXXXX
Uplink 5:
Optimal Phase: 3
Window Length: 11
Eye Window: _________XXXX______XX____XXXXXX_XXXXXX__
Uplink 6:
Optimal Phase: 10
Window Length: 29
Eye Window: _________________________XXXXXXXXXXX____
Uplink 7:
Optimal Phase: 7
Window Length: 30
Eye Window: _______________________XXXXXXXXXX_______
Uplink 8:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 9:
Optimal Phase: 0
Window Length: 32
Eye Window: _________________XXXXXXXX_______________
Uplink 10:
Optimal Phase: 1
Window Length: 31
Eye Window: _________________XXXXXXXXX______________
Uplink 11:
Optimal Phase: 4
Window Length: 32
Eye Window: _____________________XXXXXXXX___________
Uplink 12:
Optimal Phase: 6
Window Length: 17
Eye Window: _______________XXXXXXXX___________XXXX__
Uplink 13:
Optimal Phase: 7
Window Length: 20
Eye Window: __________________XXXXXXXX________XXXX__
Uplink 14:
Optimal Phase: 27
Window Length: 13
Eye Window: ___________XXXXXXXXXX_____________XXXXXX
Uplink 15:
Optimal Phase: 6
Window Length: 13
Eye Window: _____________XXXXXXXXXX___________XXXXXX
==============================================OOO==============================================
14:14:54:setup_element:INFO: Performing Elink synchronization
14:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:14:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:14:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:14:54:febtest:INFO: Init all SMX (CSA): 30
14:15:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:15:09:febtest:INFO: 01-00 | XA-000-09-004-006-014-024-08 | 25.1 | 1189.2
14:15:09:febtest:INFO: 08-01 | XA-000-09-004-006-015-024-05 | 31.4 | 1153.7
14:15:09:febtest:INFO: 03-02 | XA-000-09-004-006-014-026-08 | 21.9 | 1195.1
14:15:09:febtest:INFO: 10-03 | XA-000-09-004-006-018-020-14 | 18.7 | 1195.1
14:15:10:febtest:INFO: 05-04 | XA-000-09-004-006-013-026-06 | 21.9 | 1195.1
14:15:10:febtest:INFO: 12-05 | XA-000-09-004-006-006-017-04 | 40.9 | 1124.0
14:15:10:febtest:INFO: 07-06 | XA-000-09-004-006-013-025-06 | 25.1 | 1189.2
14:15:10:febtest:INFO: 14-07 | XA-000-08-002-003-007-130-13 | 40.9 | 1118.1
14:15:11:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:15:13:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV
14:15:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:13:ST3_smx:INFO: Electrons
14:15:13:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:16:ST3_smx:INFO: ----> Checking Analog response
14:15:16:ST3_smx:INFO: ----> Checking broken channels
14:15:16:ST3_smx:INFO: Total # broken ch: 0
14:15:16:ST3_smx:INFO: List FAST: []
14:15:16:ST3_smx:INFO: List SLOW: []
14:15:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:16:ST3_smx:INFO: Holes
14:15:16:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:18:ST3_smx:INFO: ----> Checking Analog response
14:15:18:ST3_smx:INFO: ----> Checking broken channels
14:15:18:ST3_smx:INFO: Total # broken ch: 0
14:15:18:ST3_smx:INFO: List FAST: []
14:15:18:ST3_smx:INFO: List SLOW: []
14:15:20:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV
14:15:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:20:ST3_smx:INFO: Electrons
14:15:20:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:23:ST3_smx:INFO: ----> Checking Analog response
14:15:23:ST3_smx:INFO: ----> Checking broken channels
14:15:23:ST3_smx:INFO: Total # broken ch: 0
14:15:23:ST3_smx:INFO: List FAST: []
14:15:23:ST3_smx:INFO: List SLOW: []
14:15:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:23:ST3_smx:INFO: Holes
14:15:23:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:25:ST3_smx:INFO: ----> Checking Analog response
14:15:25:ST3_smx:INFO: ----> Checking broken channels
14:15:25:ST3_smx:INFO: Total # broken ch: 0
14:15:25:ST3_smx:INFO: List FAST: []
14:15:25:ST3_smx:INFO: List SLOW: []
14:15:27:ST3_smx:INFO: chip: 3-2 21.902970 C 1212.728715 mV
14:15:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:27:ST3_smx:INFO: Electrons
14:15:27:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:29:ST3_smx:INFO: ----> Checking Analog response
14:15:29:ST3_smx:INFO: ----> Checking broken channels
14:15:29:ST3_smx:INFO: Total # broken ch: 0
14:15:29:ST3_smx:INFO: List FAST: []
14:15:29:ST3_smx:INFO: List SLOW: []
14:15:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:29:ST3_smx:INFO: Holes
14:15:29:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:32:ST3_smx:INFO: ----> Checking Analog response
14:15:32:ST3_smx:INFO: ----> Checking broken channels
14:15:32:ST3_smx:INFO: Total # broken ch: 0
14:15:32:ST3_smx:INFO: List FAST: []
14:15:32:ST3_smx:INFO: List SLOW: []
14:15:33:ST3_smx:INFO: chip: 10-3 15.590880 C 1206.851500 mV
14:15:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:33:ST3_smx:INFO: Electrons
14:15:33:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:36:ST3_smx:INFO: ----> Checking Analog response
14:15:36:ST3_smx:INFO: ----> Checking broken channels
14:15:36:ST3_smx:INFO: Total # broken ch: 0
14:15:36:ST3_smx:INFO: List FAST: []
14:15:36:ST3_smx:INFO: List SLOW: []
14:15:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:36:ST3_smx:INFO: Holes
14:15:36:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:38:ST3_smx:INFO: ----> Checking Analog response
14:15:38:ST3_smx:INFO: ----> Checking broken channels
14:15:38:ST3_smx:INFO: Total # broken ch: 0
14:15:38:ST3_smx:INFO: List FAST: []
14:15:38:ST3_smx:INFO: List SLOW: []
14:15:40:ST3_smx:INFO: chip: 5-4 21.902970 C 1206.851500 mV
14:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:40:ST3_smx:INFO: Electrons
14:15:40:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:42:ST3_smx:INFO: ----> Checking Analog response
14:15:42:ST3_smx:INFO: ----> Checking broken channels
14:15:42:ST3_smx:INFO: Total # broken ch: 0
14:15:42:ST3_smx:INFO: List FAST: []
14:15:42:ST3_smx:INFO: List SLOW: []
14:15:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:42:ST3_smx:INFO: Holes
14:15:42:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:45:ST3_smx:INFO: ----> Checking Analog response
14:15:45:ST3_smx:INFO: ----> Checking broken channels
14:15:45:ST3_smx:INFO: Total # broken ch: 0
14:15:45:ST3_smx:INFO: List FAST: []
14:15:45:ST3_smx:INFO: List SLOW: []
14:15:46:ST3_smx:INFO: chip: 12-5 40.898880 C 1135.937260 mV
14:15:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:46:ST3_smx:INFO: Electrons
14:15:47:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:49:ST3_smx:INFO: ----> Checking Analog response
14:15:49:ST3_smx:INFO: ----> Checking broken channels
14:15:49:ST3_smx:INFO: Total # broken ch: 0
14:15:49:ST3_smx:INFO: List FAST: []
14:15:49:ST3_smx:INFO: List SLOW: []
14:15:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:49:ST3_smx:INFO: Holes
14:15:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:51:ST3_smx:INFO: ----> Checking Analog response
14:15:51:ST3_smx:INFO: ----> Checking broken channels
14:15:52:ST3_smx:INFO: Total # broken ch: 0
14:15:52:ST3_smx:INFO: List FAST: []
14:15:52:ST3_smx:INFO: List SLOW: []
14:15:53:ST3_smx:INFO: chip: 7-6 25.062742 C 1200.969315 mV
14:15:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:53:ST3_smx:INFO: Electrons
14:15:53:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:55:ST3_smx:INFO: ----> Checking Analog response
14:15:55:ST3_smx:INFO: ----> Checking broken channels
14:15:55:ST3_smx:INFO: Total # broken ch: 0
14:15:55:ST3_smx:INFO: List FAST: []
14:15:55:ST3_smx:INFO: List SLOW: []
14:15:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:55:ST3_smx:INFO: Holes
14:15:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:15:58:ST3_smx:INFO: ----> Checking Analog response
14:15:58:ST3_smx:INFO: ----> Checking broken channels
14:15:58:ST3_smx:INFO: Total # broken ch: 0
14:15:58:ST3_smx:INFO: List FAST: []
14:15:58:ST3_smx:INFO: List SLOW: []
14:15:59:ST3_smx:INFO: chip: 14-7 40.898880 C 1129.995435 mV
14:15:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:59:ST3_smx:INFO: Electrons
14:15:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:16:02:ST3_smx:INFO: ----> Checking Analog response
14:16:02:ST3_smx:INFO: ----> Checking broken channels
14:16:02:ST3_smx:INFO: Total # broken ch: 0
14:16:02:ST3_smx:INFO: List FAST: []
14:16:02:ST3_smx:INFO: List SLOW: []
14:16:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:16:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:16:02:ST3_smx:INFO: Holes
14:16:02:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:16:04:ST3_smx:INFO: ----> Checking Analog response
14:16:04:ST3_smx:INFO: ----> Checking broken channels
14:16:04:ST3_smx:INFO: Total # broken ch: 0
14:16:04:ST3_smx:INFO: List FAST: []
14:16:04:ST3_smx:INFO: List SLOW: []
14:16:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:16:05:febtest:INFO: 01-00 | XA-000-09-004-006-014-024-08 | 28.2 | 1212.7
14:16:05:febtest:INFO: 08-01 | XA-000-09-004-006-015-024-05 | 31.4 | 1195.1
14:16:05:febtest:INFO: 03-02 | XA-000-09-004-006-014-026-08 | 21.9 | 1236.2
14:16:05:febtest:INFO: 10-03 | XA-000-09-004-006-018-020-14 | 18.7 | 1224.5
14:16:06:febtest:INFO: 05-04 | XA-000-09-004-006-013-026-06 | 25.1 | 1224.5
14:16:06:febtest:INFO: 12-05 | XA-000-09-004-006-006-017-04 | 40.9 | 1153.7
14:16:06:febtest:INFO: 07-06 | XA-000-09-004-006-013-025-06 | 28.2 | 1212.7
14:16:06:febtest:INFO: 14-07 | XA-000-08-002-003-007-130-13 | 44.1 | 1147.8
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_25-14_14_43
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1306| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4350', '1.849', '2.4280', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9970', '1.850', '2.4340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.5175', '0.000', '0.0000', '0.000', '0.0000']