13:12:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:12:17:ST3_Shared:INFO:	                         FEB-Sensor                         
13:12:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:12:25:ST3_ModuleSelector:DEBUG:	M4UR1B3011313B2

13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	M4UR1B3011313B2

13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:25:ST3_ModuleSelector:DEBUG:	
13:12:33:ST3_ModuleSelector:INFO:	New Sensor ID: 07343
13:12:33:ST3_ModuleSelector:DEBUG:	M4UR1B3011313B2

13:12:33:ST3_ModuleSelector:DEBUG:	
13:12:33:ST3_ModuleSelector:DEBUG:	07343
13:12:33:ST3_ModuleSelector:DEBUG:	62x62
13:12:33:ST3_ModuleSelector:DEBUG:	
13:12:35:ST3_ModuleSelector:INFO:	M4UR1B3011313B2

13:12:35:ST3_ModuleSelector:INFO:	07343
13:12:35:febtest:INFO:	Testing FEB with SN 1309
13:12:37:smx_tester:INFO:	Scanning setup
13:12:37:elinks:INFO:	Disabling clock on downlink 0
13:12:37:elinks:INFO:	Disabling clock on downlink 1
13:12:37:elinks:INFO:	Disabling clock on downlink 2
13:12:37:elinks:INFO:	Disabling clock on downlink 3
13:12:37:elinks:INFO:	Disabling clock on downlink 4
13:12:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:12:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:12:37:elinks:INFO:	Disabling clock on downlink 0
13:12:37:elinks:INFO:	Disabling clock on downlink 1
13:12:37:elinks:INFO:	Disabling clock on downlink 2
13:12:37:elinks:INFO:	Disabling clock on downlink 3
13:12:37:elinks:INFO:	Disabling clock on downlink 4
13:12:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:12:37:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:12:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:12:37:elinks:INFO:	Disabling clock on downlink 0
13:12:37:elinks:INFO:	Disabling clock on downlink 1
13:12:37:elinks:INFO:	Disabling clock on downlink 2
13:12:37:elinks:INFO:	Disabling clock on downlink 3
13:12:37:elinks:INFO:	Disabling clock on downlink 4
13:12:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:12:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:12:37:elinks:INFO:	Disabling clock on downlink 0
13:12:37:elinks:INFO:	Disabling clock on downlink 1
13:12:37:elinks:INFO:	Disabling clock on downlink 2
13:12:37:elinks:INFO:	Disabling clock on downlink 3
13:12:37:elinks:INFO:	Disabling clock on downlink 4
13:12:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:12:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:12:37:elinks:INFO:	Disabling clock on downlink 0
13:12:37:elinks:INFO:	Disabling clock on downlink 1
13:12:37:elinks:INFO:	Disabling clock on downlink 2
13:12:37:elinks:INFO:	Disabling clock on downlink 3
13:12:37:elinks:INFO:	Disabling clock on downlink 4
13:12:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:12:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:12:37:setup_element:INFO:	Scanning clock phase
13:12:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:12:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:38:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:12:38:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXXX________________________________________________XXXXXXXX
Clock Delay: 47
13:12:38:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXXX________________________________________________XXXXXXXX
Clock Delay: 47
13:12:38:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXX_______________________________________________________________XXXXXXX
Clock Delay: 41
13:12:38:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXX_______________________________________________________________XXXXXXX
Clock Delay: 41
13:12:38:setup_element:INFO:	Eye window for uplink 4 : XXXXXXXX________________________________________________________________XXXX____
Clock Delay: 39
13:12:38:setup_element:INFO:	Eye window for uplink 5 : XXXXXXXX________________________________________________________________XXXX____
Clock Delay: 39
13:12:38:setup_element:INFO:	Eye window for uplink 6 : XXX_____________________________________________________________________XXXXXXXX
Clock Delay: 37
13:12:38:setup_element:INFO:	Eye window for uplink 7 : XXX_____________________________________________________________________XXXXXXXX
Clock Delay: 37
13:12:38:setup_element:INFO:	Eye window for uplink 8 : XXXXXXXXXX______________________________________________________________________
Clock Delay: 44
13:12:38:setup_element:INFO:	Eye window for uplink 9 : XXXXXXXXXX______________________________________________________________________
Clock Delay: 44
13:12:38:setup_element:INFO:	Eye window for uplink 10: XXXXXXXX_____________________________________________________________XXXX____XXX
Clock Delay: 38
13:12:38:setup_element:INFO:	Eye window for uplink 11: XXXXXXXX_____________________________________________________________XXXX____XXX
Clock Delay: 38
13:12:38:setup_element:INFO:	Eye window for uplink 12: XXXX___________________________________________________________________XXXXXXXXX
Clock Delay: 37
13:12:38:setup_element:INFO:	Eye window for uplink 13: XXXX___________________________________________________________________XXXXXXXXX
Clock Delay: 37
13:12:38:setup_element:INFO:	Eye window for uplink 14: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
Clock Delay: 41
13:12:38:setup_element:INFO:	Eye window for uplink 15: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
Clock Delay: 41
13:12:38:setup_element:INFO:	Setting the clock phase to 46 for group 0, downlink 1
==============================================OOO==============================================
13:12:38:setup_element:INFO:	Scanning data phases
13:12:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:12:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:43:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:12:43:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXX______________________________XX
Data delay found: 22
13:12:43:setup_element:INFO:	Eye window for uplink 1 : XXX_____________________________XXXXXXXX
Data delay found: 17
13:12:43:setup_element:INFO:	Eye window for uplink 2 : XXXXX_____________________________X_XXXX
Data delay found: 19
13:12:43:setup_element:INFO:	Eye window for uplink 3 : XX______________________________XXXXXXXX
Data delay found: 16
13:12:43:setup_element:INFO:	Eye window for uplink 4 : XXX_____________________________XXXXXXXX
Data delay found: 17
13:12:43:setup_element:INFO:	Eye window for uplink 5 : ___________________________XXXXXXXXXX___
Data delay found: 11
13:12:43:setup_element:INFO:	Eye window for uplink 6 : _________________________XXXXXXXXXX_____
Data delay found: 9
13:12:43:setup_element:INFO:	Eye window for uplink 7 : _______________________XXXXXXXX_________
Data delay found: 6
13:12:43:setup_element:INFO:	Eye window for uplink 8 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
13:12:43:setup_element:INFO:	Eye window for uplink 9 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
13:12:43:setup_element:INFO:	Eye window for uplink 10: ______________XXXXXXXX__________________
Data delay found: 37
13:12:43:setup_element:INFO:	Eye window for uplink 11: __________________XXXXXXX_______________
Data delay found: 1
13:12:43:setup_element:INFO:	Eye window for uplink 12: ______________XXXXXXXXX_______XXXXXXXXXX
Data delay found: 6
13:12:43:setup_element:INFO:	Eye window for uplink 13: _______________XXXXXXXXXXXX___XXXXXXXXXX
Data delay found: 7
13:12:43:setup_element:INFO:	Eye window for uplink 14: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
13:12:43:setup_element:INFO:	Eye window for uplink 15: ______________X_XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
13:12:43:setup_element:INFO:	Setting the data phase to 22 for uplink 0
13:12:43:setup_element:INFO:	Setting the data phase to 17 for uplink 1
13:12:43:setup_element:INFO:	Setting the data phase to 19 for uplink 2
13:12:43:setup_element:INFO:	Setting the data phase to 16 for uplink 3
13:12:43:setup_element:INFO:	Setting the data phase to 17 for uplink 4
13:12:43:setup_element:INFO:	Setting the data phase to 11 for uplink 5
13:12:43:setup_element:INFO:	Setting the data phase to 9 for uplink 6
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 7
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 8
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 9
13:12:43:setup_element:INFO:	Setting the data phase to 37 for uplink 10
13:12:43:setup_element:INFO:	Setting the data phase to 1 for uplink 11
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 12
13:12:43:setup_element:INFO:	Setting the data phase to 7 for uplink 13
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 14
13:12:43:setup_element:INFO:	Setting the data phase to 6 for uplink 15
==============================================OOO==============================================
13:12:43:setup_element:INFO:	Beginning SMX ASICs map scan
13:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:12:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:12:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:12:43:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:12:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:12:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:12:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:12:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:12:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:12:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:12:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:12:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:12:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:12:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:12:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:12:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:12:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:12:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:12:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:12:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:12:45:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 46
    Window Length: 45
    Eye Windows:
      Uplink  0: XXXXXXXXXXXXXXXXXXXXXXXX________________________________________________XXXXXXXX
      Uplink  1: XXXXXXXXXXXXXXXXXXXXXXXX________________________________________________XXXXXXXX
      Uplink  2: XXXXXXXXXX_______________________________________________________________XXXXXXX
      Uplink  3: XXXXXXXXXX_______________________________________________________________XXXXXXX
      Uplink  4: XXXXXXXX________________________________________________________________XXXX____
      Uplink  5: XXXXXXXX________________________________________________________________XXXX____
      Uplink  6: XXX_____________________________________________________________________XXXXXXXX
      Uplink  7: XXX_____________________________________________________________________XXXXXXXX
      Uplink  8: XXXXXXXXXX______________________________________________________________________
      Uplink  9: XXXXXXXXXX______________________________________________________________________
      Uplink 10: XXXXXXXX_____________________________________________________________XXXX____XXX
      Uplink 11: XXXXXXXX_____________________________________________________________XXXX____XXX
      Uplink 12: XXXX___________________________________________________________________XXXXXXXXX
      Uplink 13: XXXX___________________________________________________________________XXXXXXXXX
      Uplink 14: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
      Uplink 15: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 22
      Window Length: 30
      Eye Window: XXXXXXXX______________________________XX
    Uplink 1:
      Optimal Phase: 17
      Window Length: 29
      Eye Window: XXX_____________________________XXXXXXXX
    Uplink 2:
      Optimal Phase: 19
      Window Length: 29
      Eye Window: XXXXX_____________________________X_XXXX
    Uplink 3:
      Optimal Phase: 16
      Window Length: 30
      Eye Window: XX______________________________XXXXXXXX
    Uplink 4:
      Optimal Phase: 17
      Window Length: 29
      Eye Window: XXX_____________________________XXXXXXXX
    Uplink 5:
      Optimal Phase: 11
      Window Length: 30
      Eye Window: ___________________________XXXXXXXXXX___
    Uplink 6:
      Optimal Phase: 9
      Window Length: 30
      Eye Window: _________________________XXXXXXXXXX_____
    Uplink 7:
      Optimal Phase: 6
      Window Length: 32
      Eye Window: _______________________XXXXXXXX_________
    Uplink 8:
      Optimal Phase: 6
      Window Length: 13
      Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 9:
      Optimal Phase: 6
      Window Length: 13
      Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 10:
      Optimal Phase: 37
      Window Length: 32
      Eye Window: ______________XXXXXXXX__________________
    Uplink 11:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 12:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXX_______XXXXXXXXXX
    Uplink 13:
      Optimal Phase: 7
      Window Length: 15
      Eye Window: _______________XXXXXXXXXXXX___XXXXXXXXXX
    Uplink 14:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 15:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________X_XXXXXXXXXXXXXXXXXXXXXXXX

==============================================OOO==============================================
13:12:45:setup_element:INFO:	Performing Elink synchronization
13:12:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:12:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:12:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:12:45:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:12:45:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:12:46:febtest:INFO:	Init all SMX (CSA): 30
13:13:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:13:00:febtest:INFO:	01-00 | XA-000-09-004-006-013-023-06 |  37.7 | 1130.0
13:13:00:febtest:INFO:	08-01 | XA-000-09-004-007-003-016-07 |  34.6 | 1141.9
13:13:01:febtest:INFO:	03-02 | XA-000-09-004-006-015-023-05 |   6.1 | 1236.2
13:13:01:febtest:INFO:	10-03 | XA-000-09-004-007-002-015-13 |  28.2 | 1165.6
13:13:01:febtest:INFO:	05-04 | XA-000-09-004-007-002-014-13 |  37.7 | 1130.0
13:13:01:febtest:INFO:	12-05 | XA-000-09-004-007-003-015-00 |  25.1 | 1177.4
13:13:02:febtest:INFO:	07-06 | XA-000-09-004-006-014-023-08 |  15.6 | 1201.0
13:13:02:febtest:INFO:	14-07 | XA-000-09-004-002-016-013-01 |  25.1 | 1159.7
13:13:03:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:13:05:ST3_smx:INFO:	chip: 1-0 	 37.726682 C 	 1135.937260 mV
13:13:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:05:ST3_smx:INFO:		Electrons
13:13:05:ST3_smx:INFO:	# loops 0
13:13:07:ST3_smx:INFO:	# loops 1
13:13:08:ST3_smx:INFO:	# loops 2
13:13:10:ST3_smx:INFO:	# loops 3
13:13:11:ST3_smx:INFO:	# loops 4
13:13:13:ST3_smx:INFO:	Total # of broken channels: 0
13:13:13:ST3_smx:INFO:	List of broken channels: []
13:13:13:ST3_smx:INFO:	Total # of broken channels: 0
13:13:13:ST3_smx:INFO:	List of broken channels: []
13:13:15:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1153.732915 mV
13:13:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:15:ST3_smx:INFO:		Electrons
13:13:15:ST3_smx:INFO:	# loops 0
13:13:16:ST3_smx:INFO:	# loops 1
13:13:18:ST3_smx:INFO:	# loops 2
13:13:19:ST3_smx:INFO:	# loops 3
13:13:21:ST3_smx:INFO:	# loops 4
13:13:22:ST3_smx:INFO:	Total # of broken channels: 0
13:13:22:ST3_smx:INFO:	List of broken channels: []
13:13:22:ST3_smx:INFO:	Total # of broken channels: 1
13:13:22:ST3_smx:INFO:	List of broken channels: [48]
13:13:24:ST3_smx:INFO:	chip: 3-2 	 6.141382 C 	 1247.887635 mV
13:13:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:24:ST3_smx:INFO:		Electrons
13:13:24:ST3_smx:INFO:	# loops 0
13:13:26:ST3_smx:INFO:	# loops 1
13:13:27:ST3_smx:INFO:	# loops 2
13:13:29:ST3_smx:INFO:	# loops 3
13:13:30:ST3_smx:INFO:	# loops 4
13:13:32:ST3_smx:INFO:	Total # of broken channels: 0
13:13:32:ST3_smx:INFO:	List of broken channels: []
13:13:32:ST3_smx:INFO:	Total # of broken channels: 1
13:13:32:ST3_smx:INFO:	List of broken channels: [77]
13:13:34:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1171.483840 mV
13:13:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:34:ST3_smx:INFO:		Electrons
13:13:34:ST3_smx:INFO:	# loops 0
13:13:35:ST3_smx:INFO:	# loops 1
13:13:37:ST3_smx:INFO:	# loops 2
13:13:38:ST3_smx:INFO:	# loops 3
13:13:40:ST3_smx:INFO:	# loops 4
13:13:42:ST3_smx:INFO:	Total # of broken channels: 1
13:13:42:ST3_smx:INFO:	List of broken channels: [3]
13:13:42:ST3_smx:INFO:	Total # of broken channels: 1
13:13:42:ST3_smx:INFO:	List of broken channels: [3]
13:13:43:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1135.937260 mV
13:13:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:43:ST3_smx:INFO:		Electrons
13:13:43:ST3_smx:INFO:	# loops 0
13:13:45:ST3_smx:INFO:	# loops 1
13:13:46:ST3_smx:INFO:	# loops 2
13:13:48:ST3_smx:INFO:	# loops 3
13:13:49:ST3_smx:INFO:	# loops 4
13:13:51:ST3_smx:INFO:	Total # of broken channels: 0
13:13:51:ST3_smx:INFO:	List of broken channels: []
13:13:51:ST3_smx:INFO:	Total # of broken channels: 0
13:13:51:ST3_smx:INFO:	List of broken channels: []
13:13:53:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1189.190035 mV
13:13:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:13:53:ST3_smx:INFO:		Electrons
13:13:53:ST3_smx:INFO:	# loops 0
13:13:54:ST3_smx:INFO:	# loops 1
13:13:56:ST3_smx:INFO:	# loops 2
13:13:57:ST3_smx:INFO:	# loops 3
13:13:59:ST3_smx:INFO:	# loops 4
13:14:01:ST3_smx:INFO:	Total # of broken channels: 0
13:14:01:ST3_smx:INFO:	List of broken channels: []
13:14:01:ST3_smx:INFO:	Total # of broken channels: 0
13:14:01:ST3_smx:INFO:	List of broken channels: []
13:14:02:ST3_smx:INFO:	chip: 7-6 	 18.745682 C 	 1212.728715 mV
13:14:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:14:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:14:02:ST3_smx:INFO:		Electrons
13:14:02:ST3_smx:INFO:	# loops 0
13:14:04:ST3_smx:INFO:	# loops 1
13:14:05:ST3_smx:INFO:	# loops 2
13:14:07:ST3_smx:INFO:	# loops 3
13:14:09:ST3_smx:INFO:	# loops 4
13:14:10:ST3_smx:INFO:	Total # of broken channels: 2
13:14:10:ST3_smx:INFO:	List of broken channels: [0, 121]
13:14:10:ST3_smx:INFO:	Total # of broken channels: 4
13:14:10:ST3_smx:INFO:	List of broken channels: [0, 88, 106, 121]
13:14:12:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1165.571835 mV
13:14:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:14:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:14:12:ST3_smx:INFO:		Electrons
13:14:12:ST3_smx:INFO:	# loops 0
13:14:14:ST3_smx:INFO:	# loops 1
13:14:15:ST3_smx:INFO:	# loops 2
13:14:17:ST3_smx:INFO:	# loops 3
13:14:18:ST3_smx:INFO:	# loops 4
13:14:20:ST3_smx:INFO:	Total # of broken channels: 0
13:14:20:ST3_smx:INFO:	List of broken channels: []
13:14:20:ST3_smx:INFO:	Total # of broken channels: 0
13:14:20:ST3_smx:INFO:	List of broken channels: []
13:14:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:14:20:febtest:INFO:	01-00 | XA-000-09-004-006-013-023-06 |  40.9 | 1159.7
13:14:21:febtest:INFO:	08-01 | XA-000-09-004-007-003-016-07 |  34.6 | 1177.4
13:14:21:febtest:INFO:	03-02 | XA-000-09-004-006-015-023-05 |   6.1 | 1265.4
13:14:21:febtest:INFO:	10-03 | XA-000-09-004-007-002-015-13 |  28.2 | 1195.1
13:14:21:febtest:INFO:	05-04 | XA-000-09-004-007-002-014-13 |  37.7 | 1153.7
13:14:21:febtest:INFO:	12-05 | XA-000-09-004-007-003-015-00 |  28.2 | 1218.6
13:14:22:febtest:INFO:	07-06 | XA-000-09-004-006-014-023-08 |  18.7 | 1230.3
13:14:22:febtest:INFO:	14-07 | XA-000-09-004-002-016-013-01 |  31.4 | 1189.2
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_21-13_12_17
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1309| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 07343 | SIZE: 62x62 | GRADE: 
MODULE_NAME: M4UR1B3011313B2

LADDER_NAME: 
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5130', '1.849', '2.4050', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9570', '1.850', '2.4560', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9500', '1.850', '0.5189', '0.000', '0.0000', '0.000', '0.0000']
13:14:29:ST3_Shared:INFO:	Listo of operators:Oleksandr S.;