13:04:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:02:ST3_Shared:INFO:	                       FEB-Microcable                       
13:04:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:02:febtest:INFO:	Testing FEB with SN 1311
13:04:03:smx_tester:INFO:	Scanning setup
13:04:03:elinks:INFO:	Disabling clock on downlink 0
13:04:03:elinks:INFO:	Disabling clock on downlink 1
13:04:03:elinks:INFO:	Disabling clock on downlink 2
13:04:03:elinks:INFO:	Disabling clock on downlink 3
13:04:03:elinks:INFO:	Disabling clock on downlink 4
13:04:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:04:elinks:INFO:	Disabling clock on downlink 0
13:04:04:elinks:INFO:	Disabling clock on downlink 1
13:04:04:elinks:INFO:	Disabling clock on downlink 2
13:04:04:elinks:INFO:	Disabling clock on downlink 3
13:04:04:elinks:INFO:	Disabling clock on downlink 4
13:04:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:04:04:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:04:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:04:elinks:INFO:	Disabling clock on downlink 0
13:04:04:elinks:INFO:	Disabling clock on downlink 1
13:04:04:elinks:INFO:	Disabling clock on downlink 2
13:04:04:elinks:INFO:	Disabling clock on downlink 3
13:04:04:elinks:INFO:	Disabling clock on downlink 4
13:04:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:04:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:04:elinks:INFO:	Disabling clock on downlink 0
13:04:04:elinks:INFO:	Disabling clock on downlink 1
13:04:04:elinks:INFO:	Disabling clock on downlink 2
13:04:04:elinks:INFO:	Disabling clock on downlink 3
13:04:04:elinks:INFO:	Disabling clock on downlink 4
13:04:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:04:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:04:elinks:INFO:	Disabling clock on downlink 0
13:04:04:elinks:INFO:	Disabling clock on downlink 1
13:04:04:elinks:INFO:	Disabling clock on downlink 2
13:04:04:elinks:INFO:	Disabling clock on downlink 3
13:04:04:elinks:INFO:	Disabling clock on downlink 4
13:04:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:04:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:04:04:setup_element:INFO:	Scanning clock phase
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:04:04:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:04:04:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:04:04:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:04:04:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:04:04:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:04:04:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:04:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:04:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:04:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:04:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
13:04:04:setup_element:INFO:	Scanning data phases
13:04:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:04:10:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:04:10:setup_element:INFO:	Eye window for uplink 8 : ____________________________XXXXXX______
Data delay found: 10
13:04:10:setup_element:INFO:	Eye window for uplink 9 : ________________________________XXXXXXX_
Data delay found: 15
13:04:10:setup_element:INFO:	Eye window for uplink 10: ______________________________XXXXXXXX__
Data delay found: 13
13:04:10:setup_element:INFO:	Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
13:04:10:setup_element:INFO:	Eye window for uplink 12: _________XXXXXXXXXXXXXXXXXX___XXXXXXXX__
Data delay found: 3
13:04:10:setup_element:INFO:	Eye window for uplink 13: XXX______XXXXXXXXXXXXXXXXXX______XXXXXXX
Data delay found: 5
13:04:10:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXXXXXXX__
Data delay found: 13
13:04:10:setup_element:INFO:	Eye window for uplink 15: XX______________________________XXXXXXXX
Data delay found: 16
13:04:10:setup_element:INFO:	Setting the data phase to 10 for uplink 8
13:04:10:setup_element:INFO:	Setting the data phase to 15 for uplink 9
13:04:10:setup_element:INFO:	Setting the data phase to 13 for uplink 10
13:04:10:setup_element:INFO:	Setting the data phase to 18 for uplink 11
13:04:10:setup_element:INFO:	Setting the data phase to 3 for uplink 12
13:04:10:setup_element:INFO:	Setting the data phase to 5 for uplink 13
13:04:10:setup_element:INFO:	Setting the data phase to 13 for uplink 14
13:04:10:setup_element:INFO:	Setting the data phase to 16 for uplink 15
==============================================OOO==============================================
13:04:10:setup_element:INFO:	Beginning SMX ASICs map scan
13:04:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:04:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:04:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:04:10:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:04:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:04:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:04:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:04:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:04:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:04:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:04:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:04:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:04:12:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXXXX_
      Uplink 13: ______________________________________________________________________XXXXXXXXX_
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 9:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 10:
      Optimal Phase: 13
      Window Length: 32
      Eye Window: ______________________________XXXXXXXX__
    Uplink 11:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 12:
      Optimal Phase: 3
      Window Length: 11
      Eye Window: _________XXXXXXXXXXXXXXXXXX___XXXXXXXX__
    Uplink 13:
      Optimal Phase: 5
      Window Length: 6
      Eye Window: XXX______XXXXXXXXXXXXXXXXXX______XXXXXXX
    Uplink 14:
      Optimal Phase: 13
      Window Length: 31
      Eye Window: _____________________________XXXXXXXXX__
    Uplink 15:
      Optimal Phase: 16
      Window Length: 30
      Eye Window: XX______________________________XXXXXXXX

==============================================OOO==============================================
13:04:12:setup_element:INFO:	Performing Elink synchronization
13:04:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:04:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:04:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:04:12:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:04:12:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:04:13:febtest:INFO:	Init all SMX (CSA): 30
13:04:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:04:21:febtest:INFO:	08-01 | XA-000-09-004-007-014-013-07 |  34.6 | 1135.9
13:04:21:febtest:INFO:	10-03 | XA-000-09-004-007-015-010-10 |  31.4 | 1135.9
13:04:21:febtest:INFO:	12-05 | XA-000-09-004-007-014-011-07 |  28.2 | 1153.7
13:04:22:febtest:INFO:	14-07 | XA-000-09-004-007-013-013-09 |  21.9 | 1183.3
13:04:23:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:04:24:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1141.874115 mV
13:04:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:25:ST3_smx:INFO:		Electrons
13:04:25:ST3_smx:INFO:	# loops 0
13:04:26:ST3_smx:INFO:	# loops 1
13:04:28:ST3_smx:INFO:	# loops 2
13:04:30:ST3_smx:INFO:	Total # of broken channels: 0
13:04:30:ST3_smx:INFO:	List of broken channels: []
13:04:30:ST3_smx:INFO:	Total # of broken channels: 5
13:04:30:ST3_smx:INFO:	List of broken channels: [4, 6, 8, 14, 16]
13:04:31:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1147.806000 mV
13:04:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:31:ST3_smx:INFO:		Electrons
13:04:31:ST3_smx:INFO:	# loops 0
13:04:33:ST3_smx:INFO:	# loops 1
13:04:35:ST3_smx:INFO:	# loops 2
13:04:36:ST3_smx:INFO:	Total # of broken channels: 0
13:04:36:ST3_smx:INFO:	List of broken channels: []
13:04:36:ST3_smx:INFO:	Total # of broken channels: 40
13:04:36:ST3_smx:INFO:	List of broken channels: [18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 80, 84, 86, 88, 90, 92, 94, 96, 98, 110, 114, 116]
13:04:38:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1165.571835 mV
13:04:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:38:ST3_smx:INFO:		Electrons
13:04:38:ST3_smx:INFO:	# loops 0
13:04:40:ST3_smx:INFO:	# loops 1
13:04:42:ST3_smx:INFO:	# loops 2
13:04:43:ST3_smx:INFO:	Total # of broken channels: 0
13:04:43:ST3_smx:INFO:	List of broken channels: []
13:04:43:ST3_smx:INFO:	Total # of broken channels: 49
13:04:43:ST3_smx:INFO:	List of broken channels: [6, 8, 10, 12, 16, 18, 20, 24, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 72, 74, 76, 78, 80, 82, 84, 86, 90, 92, 96, 98, 102, 104, 106, 108, 114, 116, 118, 120]
13:04:45:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1195.082160 mV
13:04:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:04:45:ST3_smx:INFO:		Electrons
13:04:45:ST3_smx:INFO:	# loops 0
13:04:47:ST3_smx:INFO:	# loops 1
13:04:48:ST3_smx:INFO:	# loops 2
13:04:50:ST3_smx:INFO:	Total # of broken channels: 0
13:04:50:ST3_smx:INFO:	List of broken channels: []
13:04:50:ST3_smx:INFO:	Total # of broken channels: 43
13:04:50:ST3_smx:INFO:	List of broken channels: [4, 6, 8, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 54, 56, 58, 64, 66, 72, 74, 76, 78, 80, 82, 84, 90, 92, 96, 100, 102, 104, 106, 116]
13:04:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:04:51:febtest:INFO:	08-01 | XA-000-09-004-007-014-013-07 |  34.6 | 1165.6
13:04:51:febtest:INFO:	10-03 | XA-000-09-004-007-015-010-10 |  31.4 | 1171.5
13:04:51:febtest:INFO:	12-05 | XA-000-09-004-007-014-011-07 |  28.2 | 1189.2
13:04:51:febtest:INFO:	14-07 | XA-000-09-004-007-013-013-09 |  21.9 | 1212.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_28-13_04_02
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1311| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : MUCH
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.0070', '1.849', '1.2790', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9924', '1.850', '1.0290', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.0000', '1.850', '0.2717', '0.000', '0.0000', '0.000', '0.0000']
13:06:19:ST3_Shared:INFO:	STS mode selected