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FEB_1312 16.01.25 11:29:37
TextEdit.txt
11:29:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:29:37:ST3_Shared:INFO: FEB-Sensor
11:29:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:29:40:ST3_Shared:INFO: STS mode selected
11:29:45:ST3_ModuleSelector:DEBUG: M4UR1B1011311B2
11:29:45:ST3_ModuleSelector:DEBUG: L4UR101131
11:29:45:ST3_ModuleSelector:DEBUG: 07192
11:29:45:ST3_ModuleSelector:DEBUG: 62x42
11:29:45:ST3_ModuleSelector:DEBUG: A
11:29:45:ST3_ModuleSelector:DEBUG: M4UR1B1011311B2
11:29:45:ST3_ModuleSelector:DEBUG: L4UR101131
11:29:45:ST3_ModuleSelector:DEBUG: 07192
11:29:45:ST3_ModuleSelector:DEBUG: 62x42
11:29:45:ST3_ModuleSelector:DEBUG: A
11:29:57:ST3_ModuleSelector:INFO: M4UR1B1011311B2
11:29:57:ST3_ModuleSelector:INFO: 07192
11:29:57:febtest:INFO: Testing FEB with SN 1312
11:29:59:smx_tester:INFO: Scanning setup
11:29:59:elinks:INFO: Disabling clock on downlink 0
11:29:59:elinks:INFO: Disabling clock on downlink 1
11:29:59:elinks:INFO: Disabling clock on downlink 2
11:29:59:elinks:INFO: Disabling clock on downlink 3
11:29:59:elinks:INFO: Disabling clock on downlink 4
11:29:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:29:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:29:59:elinks:INFO: Disabling clock on downlink 0
11:29:59:elinks:INFO: Disabling clock on downlink 1
11:29:59:elinks:INFO: Disabling clock on downlink 2
11:29:59:elinks:INFO: Disabling clock on downlink 3
11:29:59:elinks:INFO: Disabling clock on downlink 4
11:29:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:29:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:29:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:29:59:elinks:INFO: Disabling clock on downlink 0
11:29:59:elinks:INFO: Disabling clock on downlink 1
11:29:59:elinks:INFO: Disabling clock on downlink 2
11:29:59:elinks:INFO: Disabling clock on downlink 3
11:29:59:elinks:INFO: Disabling clock on downlink 4
11:29:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:29:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:29:59:elinks:INFO: Disabling clock on downlink 0
11:29:59:elinks:INFO: Disabling clock on downlink 1
11:29:59:elinks:INFO: Disabling clock on downlink 2
11:29:59:elinks:INFO: Disabling clock on downlink 3
11:29:59:elinks:INFO: Disabling clock on downlink 4
11:29:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:29:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:29:59:elinks:INFO: Disabling clock on downlink 0
11:29:59:elinks:INFO: Disabling clock on downlink 1
11:29:59:elinks:INFO: Disabling clock on downlink 2
11:29:59:elinks:INFO: Disabling clock on downlink 3
11:29:59:elinks:INFO: Disabling clock on downlink 4
11:29:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:29:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:29:59:setup_element:INFO: Scanning clock phase
11:29:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:29:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:30:00:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXX_X________________________________________________XXXXXXX
Clock Delay: 48
11:30:00:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXX_X________________________________________________XXXXXXX
Clock Delay: 48
11:30:00:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Clock Delay: 50
11:30:00:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Clock Delay: 50
11:30:00:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXX________________________________________________________________
Clock Delay: 47
11:30:00:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXX________________________________________________________________
Clock Delay: 47
11:30:00:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXXXX_________________________________________________________XXXXXXX
Clock Delay: 44
11:30:00:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXXXX_________________________________________________________XXXXXXX
Clock Delay: 44
11:30:00:setup_element:INFO: Eye window for uplink 8 : XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:30:00:setup_element:INFO: Eye window for uplink 9 : XXXXXXX_________________________________________________________________________
Clock Delay: 43
11:30:00:setup_element:INFO: Eye window for uplink 10: XXXXXXXXXX_______________________________________________________________XXXXXXX
Clock Delay: 41
11:30:00:setup_element:INFO: Eye window for uplink 11: XXXXXXXXXX_______________________________________________________________XXXXXXX
Clock Delay: 41
11:30:00:setup_element:INFO: Eye window for uplink 12: XXXXXXXXXX____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:30:00:setup_element:INFO: Eye window for uplink 13: XXXXXXXXXX____________________________________________________________XXXXXXXXXX
Clock Delay: 39
11:30:00:setup_element:INFO: Eye window for uplink 14: XXXXXXXXXXX___________________________________________________________XXXXXXXXXX
Clock Delay: 40
11:30:00:setup_element:INFO: Eye window for uplink 15: XXXXXXXXXXX___________________________________________________________XXXXXXXXXX
Clock Delay: 40
11:30:00:setup_element:INFO: Setting the clock phase to 47 for group 0, downlink 1
==============================================OOO==============================================
11:30:00:setup_element:INFO: Scanning data phases
11:30:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:30:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:05:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:30:05:setup_element:INFO: Eye window for uplink 0 : XXXXXXXX______________________________XX
Data delay found: 22
11:30:05:setup_element:INFO: Eye window for uplink 1 : XXXX______________________________XXXXXX
Data delay found: 18
11:30:05:setup_element:INFO: Eye window for uplink 2 : XXX______________________XXXXXXXXXXXXXXX
Data delay found: 13
11:30:05:setup_element:INFO: Eye window for uplink 3 : _________________________XXXXXXXXXXXXXXX
Data delay found: 12
11:30:05:setup_element:INFO: Eye window for uplink 4 : ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:30:05:setup_element:INFO: Eye window for uplink 5 : ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:30:05:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXX__XXX
Data delay found: 13
11:30:05:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXX_____XXX
Data delay found: 11
11:30:05:setup_element:INFO: Eye window for uplink 8 : ___________XXXXXX_______________________
Data delay found: 33
11:30:05:setup_element:INFO: Eye window for uplink 9 : ________________XXXXXXX_________________
Data delay found: 39
11:30:05:setup_element:INFO: Eye window for uplink 10: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:30:05:setup_element:INFO: Eye window for uplink 11: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
11:30:05:setup_element:INFO: Eye window for uplink 12: __________XXXXXXXXXXX___________________
Data delay found: 35
11:30:05:setup_element:INFO: Eye window for uplink 13: _____________XXXXXXXXXX_________________
Data delay found: 37
11:30:05:setup_element:INFO: Eye window for uplink 14: ___________X_XXXXXXXXX__________________
Data delay found: 36
11:30:05:setup_element:INFO: Eye window for uplink 15: _____________XXXXXXXXXXX________________
Data delay found: 38
11:30:05:setup_element:INFO: Setting the data phase to 22 for uplink 0
11:30:05:setup_element:INFO: Setting the data phase to 18 for uplink 1
11:30:05:setup_element:INFO: Setting the data phase to 13 for uplink 2
11:30:05:setup_element:INFO: Setting the data phase to 12 for uplink 3
11:30:05:setup_element:INFO: Setting the data phase to 6 for uplink 4
11:30:05:setup_element:INFO: Setting the data phase to 6 for uplink 5
11:30:05:setup_element:INFO: Setting the data phase to 13 for uplink 6
11:30:05:setup_element:INFO: Setting the data phase to 11 for uplink 7
11:30:05:setup_element:INFO: Setting the data phase to 33 for uplink 8
11:30:05:setup_element:INFO: Setting the data phase to 39 for uplink 9
11:30:05:setup_element:INFO: Setting the data phase to 6 for uplink 10
11:30:05:setup_element:INFO: Setting the data phase to 7 for uplink 11
11:30:05:setup_element:INFO: Setting the data phase to 35 for uplink 12
11:30:05:setup_element:INFO: Setting the data phase to 37 for uplink 13
11:30:05:setup_element:INFO: Setting the data phase to 36 for uplink 14
11:30:05:setup_element:INFO: Setting the data phase to 38 for uplink 15
==============================================OOO==============================================
11:30:05:setup_element:INFO: Beginning SMX ASICs map scan
11:30:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:30:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:30:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:30:05:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:30:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:30:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:30:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:30:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:30:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:30:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:30:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:30:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:30:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:30:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:30:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:30:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:30:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:30:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:30:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:30:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:30:08:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 47
Window Length: 45
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXX_X________________________________________________XXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXX_X________________________________________________XXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Uplink 3: XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Uplink 4: XXXXXXXXXXXXXXXX________________________________________________________________
Uplink 5: XXXXXXXXXXXXXXXX________________________________________________________________
Uplink 6: XXXXXXXXXXXXXXXX_________________________________________________________XXXXXXX
Uplink 7: XXXXXXXXXXXXXXXX_________________________________________________________XXXXXXX
Uplink 8: XXXXXXX_________________________________________________________________________
Uplink 9: XXXXXXX_________________________________________________________________________
Uplink 10: XXXXXXXXXX_______________________________________________________________XXXXXXX
Uplink 11: XXXXXXXXXX_______________________________________________________________XXXXXXX
Uplink 12: XXXXXXXXXX____________________________________________________________XXXXXXXXXX
Uplink 13: XXXXXXXXXX____________________________________________________________XXXXXXXXXX
Uplink 14: XXXXXXXXXXX___________________________________________________________XXXXXXXXXX
Uplink 15: XXXXXXXXXXX___________________________________________________________XXXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 22
Window Length: 30
Eye Window: XXXXXXXX______________________________XX
Uplink 1:
Optimal Phase: 18
Window Length: 30
Eye Window: XXXX______________________________XXXXXX
Uplink 2:
Optimal Phase: 13
Window Length: 22
Eye Window: XXX______________________XXXXXXXXXXXXXXX
Uplink 3:
Optimal Phase: 12
Window Length: 25
Eye Window: _________________________XXXXXXXXXXXXXXX
Uplink 4:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 5:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 6:
Optimal Phase: 13
Window Length: 28
Eye Window: ____________________________XXXXXXX__XXX
Uplink 7:
Optimal Phase: 11
Window Length: 24
Eye Window: ________________________XXXXXXXX_____XXX
Uplink 8:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 9:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
Uplink 10:
Optimal Phase: 6
Window Length: 14
Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 11:
Optimal Phase: 7
Window Length: 16
Eye Window: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Uplink 12:
Optimal Phase: 35
Window Length: 29
Eye Window: __________XXXXXXXXXXX___________________
Uplink 13:
Optimal Phase: 37
Window Length: 30
Eye Window: _____________XXXXXXXXXX_________________
Uplink 14:
Optimal Phase: 36
Window Length: 29
Eye Window: ___________X_XXXXXXXXX__________________
Uplink 15:
Optimal Phase: 38
Window Length: 29
Eye Window: _____________XXXXXXXXXXX________________
==============================================OOO==============================================
11:30:08:setup_element:INFO: Performing Elink synchronization
11:30:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:30:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:30:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:30:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
11:30:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:30:08:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:30:08:febtest:INFO: Init all SMX (CSA): 30
11:30:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:30:22:febtest:INFO: 01-00 | XA-000-09-004-007-002-016-10 | 37.7 | 1135.9
11:30:22:febtest:INFO: 08-01 | XA-000-09-004-002-011-007-15 | 31.4 | 1153.7
11:30:22:febtest:INFO: 03-02 | XA-000-09-004-002-012-020-00 | 31.4 | 1171.5
11:30:23:febtest:INFO: 10-03 | XA-000-09-004-002-018-019-05 | 21.9 | 1183.3
11:30:23:febtest:INFO: 05-04 | XA-000-09-004-002-010-006-02 | 28.2 | 1189.2
11:30:23:febtest:INFO: 12-05 | XA-000-09-004-012-011-006-02 | 28.2 | 1171.5
11:30:23:febtest:INFO: 07-06 | XA-000-09-004-002-018-017-05 | 25.1 | 1195.1
11:30:24:febtest:INFO: 14-07 | XA-000-09-004-002-012-019-00 | 34.6 | 1165.6
11:30:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:30:27:ST3_smx:INFO: chip: 1-0 40.898880 C 1147.806000 mV
11:30:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:27:ST3_smx:INFO: Electrons
11:30:27:ST3_smx:INFO: # loops 0
11:30:29:ST3_smx:INFO: # loops 1
11:30:30:ST3_smx:INFO: # loops 2
11:30:31:ST3_smx:INFO: # loops 3
11:30:33:ST3_smx:INFO: # loops 4
11:30:34:ST3_smx:INFO: Total # of broken channels: 0
11:30:34:ST3_smx:INFO: List of broken channels: []
11:30:34:ST3_smx:INFO: Total # of broken channels: 0
11:30:34:ST3_smx:INFO: List of broken channels: []
11:30:36:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV
11:30:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:36:ST3_smx:INFO: Electrons
11:30:36:ST3_smx:INFO: # loops 0
11:30:38:ST3_smx:INFO: # loops 1
11:30:39:ST3_smx:INFO: # loops 2
11:30:41:ST3_smx:INFO: # loops 3
11:30:42:ST3_smx:INFO: # loops 4
11:30:44:ST3_smx:INFO: Total # of broken channels: 0
11:30:44:ST3_smx:INFO: List of broken channels: []
11:30:44:ST3_smx:INFO: Total # of broken channels: 0
11:30:44:ST3_smx:INFO: List of broken channels: []
11:30:45:ST3_smx:INFO: chip: 3-2 34.556970 C 1183.292940 mV
11:30:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:46:ST3_smx:INFO: Electrons
11:30:46:ST3_smx:INFO: # loops 0
11:30:47:ST3_smx:INFO: # loops 1
11:30:49:ST3_smx:INFO: # loops 2
11:30:50:ST3_smx:INFO: # loops 3
11:30:52:ST3_smx:INFO: # loops 4
11:30:53:ST3_smx:INFO: Total # of broken channels: 0
11:30:53:ST3_smx:INFO: List of broken channels: []
11:30:53:ST3_smx:INFO: Total # of broken channels: 0
11:30:53:ST3_smx:INFO: List of broken channels: []
11:30:55:ST3_smx:INFO: chip: 10-3 25.062742 C 1200.969315 mV
11:30:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:30:55:ST3_smx:INFO: Electrons
11:30:55:ST3_smx:INFO: # loops 0
11:30:56:ST3_smx:INFO: # loops 1
11:30:58:ST3_smx:INFO: # loops 2
11:30:59:ST3_smx:INFO: # loops 3
11:31:01:ST3_smx:INFO: # loops 4
11:31:03:ST3_smx:INFO: Total # of broken channels: 0
11:31:03:ST3_smx:INFO: List of broken channels: []
11:31:03:ST3_smx:INFO: Total # of broken channels: 0
11:31:03:ST3_smx:INFO: List of broken channels: []
11:31:04:ST3_smx:INFO: chip: 5-4 31.389742 C 1200.969315 mV
11:31:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:04:ST3_smx:INFO: Electrons
11:31:04:ST3_smx:INFO: # loops 0
11:31:06:ST3_smx:INFO: # loops 1
11:31:07:ST3_smx:INFO: # loops 2
11:31:09:ST3_smx:INFO: # loops 3
11:31:10:ST3_smx:INFO: # loops 4
11:31:12:ST3_smx:INFO: Total # of broken channels: 0
11:31:12:ST3_smx:INFO: List of broken channels: []
11:31:12:ST3_smx:INFO: Total # of broken channels: 1
11:31:12:ST3_smx:INFO: List of broken channels: [1]
11:31:14:ST3_smx:INFO: chip: 12-5 31.389742 C 1183.292940 mV
11:31:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:14:ST3_smx:INFO: Electrons
11:31:14:ST3_smx:INFO: # loops 0
11:31:15:ST3_smx:INFO: # loops 1
11:31:17:ST3_smx:INFO: # loops 2
11:31:18:ST3_smx:INFO: # loops 3
11:31:20:ST3_smx:INFO: # loops 4
11:31:21:ST3_smx:INFO: Total # of broken channels: 0
11:31:21:ST3_smx:INFO: List of broken channels: []
11:31:21:ST3_smx:INFO: Total # of broken channels: 0
11:31:21:ST3_smx:INFO: List of broken channels: []
11:31:23:ST3_smx:INFO: chip: 7-6 28.225000 C 1206.851500 mV
11:31:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:23:ST3_smx:INFO: Electrons
11:31:23:ST3_smx:INFO: # loops 0
11:31:25:ST3_smx:INFO: # loops 1
11:31:26:ST3_smx:INFO: # loops 2
11:31:28:ST3_smx:INFO: # loops 3
11:31:29:ST3_smx:INFO: # loops 4
11:31:30:ST3_smx:INFO: Total # of broken channels: 0
11:31:30:ST3_smx:INFO: List of broken channels: []
11:31:30:ST3_smx:INFO: Total # of broken channels: 0
11:31:30:ST3_smx:INFO: List of broken channels: []
11:31:32:ST3_smx:INFO: chip: 14-7 34.556970 C 1189.190035 mV
11:31:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:31:32:ST3_smx:INFO: Electrons
11:31:32:ST3_smx:INFO: # loops 0
11:31:34:ST3_smx:INFO: # loops 1
11:31:36:ST3_smx:INFO: # loops 2
11:31:37:ST3_smx:INFO: # loops 3
11:31:39:ST3_smx:INFO: # loops 4
11:31:40:ST3_smx:INFO: Total # of broken channels: 0
11:31:40:ST3_smx:INFO: List of broken channels: []
11:31:40:ST3_smx:INFO: Total # of broken channels: 0
11:31:40:ST3_smx:INFO: List of broken channels: []
11:31:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:31:41:febtest:INFO: 01-00 | XA-000-09-004-007-002-016-10 | 44.1 | 1171.5
11:31:41:febtest:INFO: 08-01 | XA-000-09-004-002-011-007-15 | 34.6 | 1189.2
11:31:41:febtest:INFO: 03-02 | XA-000-09-004-002-012-020-00 | 37.7 | 1201.0
11:31:42:febtest:INFO: 10-03 | XA-000-09-004-002-018-019-05 | 25.1 | 1218.6
11:31:42:febtest:INFO: 05-04 | XA-000-09-004-002-010-006-02 | 34.6 | 1218.6
11:31:42:febtest:INFO: 12-05 | XA-000-09-004-012-011-006-02 | 31.4 | 1201.0
11:31:42:febtest:INFO: 07-06 | XA-000-09-004-002-018-017-05 | 28.2 | 1230.3
11:31:42:febtest:INFO: 14-07 | XA-000-09-004-002-012-019-00 | 34.6 | 1253.7
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_16-11_29_37
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1312| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 07192 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4UR1B1011311B2
LADDER_NAME: L4UR101131
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5130', '1.848', '2.7580', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0170', '1.850', '2.4970', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9940', '1.850', '0.5255', '0.000', '0.0000', '0.000', '0.0000']