
FEB_1312 18.12.24 11:20:31
TextEdit.txt
11:20:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:20:31:ST3_Shared:INFO: FEB-Microcable 11:20:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:20:33:ST3_Shared:INFO: STS mode selected 11:20:34:febtest:INFO: Testing FEB with SN 1312 11:20:35:smx_tester:INFO: Scanning setup 11:20:35:elinks:INFO: Disabling clock on downlink 0 11:20:35:elinks:INFO: Disabling clock on downlink 1 11:20:35:elinks:INFO: Disabling clock on downlink 2 11:20:35:elinks:INFO: Disabling clock on downlink 3 11:20:35:elinks:INFO: Disabling clock on downlink 4 11:20:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:20:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:20:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:20:35:elinks:INFO: Disabling clock on downlink 0 11:20:35:elinks:INFO: Disabling clock on downlink 1 11:20:35:elinks:INFO: Disabling clock on downlink 2 11:20:35:elinks:INFO: Disabling clock on downlink 3 11:20:35:elinks:INFO: Disabling clock on downlink 4 11:20:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:20:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:20:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:20:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:20:35:elinks:INFO: Disabling clock on downlink 0 11:20:35:elinks:INFO: Disabling clock on downlink 1 11:20:35:elinks:INFO: Disabling clock on downlink 2 11:20:36:elinks:INFO: Disabling clock on downlink 3 11:20:36:elinks:INFO: Disabling clock on downlink 4 11:20:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:20:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:20:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:20:36:elinks:INFO: Disabling clock on downlink 0 11:20:36:elinks:INFO: Disabling clock on downlink 1 11:20:36:elinks:INFO: Disabling clock on downlink 2 11:20:36:elinks:INFO: Disabling clock on downlink 3 11:20:36:elinks:INFO: Disabling clock on downlink 4 11:20:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:20:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:20:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:20:36:elinks:INFO: Disabling clock on downlink 0 11:20:36:elinks:INFO: Disabling clock on downlink 1 11:20:36:elinks:INFO: Disabling clock on downlink 2 11:20:36:elinks:INFO: Disabling clock on downlink 3 11:20:36:elinks:INFO: Disabling clock on downlink 4 11:20:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:20:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:20:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 11:20:36:setup_element:INFO: Scanning clock phase 11:20:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:20:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:20:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:20:36:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX Clock Delay: 36 11:20:36:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX Clock Delay: 36 11:20:36:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXXX______________________________________________________________ Clock Delay: 48 11:20:36:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXXX______________________________________________________________ Clock Delay: 48 11:20:36:setup_element:INFO: Eye window for uplink 6 : ________XXXXXX__________________________________________________________XXXXXXXX Clock Delay: 42 11:20:36:setup_element:INFO: Eye window for uplink 7 : ________XXXXXX__________________________________________________________XXXXXXXX Clock Delay: 42 11:20:36:setup_element:INFO: Eye window for uplink 8 : X_______________________________________________________________________________ Clock Delay: 40 11:20:36:setup_element:INFO: Eye window for uplink 9 : X_______________________________________________________________________________ Clock Delay: 40 11:20:36:setup_element:INFO: Eye window for uplink 10: XXXXXXXX_X_______________________________________________________________XXXXXXX Clock Delay: 41 11:20:36:setup_element:INFO: Eye window for uplink 11: XXXXXXXX_X_______________________________________________________________XXXXXXX Clock Delay: 41 11:20:36:setup_element:INFO: Eye window for uplink 12: XXXXXXXX_X____________________________________________________________XXXXXXXXXX Clock Delay: 39 11:20:36:setup_element:INFO: Eye window for uplink 13: XXXXXXXX_X____________________________________________________________XXXXXXXXXX Clock Delay: 39 11:20:36:setup_element:INFO: Eye window for uplink 14: XXXXXXXX_XX___________________________________________________________XXXXXXXXXX Clock Delay: 40 11:20:36:setup_element:INFO: Eye window for uplink 15: XXXXXXXX_XX___________________________________________________________XXXXXXXXXX Clock Delay: 40 11:20:36:setup_element:INFO: Setting the clock phase to 43 for group 0, downlink 1 ==============================================OOO============================================== 11:20:36:setup_element:INFO: Scanning data phases 11:20:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:20:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:20:42:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:20:42:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXXX________XXX_____XXX Data delay found: 24 11:20:42:setup_element:INFO: Eye window for uplink 3 : XXX__XXXXXXXXXXXXXXXX________XXX__XXXXXX Data delay found: 24 11:20:42:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXX________XXXXXXXXXXXXXXXXXXXX Data delay found: 15 11:20:42:setup_element:INFO: Eye window for uplink 5 : _XXXXXXXXXXX________XXXXXXXXXXXXXXXXX___ Data delay found: 15 11:20:42:setup_element:INFO: Eye window for uplink 6 : _________________________________XXXXXXX Data delay found: 16 11:20:42:setup_element:INFO: Eye window for uplink 7 : ____________________________XXXXXXXXXXXX Data delay found: 13 11:20:42:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXXXXXXXX_______XXXXXX Data delay found: 7 11:20:42:setup_element:INFO: Eye window for uplink 9 : _________________XXXXXXXXXX_______XXXXXX Data delay found: 8 11:20:42:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXXXXX____________ Data delay found: 3 11:20:42:setup_element:INFO: Eye window for uplink 11: _____________________X__XXXXXXX_________ Data delay found: 5 11:20:42:setup_element:INFO: Eye window for uplink 12: ______________XXXXXXXXXX________________ Data delay found: 38 11:20:42:setup_element:INFO: Eye window for uplink 13: ________________XXXXXXXXXXX_____________ Data delay found: 1 11:20:42:setup_element:INFO: Eye window for uplink 14: ________________XXXXXXXXXX______________ Data delay found: 0 11:20:42:setup_element:INFO: Eye window for uplink 15: __________________XXXXXXXXXXX___________ Data delay found: 3 11:20:42:setup_element:INFO: Setting the data phase to 24 for uplink 2 11:20:42:setup_element:INFO: Setting the data phase to 24 for uplink 3 11:20:42:setup_element:INFO: Setting the data phase to 15 for uplink 4 11:20:42:setup_element:INFO: Setting the data phase to 15 for uplink 5 11:20:42:setup_element:INFO: Setting the data phase to 16 for uplink 6 11:20:42:setup_element:INFO: Setting the data phase to 13 for uplink 7 11:20:42:setup_element:INFO: Setting the data phase to 7 for uplink 8 11:20:42:setup_element:INFO: Setting the data phase to 8 for uplink 9 11:20:42:setup_element:INFO: Setting the data phase to 3 for uplink 10 11:20:42:setup_element:INFO: Setting the data phase to 5 for uplink 11 11:20:42:setup_element:INFO: Setting the data phase to 38 for uplink 12 11:20:42:setup_element:INFO: Setting the data phase to 1 for uplink 13 11:20:42:setup_element:INFO: Setting the data phase to 0 for uplink 14 11:20:42:setup_element:INFO: Setting the data phase to 3 for uplink 15 ==============================================OOO============================================== 11:20:42:setup_element:INFO: Beginning SMX ASICs map scan 11:20:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:20:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:20:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:20:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:20:42:uplink:INFO: Setting uplinks mask [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 11:20:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:20:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:20:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 11:20:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 11:20:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:20:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:20:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 11:20:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 11:20:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:20:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:20:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 11:20:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 11:20:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:20:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:20:45:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 1 Uplinks: [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 43 Window Length: 52 Eye Windows: Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: XXXXXXXXXXXXXXXXXX______________________________________________________________ Uplink 5: XXXXXXXXXXXXXXXXXX______________________________________________________________ Uplink 6: ________XXXXXX__________________________________________________________XXXXXXXX Uplink 7: ________XXXXXX__________________________________________________________XXXXXXXX Uplink 8: X_______________________________________________________________________________ Uplink 9: X_______________________________________________________________________________ Uplink 10: XXXXXXXX_X_______________________________________________________________XXXXXXX Uplink 11: XXXXXXXX_X_______________________________________________________________XXXXXXX Uplink 12: XXXXXXXX_X____________________________________________________________XXXXXXXXXX Uplink 13: XXXXXXXX_X____________________________________________________________XXXXXXXXXX Uplink 14: XXXXXXXX_XX___________________________________________________________XXXXXXXXXX Uplink 15: XXXXXXXX_XX___________________________________________________________XXXXXXXXXX Data phase characteristics: Uplink 2: Optimal Phase: 24 Window Length: 8 Eye Window: XXXXXXXXXXXXXXXXXXXXX________XXX_____XXX Uplink 3: Optimal Phase: 24 Window Length: 8 Eye Window: XXX__XXXXXXXXXXXXXXXX________XXX__XXXXXX Uplink 4: Optimal Phase: 15 Window Length: 8 Eye Window: XXXXXXXXXXXX________XXXXXXXXXXXXXXXXXXXX Uplink 5: Optimal Phase: 15 Window Length: 8 Eye Window: _XXXXXXXXXXX________XXXXXXXXXXXXXXXXX___ Uplink 6: Optimal Phase: 16 Window Length: 33 Eye Window: _________________________________XXXXXXX Uplink 7: Optimal Phase: 13 Window Length: 28 Eye Window: ____________________________XXXXXXXXXXXX Uplink 8: Optimal Phase: 7 Window Length: 15 Eye Window: _______________XXXXXXXXXXXX_______XXXXXX Uplink 9: Optimal Phase: 8 Window Length: 17 Eye Window: _________________XXXXXXXXXX_______XXXXXX Uplink 10: Optimal Phase: 3 Window Length: 31 Eye Window: ___________________XXXXXXXXX____________ Uplink 11: Optimal Phase: 5 Window Length: 30 Eye Window: _____________________X__XXXXXXX_________ Uplink 12: Optimal Phase: 38 Window Length: 30 Eye Window: ______________XXXXXXXXXX________________ Uplink 13: Optimal Phase: 1 Window Length: 29 Eye Window: ________________XXXXXXXXXXX_____________ Uplink 14: Optimal Phase: 0 Window Length: 30 Eye Window: ________________XXXXXXXXXX______________ Uplink 15: Optimal Phase: 3 Window Length: 29 Eye Window: __________________XXXXXXXXXXX___________ ==============================================OOO============================================== 11:20:45:setup_element:INFO: Performing Elink synchronization 11:20:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:20:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:20:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:20:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] ==============================================OOO============================================== 11:20:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:20:45:uplink:INFO: Enabling uplinks [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 11:20:45:febtest:INFO: Init all SMX (CSA): 30 11:20:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:20:58:febtest:INFO: 08-01 | XA-000-09-004-002-011-007-15 | 31.4 | 1153.7 11:20:58:febtest:INFO: 03-02 | XA-000-09-004-002-012-020-00 | 28.2 | 1171.5 11:20:59:febtest:INFO: 10-03 | XA-000-09-004-002-018-019-05 | 21.9 | 1183.3 11:20:59:febtest:INFO: 05-04 | XA-000-09-004-002-010-006-02 | 25.1 | 1183.3 11:20:59:febtest:INFO: 12-05 | XA-000-09-004-012-011-006-02 | 25.1 | 1171.5 11:20:59:febtest:INFO: 07-06 | XA-000-09-004-002-018-017-05 | 18.7 | 1201.0 11:21:00:febtest:INFO: 14-07 | XA-000-09-004-002-012-019-00 | 34.6 | 1159.7 11:21:01:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 11:21:01:febtest:ERROR: HW addres 1 != 0 11:21:12:ST3_smx:INFO: chip: 8-1 31.389742 C 1165.571835 mV 11:21:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:12:ST3_smx:INFO: Electrons 11:21:12:ST3_smx:INFO: # loops 0 11:21:14:ST3_smx:INFO: # loops 1 11:21:16:ST3_smx:INFO: # loops 2 11:21:17:ST3_smx:INFO: Total # of broken channels: 0 11:21:17:ST3_smx:INFO: List of broken channels: [] 11:21:17:ST3_smx:INFO: Total # of broken channels: 0 11:21:17:ST3_smx:INFO: List of broken channels: [] 11:21:19:ST3_smx:INFO: chip: 3-2 28.225000 C 1183.292940 mV 11:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:19:ST3_smx:INFO: Electrons 11:21:19:ST3_smx:INFO: # loops 0 11:21:21:ST3_smx:INFO: # loops 1 11:21:22:ST3_smx:INFO: # loops 2 11:21:24:ST3_smx:INFO: Total # of broken channels: 0 11:21:24:ST3_smx:INFO: List of broken channels: [] 11:21:24:ST3_smx:INFO: Total # of broken channels: 0 11:21:24:ST3_smx:INFO: List of broken channels: [] 11:21:26:ST3_smx:INFO: chip: 10-3 18.745682 C 1200.969315 mV 11:21:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:26:ST3_smx:INFO: Electrons 11:21:26:ST3_smx:INFO: # loops 0 11:21:27:ST3_smx:INFO: # loops 1 11:21:29:ST3_smx:INFO: # loops 2 11:21:30:ST3_smx:INFO: Total # of broken channels: 0 11:21:30:ST3_smx:INFO: List of broken channels: [] 11:21:30:ST3_smx:INFO: Total # of broken channels: 16 11:21:30:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35] 11:21:32:ST3_smx:INFO: chip: 5-4 25.062742 C 1195.082160 mV 11:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:32:ST3_smx:INFO: Electrons 11:21:32:ST3_smx:INFO: # loops 0 11:21:34:ST3_smx:INFO: # loops 1 11:21:35:ST3_smx:INFO: # loops 2 11:21:37:ST3_smx:INFO: Total # of broken channels: 1 11:21:37:ST3_smx:INFO: List of broken channels: [1] 11:21:37:ST3_smx:INFO: Total # of broken channels: 0 11:21:37:ST3_smx:INFO: List of broken channels: [] 11:21:39:ST3_smx:INFO: chip: 12-5 25.062742 C 1183.292940 mV 11:21:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:39:ST3_smx:INFO: Electrons 11:21:39:ST3_smx:INFO: # loops 0 11:21:40:ST3_smx:INFO: # loops 1 11:21:42:ST3_smx:INFO: # loops 2 11:21:43:ST3_smx:INFO: Total # of broken channels: 0 11:21:43:ST3_smx:INFO: List of broken channels: [] 11:21:43:ST3_smx:INFO: Total # of broken channels: 0 11:21:43:ST3_smx:INFO: List of broken channels: [] 11:21:45:ST3_smx:INFO: chip: 7-6 21.902970 C 1206.851500 mV 11:21:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:45:ST3_smx:INFO: Electrons 11:21:45:ST3_smx:INFO: # loops 0 11:21:47:ST3_smx:INFO: # loops 1 11:21:48:ST3_smx:INFO: # loops 2 11:21:50:ST3_smx:INFO: Total # of broken channels: 0 11:21:50:ST3_smx:INFO: List of broken channels: [] 11:21:50:ST3_smx:INFO: Total # of broken channels: 0 11:21:50:ST3_smx:INFO: List of broken channels: [] 11:21:52:ST3_smx:INFO: chip: 14-7 34.556970 C 1171.483840 mV 11:21:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:21:52:ST3_smx:INFO: Electrons 11:21:52:ST3_smx:INFO: # loops 0 11:21:53:ST3_smx:INFO: # loops 1 11:21:55:ST3_smx:INFO: # loops 2 11:21:56:ST3_smx:INFO: Total # of broken channels: 0 11:21:56:ST3_smx:INFO: List of broken channels: [] 11:21:56:ST3_smx:INFO: Total # of broken channels: 0 11:21:56:ST3_smx:INFO: List of broken channels: [] 11:21:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:21:57:febtest:INFO: 08-01 | XA-000-09-004-002-011-007-15 | 31.4 | 1189.2 11:21:57:febtest:INFO: 03-02 | XA-000-09-004-002-012-020-00 | 31.4 | 1201.0 11:21:57:febtest:INFO: 10-03 | XA-000-09-004-002-018-019-05 | 21.9 | 1218.6 11:21:58:febtest:INFO: 05-04 | XA-000-09-004-002-010-006-02 | 25.1 | 1212.7 11:21:58:febtest:INFO: 12-05 | XA-000-09-004-012-011-006-02 | 25.1 | 1201.0 11:21:58:febtest:INFO: 07-06 | XA-000-09-004-002-018-017-05 | 21.9 | 1230.3 11:21:58:febtest:INFO: 14-07 | XA-000-09-004-002-012-019-00 | 34.6 | 1212.7 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_12_18-11_20_31 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1312| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.8540', '1.850', '2.6890', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9620', '1.850', '2.4470', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9400', '1.850', '0.9377', '0.000', '0.0000', '0.000', '0.0000']