FEB_1312    19.12.24 08:54:26

TextEdit.txt
            08:54:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:26:ST3_Shared:INFO:	                       FEB-Microcable                       
08:54:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:28:ST3_Shared:INFO:	STS mode selected
08:54:28:febtest:INFO:	Testing FEB with SN 1312
08:54:30:smx_tester:INFO:	Scanning setup
08:54:30:elinks:INFO:	Disabling clock on downlink 0
08:54:30:elinks:INFO:	Disabling clock on downlink 1
08:54:30:elinks:INFO:	Disabling clock on downlink 2
08:54:30:elinks:INFO:	Disabling clock on downlink 3
08:54:30:elinks:INFO:	Disabling clock on downlink 4
08:54:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:54:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:54:30:elinks:INFO:	Disabling clock on downlink 0
08:54:30:elinks:INFO:	Disabling clock on downlink 1
08:54:30:elinks:INFO:	Disabling clock on downlink 2
08:54:30:elinks:INFO:	Disabling clock on downlink 3
08:54:30:elinks:INFO:	Disabling clock on downlink 4
08:54:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:54:30:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:54:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:54:30:elinks:INFO:	Disabling clock on downlink 0
08:54:30:elinks:INFO:	Disabling clock on downlink 1
08:54:30:elinks:INFO:	Disabling clock on downlink 2
08:54:30:elinks:INFO:	Disabling clock on downlink 3
08:54:30:elinks:INFO:	Disabling clock on downlink 4
08:54:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:54:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:54:30:elinks:INFO:	Disabling clock on downlink 0
08:54:30:elinks:INFO:	Disabling clock on downlink 1
08:54:30:elinks:INFO:	Disabling clock on downlink 2
08:54:30:elinks:INFO:	Disabling clock on downlink 3
08:54:30:elinks:INFO:	Disabling clock on downlink 4
08:54:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:54:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:54:30:elinks:INFO:	Disabling clock on downlink 0
08:54:30:elinks:INFO:	Disabling clock on downlink 1
08:54:30:elinks:INFO:	Disabling clock on downlink 2
08:54:30:elinks:INFO:	Disabling clock on downlink 3
08:54:30:elinks:INFO:	Disabling clock on downlink 4
08:54:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:54:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:54:30:setup_element:INFO:	Scanning clock phase
08:54:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:54:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:54:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:54:31:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Clock Delay: 47
08:54:31:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Clock Delay: 47
08:54:31:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Clock Delay: 50
08:54:31:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
Clock Delay: 50
08:54:31:setup_element:INFO:	Eye window for uplink 4 : XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
Clock Delay: 43
08:54:31:setup_element:INFO:	Eye window for uplink 5 : XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
Clock Delay: 43
08:54:31:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXXXXXXXX_X________________________________________________________XXXXXXXX
Clock Delay: 43
08:54:31:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXXXXX_X________________________________________________________XXXXXXXX
Clock Delay: 43
08:54:31:setup_element:INFO:	Eye window for uplink 8 : XXXXXX_______________________________________________________________X__________
Clock Delay: 37
08:54:31:setup_element:INFO:	Eye window for uplink 9 : XXXXXX_______________________________________________________________X__________
Clock Delay: 37
08:54:31:setup_element:INFO:	Eye window for uplink 10: XXXXXXXXXX______________________________________________________________XXXXXXXX
Clock Delay: 40
08:54:31:setup_element:INFO:	Eye window for uplink 11: XXXXXXXXXX______________________________________________________________XXXXXXXX
Clock Delay: 40
08:54:31:setup_element:INFO:	Eye window for uplink 12: XXXXXXXXX______________________________________________________________XXXXXXXXX
Clock Delay: 39
08:54:31:setup_element:INFO:	Eye window for uplink 13: XXXXXXXXX______________________________________________________________XXXXXXXXX
Clock Delay: 39
08:54:31:setup_element:INFO:	Eye window for uplink 14: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
08:54:31:setup_element:INFO:	Eye window for uplink 15: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
08:54:31:setup_element:INFO:	Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
08:54:31:setup_element:INFO:	Scanning data phases
08:54:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:54:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:54:36:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:54:36:setup_element:INFO:	Eye window for uplink 0 : _XXXXXXXXX______________________________
Data delay found: 25
08:54:36:setup_element:INFO:	Eye window for uplink 1 : XXXXX________________________________XXX
Data delay found: 20
08:54:36:setup_element:INFO:	Eye window for uplink 2 : XXXXX_____________________________XXXXXX
Data delay found: 19
08:54:36:setup_element:INFO:	Eye window for uplink 3 : XX_____________________________XXXXXXXXX
Data delay found: 16
08:54:36:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
08:54:36:setup_element:INFO:	Eye window for uplink 5 : ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
08:54:36:setup_element:INFO:	Eye window for uplink 6 : _XXXXXXXXXX______________XXXXXXXXXXXX___
Data delay found: 17
08:54:36:setup_element:INFO:	Eye window for uplink 7 : _XXXXXXXXXX______________XXXXXXXXXX_____
Data delay found: 17
08:54:36:setup_element:INFO:	Eye window for uplink 8 : __________XXXXXXXXXXXXXXXXXXXXXXXXXX____
Data delay found: 2
08:54:36:setup_element:INFO:	Eye window for uplink 9 : __________XXXXXXXXXXXXXXXXXXXXXXXXXX____
Data delay found: 2
08:54:36:setup_element:INFO:	Eye window for uplink 10: ________________XXXXXXXXX_______________
Data delay found: 0
08:54:36:setup_element:INFO:	Eye window for uplink 11: ____________________XXXXXXXXXX__________
Data delay found: 4
08:54:36:setup_element:INFO:	Eye window for uplink 12: __________X_XXXXXXXXXXX_________________
Data delay found: 36
08:54:36:setup_element:INFO:	Eye window for uplink 13: _____________XXXXXXXXXXXXX______________
Data delay found: 39
08:54:36:setup_element:INFO:	Eye window for uplink 14: ______________XXXXXXXXXX________________
Data delay found: 38
08:54:36:setup_element:INFO:	Eye window for uplink 15: _______________XXXXXXXXXXX______________
Data delay found: 0
08:54:36:setup_element:INFO:	Setting the data phase to 25 for uplink 0
08:54:36:setup_element:INFO:	Setting the data phase to 20 for uplink 1
08:54:36:setup_element:INFO:	Setting the data phase to 19 for uplink 2
08:54:36:setup_element:INFO:	Setting the data phase to 16 for uplink 3
08:54:36:setup_element:INFO:	Setting the data phase to 2 for uplink 4
08:54:36:setup_element:INFO:	Setting the data phase to 2 for uplink 5
08:54:36:setup_element:INFO:	Setting the data phase to 17 for uplink 6
08:54:36:setup_element:INFO:	Setting the data phase to 17 for uplink 7
08:54:36:setup_element:INFO:	Setting the data phase to 2 for uplink 8
08:54:36:setup_element:INFO:	Setting the data phase to 2 for uplink 9
08:54:36:setup_element:INFO:	Setting the data phase to 0 for uplink 10
08:54:36:setup_element:INFO:	Setting the data phase to 4 for uplink 11
08:54:37:setup_element:INFO:	Setting the data phase to 36 for uplink 12
08:54:37:setup_element:INFO:	Setting the data phase to 39 for uplink 13
08:54:37:setup_element:INFO:	Setting the data phase to 38 for uplink 14
08:54:37:setup_element:INFO:	Setting the data phase to 0 for uplink 15
==============================================OOO==============================================
08:54:37:setup_element:INFO:	Beginning SMX ASICs map scan
08:54:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:54:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:54:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:54:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:54:37:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:54:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:54:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:54:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:54:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:54:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:54:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:54:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:54:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:54:37:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:54:37:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:54:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:54:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:54:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:54:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:54:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:54:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:54:39:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 45
    Window Length: 46
    Eye Windows:
      Uplink  0: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
      Uplink  1: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
      Uplink  2: XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
      Uplink  3: XXXXXXXXXXXXXXXXXXXXX___________________________________________________________
      Uplink  4: XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
      Uplink  5: XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
      Uplink  6: XXXXXXXXXXXXXX_X________________________________________________________XXXXXXXX
      Uplink  7: XXXXXXXXXXXXXX_X________________________________________________________XXXXXXXX
      Uplink  8: XXXXXX_______________________________________________________________X__________
      Uplink  9: XXXXXX_______________________________________________________________X__________
      Uplink 10: XXXXXXXXXX______________________________________________________________XXXXXXXX
      Uplink 11: XXXXXXXXXX______________________________________________________________XXXXXXXX
      Uplink 12: XXXXXXXXX______________________________________________________________XXXXXXXXX
      Uplink 13: XXXXXXXXX______________________________________________________________XXXXXXXXX
      Uplink 14: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
      Uplink 15: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 31
      Eye Window: _XXXXXXXXX______________________________
    Uplink 1:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 2:
      Optimal Phase: 19
      Window Length: 29
      Eye Window: XXXXX_____________________________XXXXXX
    Uplink 3:
      Optimal Phase: 16
      Window Length: 29
      Eye Window: XX_____________________________XXXXXXXXX
    Uplink 4:
      Optimal Phase: 2
      Window Length: 6
      Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 5:
      Optimal Phase: 2
      Window Length: 6
      Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 6:
      Optimal Phase: 17
      Window Length: 14
      Eye Window: _XXXXXXXXXX______________XXXXXXXXXXXX___
    Uplink 7:
      Optimal Phase: 17
      Window Length: 14
      Eye Window: _XXXXXXXXXX______________XXXXXXXXXX_____
    Uplink 8:
      Optimal Phase: 2
      Window Length: 14
      Eye Window: __________XXXXXXXXXXXXXXXXXXXXXXXXXX____
    Uplink 9:
      Optimal Phase: 2
      Window Length: 14
      Eye Window: __________XXXXXXXXXXXXXXXXXXXXXXXXXX____
    Uplink 10:
      Optimal Phase: 0
      Window Length: 31
      Eye Window: ________________XXXXXXXXX_______________
    Uplink 11:
      Optimal Phase: 4
      Window Length: 30
      Eye Window: ____________________XXXXXXXXXX__________
    Uplink 12:
      Optimal Phase: 36
      Window Length: 27
      Eye Window: __________X_XXXXXXXXXXX_________________
    Uplink 13:
      Optimal Phase: 39
      Window Length: 27
      Eye Window: _____________XXXXXXXXXXXXX______________
    Uplink 14:
      Optimal Phase: 38
      Window Length: 30
      Eye Window: ______________XXXXXXXXXX________________
    Uplink 15:
      Optimal Phase: 0
      Window Length: 29
      Eye Window: _______________XXXXXXXXXXX______________

==============================================OOO==============================================
08:54:39:setup_element:INFO:	Performing Elink synchronization
08:54:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:54:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:54:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:54:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
08:54:39:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:54:39:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:54:40:febtest:INFO:	Init all SMX (CSA): 30
08:54:55:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:55:febtest:INFO:	01-00 | XA-000-09-004-007-002-016-10 |  40.9 | 1135.9
08:54:55:febtest:INFO:	08-01 | XA-000-09-004-002-011-007-15 |  34.6 | 1153.7
08:54:55:febtest:INFO:	03-02 | XA-000-09-004-002-012-020-00 |  31.4 | 1171.5
08:54:55:febtest:INFO:	10-03 | XA-000-09-004-002-018-019-05 |  21.9 | 1183.3
08:54:56:febtest:INFO:	05-04 | XA-000-09-004-002-010-006-02 |  28.2 | 1183.3
08:54:56:febtest:INFO:	12-05 | XA-000-09-004-012-011-006-02 |  28.2 | 1165.6
08:54:56:febtest:INFO:	07-06 | XA-000-09-004-002-018-017-05 |  21.9 | 1201.0
08:54:56:febtest:INFO:	14-07 | XA-000-09-004-002-012-019-00 |  34.6 | 1165.6
08:54:57:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:54:59:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1147.806000 mV
08:54:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:54:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:54:59:ST3_smx:INFO:		Electrons
08:54:59:ST3_smx:INFO:	# loops 0
08:55:01:ST3_smx:INFO:	# loops 1
08:55:03:ST3_smx:INFO:	# loops 2
08:55:04:ST3_smx:INFO:	Total # of broken channels: 0
08:55:04:ST3_smx:INFO:	List of broken channels: []
08:55:04:ST3_smx:INFO:	Total # of broken channels: 0
08:55:04:ST3_smx:INFO:	List of broken channels: []
08:55:06:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1165.571835 mV
08:55:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:06:ST3_smx:INFO:		Electrons
08:55:06:ST3_smx:INFO:	# loops 0
08:55:08:ST3_smx:INFO:	# loops 1
08:55:09:ST3_smx:INFO:	# loops 2
08:55:11:ST3_smx:INFO:	Total # of broken channels: 0
08:55:11:ST3_smx:INFO:	List of broken channels: []
08:55:11:ST3_smx:INFO:	Total # of broken channels: 0
08:55:11:ST3_smx:INFO:	List of broken channels: []
08:55:13:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1183.292940 mV
08:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:13:ST3_smx:INFO:		Electrons
08:55:13:ST3_smx:INFO:	# loops 0
08:55:14:ST3_smx:INFO:	# loops 1
08:55:16:ST3_smx:INFO:	# loops 2
08:55:18:ST3_smx:INFO:	Total # of broken channels: 0
08:55:18:ST3_smx:INFO:	List of broken channels: []
08:55:18:ST3_smx:INFO:	Total # of broken channels: 0
08:55:18:ST3_smx:INFO:	List of broken channels: []
08:55:19:ST3_smx:INFO:	chip: 10-3 	 21.902970 C 	 1200.969315 mV
08:55:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:19:ST3_smx:INFO:		Electrons
08:55:19:ST3_smx:INFO:	# loops 0
08:55:21:ST3_smx:INFO:	# loops 1
08:55:23:ST3_smx:INFO:	# loops 2
08:55:24:ST3_smx:INFO:	Total # of broken channels: 0
08:55:24:ST3_smx:INFO:	List of broken channels: []
08:55:24:ST3_smx:INFO:	Total # of broken channels: 0
08:55:24:ST3_smx:INFO:	List of broken channels: []
08:55:26:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1200.969315 mV
08:55:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:26:ST3_smx:INFO:		Electrons
08:55:26:ST3_smx:INFO:	# loops 0
08:55:28:ST3_smx:INFO:	# loops 1
08:55:29:ST3_smx:INFO:	# loops 2
08:55:31:ST3_smx:INFO:	Total # of broken channels: 0
08:55:31:ST3_smx:INFO:	List of broken channels: []
08:55:31:ST3_smx:INFO:	Total # of broken channels: 0
08:55:31:ST3_smx:INFO:	List of broken channels: []
08:55:33:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1177.390875 mV
08:55:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:33:ST3_smx:INFO:		Electrons
08:55:33:ST3_smx:INFO:	# loops 0
08:55:34:ST3_smx:INFO:	# loops 1
08:55:36:ST3_smx:INFO:	# loops 2
08:55:38:ST3_smx:INFO:	Total # of broken channels: 0
08:55:38:ST3_smx:INFO:	List of broken channels: []
08:55:38:ST3_smx:INFO:	Total # of broken channels: 5
08:55:38:ST3_smx:INFO:	List of broken channels: [39, 41, 43, 45, 47]
08:55:39:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1218.600960 mV
08:55:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:39:ST3_smx:INFO:		Electrons
08:55:39:ST3_smx:INFO:	# loops 0
08:55:41:ST3_smx:INFO:	# loops 1
08:55:43:ST3_smx:INFO:	# loops 2
08:55:44:ST3_smx:INFO:	Total # of broken channels: 0
08:55:44:ST3_smx:INFO:	List of broken channels: []
08:55:44:ST3_smx:INFO:	Total # of broken channels: 15
08:55:44:ST3_smx:INFO:	List of broken channels: [50, 52, 56, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86]
08:55:46:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1183.292940 mV
08:55:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:55:46:ST3_smx:INFO:		Electrons
08:55:46:ST3_smx:INFO:	# loops 0
08:55:48:ST3_smx:INFO:	# loops 1
08:55:49:ST3_smx:INFO:	# loops 2
08:55:51:ST3_smx:INFO:	Total # of broken channels: 0
08:55:51:ST3_smx:INFO:	List of broken channels: []
08:55:51:ST3_smx:INFO:	Total # of broken channels: 0
08:55:51:ST3_smx:INFO:	List of broken channels: []
08:55:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:55:51:febtest:INFO:	01-00 | XA-000-09-004-007-002-016-10 |  40.9 | 1171.5
08:55:52:febtest:INFO:	08-01 | XA-000-09-004-002-011-007-15 |  34.6 | 1189.2
08:55:52:febtest:INFO:	03-02 | XA-000-09-004-002-012-020-00 |  31.4 | 1201.0
08:55:52:febtest:INFO:	10-03 | XA-000-09-004-002-018-019-05 |  25.1 | 1218.6
08:55:52:febtest:INFO:	05-04 | XA-000-09-004-002-010-006-02 |  28.2 | 1218.6
08:55:52:febtest:INFO:	12-05 | XA-000-09-004-012-011-006-02 |  31.4 | 1201.0
08:55:53:febtest:INFO:	07-06 | XA-000-09-004-002-018-017-05 |  21.9 | 1242.0
08:55:53:febtest:INFO:	14-07 | XA-000-09-004-002-012-019-00 |  34.6 | 1230.3
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_12_19-08_54_26
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1312| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9470', '1.849', '2.7510', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0200', '1.850', '2.3240', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9910', '1.850', '0.5251', '0.000', '0.0000', '0.000', '0.0000']