FEB_1313    22.01.25 13:41:12

TextEdit.txt
            13:41:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:12:ST3_Shared:INFO:	                         FEB-Sensor                         
13:41:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:18:ST3_Shared:INFO:	STS mode selected
13:41:26:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:41:26:ST3_ModuleSelector:DEBUG:	
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13:41:26:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

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13:41:33:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:41:33:ST3_ModuleSelector:DEBUG:	
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13:41:33:ST3_ModuleSelector:DEBUG:	
13:41:33:ST3_ModuleSelector:DEBUG:	
13:41:33:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:41:33:ST3_ModuleSelector:DEBUG:	
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13:41:55:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:41:55:ST3_ModuleSelector:DEBUG:	
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13:41:55:ST3_ModuleSelector:DEBUG:	
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13:41:55:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:41:55:ST3_ModuleSelector:DEBUG:	
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13:42:22:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:42:22:ST3_ModuleSelector:DEBUG:	
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13:42:22:ST3_ModuleSelector:DEBUG:	
13:42:22:ST3_ModuleSelector:DEBUG:	
13:42:37:ST3_ModuleSelector:INFO:	New Sensor ID: 
1714
13:42:37:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:42:37:ST3_ModuleSelector:DEBUG:	
13:42:37:ST3_ModuleSelector:DEBUG:	
1714
13:42:37:ST3_ModuleSelector:DEBUG:	62x124
13:42:37:ST3_ModuleSelector:DEBUG:	
13:42:46:ST3_ModuleSelector:INFO:	New Sensor ID: 17143
13:42:46:ST3_ModuleSelector:DEBUG:	M4UR5B1011331B2

13:42:46:ST3_ModuleSelector:DEBUG:	
13:42:46:ST3_ModuleSelector:DEBUG:	17143
13:42:46:ST3_ModuleSelector:DEBUG:	62x62
13:42:46:ST3_ModuleSelector:DEBUG:	
13:43:00:ST3_ModuleSelector:INFO:	M4UR5B1011331B2

13:43:00:ST3_ModuleSelector:INFO:	17143
13:43:00:febtest:INFO:	Testing FEB with SN 1313
13:43:02:smx_tester:INFO:	Scanning setup
13:43:02:elinks:INFO:	Disabling clock on downlink 0
13:43:02:elinks:INFO:	Disabling clock on downlink 1
13:43:02:elinks:INFO:	Disabling clock on downlink 2
13:43:02:elinks:INFO:	Disabling clock on downlink 3
13:43:02:elinks:INFO:	Disabling clock on downlink 4
13:43:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:43:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:02:elinks:INFO:	Disabling clock on downlink 0
13:43:02:elinks:INFO:	Disabling clock on downlink 1
13:43:02:elinks:INFO:	Disabling clock on downlink 2
13:43:02:elinks:INFO:	Disabling clock on downlink 3
13:43:02:elinks:INFO:	Disabling clock on downlink 4
13:43:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:43:02:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:43:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:02:elinks:INFO:	Disabling clock on downlink 0
13:43:02:elinks:INFO:	Disabling clock on downlink 1
13:43:02:elinks:INFO:	Disabling clock on downlink 2
13:43:02:elinks:INFO:	Disabling clock on downlink 3
13:43:02:elinks:INFO:	Disabling clock on downlink 4
13:43:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:43:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:03:elinks:INFO:	Disabling clock on downlink 0
13:43:03:elinks:INFO:	Disabling clock on downlink 1
13:43:03:elinks:INFO:	Disabling clock on downlink 2
13:43:03:elinks:INFO:	Disabling clock on downlink 3
13:43:03:elinks:INFO:	Disabling clock on downlink 4
13:43:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:43:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:43:03:elinks:INFO:	Disabling clock on downlink 0
13:43:03:elinks:INFO:	Disabling clock on downlink 1
13:43:03:elinks:INFO:	Disabling clock on downlink 2
13:43:03:elinks:INFO:	Disabling clock on downlink 3
13:43:03:elinks:INFO:	Disabling clock on downlink 4
13:43:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:43:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:43:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:43:03:setup_element:INFO:	Scanning clock phase
13:43:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:43:03:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:43:03:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXX
Clock Delay: 48
13:43:03:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXX
Clock Delay: 48
13:43:03:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
13:43:03:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
Clock Delay: 45
13:43:03:setup_element:INFO:	Eye window for uplink 4 : XXXXXXXXXXXXXXXXXX_____________________________________________________________X
Clock Delay: 48
13:43:03:setup_element:INFO:	Eye window for uplink 5 : XXXXXXXXXXXXXXXXXX_____________________________________________________________X
Clock Delay: 48
13:43:03:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Clock Delay: 43
13:43:03:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
Clock Delay: 43
13:43:03:setup_element:INFO:	Eye window for uplink 8 : XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:43:03:setup_element:INFO:	Eye window for uplink 9 : XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:43:03:setup_element:INFO:	Eye window for uplink 10: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:43:03:setup_element:INFO:	Eye window for uplink 11: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:43:03:setup_element:INFO:	Eye window for uplink 12: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:43:03:setup_element:INFO:	Eye window for uplink 13: XXXX_________________________________________________________________XXXXXXXXXXX
Clock Delay: 36
13:43:03:setup_element:INFO:	Eye window for uplink 14: XXXXXXXXX_X___________________________________________________________XXXXXXXXXX
Clock Delay: 40
13:43:03:setup_element:INFO:	Eye window for uplink 15: XXXXXXXXX_X___________________________________________________________XXXXXXXXXX
Clock Delay: 40
13:43:03:setup_element:INFO:	Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
13:43:03:setup_element:INFO:	Scanning data phases
13:43:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:43:09:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:43:09:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXX___________________________XX
Data delay found: 24
13:43:09:setup_element:INFO:	Eye window for uplink 1 : XXXXXX____________________________XXXXXX
Data delay found: 19
13:43:09:setup_element:INFO:	Eye window for uplink 2 : XXXX_____________________________XXXXXXX
Data delay found: 18
13:43:09:setup_element:INFO:	Eye window for uplink 3 : X_____________________________XXXXXXXXXX
Data delay found: 15
13:43:09:setup_element:WARNING:	Group 0, downlink 1, uplink 4: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

13:43:09:setup_element:WARNING:	Group 0, downlink 1, uplink 5: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

13:43:09:setup_element:INFO:	Eye window for uplink 6 : ___________________X_XXXXXXXXXXXXX______
Data delay found: 6
13:43:09:setup_element:INFO:	Eye window for uplink 7 : ________________X_XXXXXXXXXXXXX__X______
Data delay found: 4
13:43:09:setup_element:INFO:	Eye window for uplink 8 : ____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_
Data delay found: 1
13:43:09:setup_element:INFO:	Eye window for uplink 9 : ____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_
Data delay found: 1
13:43:09:setup_element:INFO:	Eye window for uplink 10: ___________XXXXXXXX____XXXXXXXX_________
Data delay found: 0
13:43:09:setup_element:INFO:	Eye window for uplink 11: _______________XXXXXXX_XXXXXXXX_________
Data delay found: 2
13:43:09:setup_element:INFO:	Eye window for uplink 12: ______________XXXXXXXX_XXXX____________X
Data delay found: 6
13:43:09:setup_element:INFO:	Eye window for uplink 13: ________________XXXXXXXXXXX____________X
Data delay found: 7
13:43:09:setup_element:INFO:	Eye window for uplink 14: ____________XXXXXXXXXXXX_______________X
Data delay found: 31
13:43:09:setup_element:INFO:	Eye window for uplink 15: ______________X_XXXXXXXXXX_____________X
Data delay found: 6
13:43:09:setup_element:INFO:	Setting the data phase to 24 for uplink 0
13:43:09:setup_element:INFO:	Setting the data phase to 19 for uplink 1
13:43:09:setup_element:INFO:	Setting the data phase to 18 for uplink 2
13:43:09:setup_element:INFO:	Setting the data phase to 15 for uplink 3
13:43:09:setup_element:INFO:	Setting the data phase to 6 for uplink 6
13:43:09:setup_element:INFO:	Setting the data phase to 4 for uplink 7
13:43:09:setup_element:INFO:	Setting the data phase to 1 for uplink 8
13:43:09:setup_element:INFO:	Setting the data phase to 1 for uplink 9
13:43:09:setup_element:INFO:	Setting the data phase to 0 for uplink 10
13:43:09:setup_element:INFO:	Setting the data phase to 2 for uplink 11
13:43:09:setup_element:INFO:	Setting the data phase to 6 for uplink 12
13:43:09:setup_element:INFO:	Setting the data phase to 7 for uplink 13
13:43:09:setup_element:INFO:	Setting the data phase to 31 for uplink 14
13:43:09:setup_element:INFO:	Setting the data phase to 6 for uplink 15
==============================================OOO==============================================
13:43:09:setup_element:INFO:	Beginning SMX ASICs map scan
13:43:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:43:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:43:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:43:09:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:43:09:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:43:09:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:43:09:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:43:09:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:43:09:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:43:09:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:43:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:43:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:43:10:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:43:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:43:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:43:10:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:43:10:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:43:10:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:43:10:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:43:12:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 45
    Window Length: 44
    Eye Windows:
      Uplink  0: XXXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXX
      Uplink  1: XXXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXX
      Uplink  2: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
      Uplink  3: XXXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXX
      Uplink  4: XXXXXXXXXXXXXXXXXX_____________________________________________________________X
      Uplink  5: XXXXXXXXXXXXXXXXXX_____________________________________________________________X
      Uplink  6: XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
      Uplink  7: XXXXXXXXXXXXXXXX________________________________________________________XXXXXXXX
      Uplink  8: XXXX________________________________________________________________XXXXXXXXXXXX
      Uplink  9: XXXX________________________________________________________________XXXXXXXXXXXX
      Uplink 10: XXXX________________________________________________________________XXXXXXXXXXXX
      Uplink 11: XXXX________________________________________________________________XXXXXXXXXXXX
      Uplink 12: XXXX_________________________________________________________________XXXXXXXXXXX
      Uplink 13: XXXX_________________________________________________________________XXXXXXXXXXX
      Uplink 14: XXXXXXXXX_X___________________________________________________________XXXXXXXXXX
      Uplink 15: XXXXXXXXX_X___________________________________________________________XXXXXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 27
      Eye Window: XXXXXXXXXXX___________________________XX
    Uplink 1:
      Optimal Phase: 19
      Window Length: 28
      Eye Window: XXXXXX____________________________XXXXXX
    Uplink 2:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________XXXXXXX
    Uplink 3:
      Optimal Phase: 15
      Window Length: 29
      Eye Window: X_____________________________XXXXXXXXXX
    Uplink 6:
      Optimal Phase: 6
      Window Length: 25
      Eye Window: ___________________X_XXXXXXXXXXXXX______
    Uplink 7:
      Optimal Phase: 4
      Window Length: 22
      Eye Window: ________________X_XXXXXXXXXXXXX__X______
    Uplink 8:
      Optimal Phase: 1
      Window Length: 5
      Eye Window: ____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_
    Uplink 9:
      Optimal Phase: 1
      Window Length: 5
      Eye Window: ____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_
    Uplink 10:
      Optimal Phase: 0
      Window Length: 20
      Eye Window: ___________XXXXXXXX____XXXXXXXX_________
    Uplink 11:
      Optimal Phase: 2
      Window Length: 24
      Eye Window: _______________XXXXXXX_XXXXXXXX_________
    Uplink 12:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXX_XXXX____________X
    Uplink 13:
      Optimal Phase: 7
      Window Length: 16
      Eye Window: ________________XXXXXXXXXXX____________X
    Uplink 14:
      Optimal Phase: 31
      Window Length: 15
      Eye Window: ____________XXXXXXXXXXXX_______________X
    Uplink 15:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________X_XXXXXXXXXX_____________X

==============================================OOO==============================================
13:43:12:setup_element:INFO:	Performing Elink synchronization
13:43:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:43:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:43:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:43:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:43:12:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:43:12:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    1    | [(0, 5)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:43:12:febtest:INFO:	Init all SMX (CSA): 30
13:43:27:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:43:27:febtest:INFO:	01-00 | XA-000-09-004-006-017-007-07 |  44.1 | 1130.0
13:43:27:febtest:INFO:	08-01 | XA-000-09-004-006-013-006-01 |  40.9 | 1141.9
13:43:27:febtest:INFO:	03-02 | XA-000-09-004-006-018-009-09 |  37.7 | 1147.8
13:43:27:febtest:INFO:	10-03 | XA-000-09-004-006-012-021-11 |  40.9 | 1141.9
13:43:28:febtest:INFO:	05-04 | XA-000-09-004-006-015-007-02 |  34.6 | 1165.6
13:43:28:febtest:INFO:	12-05 | XA-000-09-004-006-010-020-14 |  31.4 | 1171.5
13:43:28:febtest:INFO:	07-06 | XA-000-09-004-006-013-007-01 |  28.2 | 1189.2
13:43:28:febtest:INFO:	14-07 | XA-000-09-004-006-011-020-03 |  31.4 | 1177.4
13:43:29:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:43:31:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1141.874115 mV
13:43:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:31:ST3_smx:INFO:		Electrons
13:43:31:ST3_smx:INFO:	# loops 0
13:43:33:ST3_smx:INFO:	# loops 1
13:43:35:ST3_smx:INFO:	# loops 2
13:43:36:ST3_smx:INFO:	# loops 3
13:43:38:ST3_smx:INFO:	# loops 4
13:43:39:ST3_smx:INFO:	Total # of broken channels: 0
13:43:39:ST3_smx:INFO:	List of broken channels: []
13:43:39:ST3_smx:INFO:	Total # of broken channels: 0
13:43:39:ST3_smx:INFO:	List of broken channels: []
13:43:41:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1159.654860 mV
13:43:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:41:ST3_smx:INFO:		Electrons
13:43:41:ST3_smx:INFO:	# loops 0
13:43:43:ST3_smx:INFO:	# loops 1
13:43:44:ST3_smx:INFO:	# loops 2
13:43:46:ST3_smx:INFO:	# loops 3
13:43:48:ST3_smx:INFO:	# loops 4
13:43:49:ST3_smx:INFO:	Total # of broken channels: 0
13:43:49:ST3_smx:INFO:	List of broken channels: []
13:43:49:ST3_smx:INFO:	Total # of broken channels: 0
13:43:49:ST3_smx:INFO:	List of broken channels: []
13:43:51:ST3_smx:INFO:	chip: 3-2 	 37.726682 C 	 1153.732915 mV
13:43:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:43:51:ST3_smx:INFO:		Electrons
13:43:51:ST3_smx:INFO:	# loops 0
13:43:53:ST3_smx:INFO:	# loops 1
13:43:54:ST3_smx:INFO:	# loops 2
13:43:56:ST3_smx:INFO:	# loops 3
13:43:58:ST3_smx:INFO:	# loops 4
13:43:59:ST3_smx:INFO:	Total # of broken channels: 0
13:43:59:ST3_smx:INFO:	List of broken channels: []
13:43:59:ST3_smx:INFO:	Total # of broken channels: 0
13:43:59:ST3_smx:INFO:	List of broken channels: []
13:44:01:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1153.732915 mV
13:44:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:01:ST3_smx:INFO:		Electrons
13:44:01:ST3_smx:INFO:	# loops 0
13:44:03:ST3_smx:INFO:	# loops 1
13:44:04:ST3_smx:INFO:	# loops 2
13:44:06:ST3_smx:INFO:	# loops 3
13:44:08:ST3_smx:INFO:	# loops 4
13:44:09:ST3_smx:INFO:	Total # of broken channels: 0
13:44:09:ST3_smx:INFO:	List of broken channels: []
13:44:09:ST3_smx:INFO:	Total # of broken channels: 0
13:44:09:ST3_smx:INFO:	List of broken channels: []
13:44:11:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1171.483840 mV
13:44:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:11:ST3_smx:INFO:		Electrons
13:44:11:ST3_smx:INFO:	# loops 0
13:44:13:ST3_smx:INFO:	# loops 1
13:44:14:ST3_smx:INFO:	# loops 2
13:44:16:ST3_smx:INFO:	# loops 3
13:44:17:ST3_smx:INFO:	# loops 4
13:44:19:ST3_smx:INFO:	Total # of broken channels: 0
13:44:19:ST3_smx:INFO:	List of broken channels: []
13:44:19:ST3_smx:INFO:	Total # of broken channels: 0
13:44:19:ST3_smx:INFO:	List of broken channels: []
13:44:21:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1183.292940 mV
13:44:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:21:ST3_smx:INFO:		Electrons
13:44:21:ST3_smx:INFO:	# loops 0
13:44:22:ST3_smx:INFO:	# loops 1
13:44:24:ST3_smx:INFO:	# loops 2
13:44:26:ST3_smx:INFO:	# loops 3
13:44:27:ST3_smx:INFO:	# loops 4
13:44:29:ST3_smx:INFO:	Total # of broken channels: 0
13:44:29:ST3_smx:INFO:	List of broken channels: []
13:44:29:ST3_smx:INFO:	Total # of broken channels: 0
13:44:29:ST3_smx:INFO:	List of broken channels: []
13:44:31:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1200.969315 mV
13:44:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:31:ST3_smx:INFO:		Electrons
13:44:31:ST3_smx:INFO:	# loops 0
13:44:32:ST3_smx:INFO:	# loops 1
13:44:34:ST3_smx:INFO:	# loops 2
13:44:36:ST3_smx:INFO:	# loops 3
13:44:38:ST3_smx:INFO:	# loops 4
13:44:39:ST3_smx:INFO:	Total # of broken channels: 0
13:44:39:ST3_smx:INFO:	List of broken channels: []
13:44:39:ST3_smx:INFO:	Total # of broken channels: 1
13:44:39:ST3_smx:INFO:	List of broken channels: [1]
13:44:41:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1183.292940 mV
13:44:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:44:41:ST3_smx:INFO:		Electrons
13:44:41:ST3_smx:INFO:	# loops 0
13:44:42:ST3_smx:INFO:	# loops 1
13:44:44:ST3_smx:INFO:	# loops 2
13:44:46:ST3_smx:INFO:	# loops 3
13:44:48:ST3_smx:INFO:	# loops 4
13:44:49:ST3_smx:INFO:	Total # of broken channels: 0
13:44:49:ST3_smx:INFO:	List of broken channels: []
13:44:49:ST3_smx:INFO:	Total # of broken channels: 0
13:44:49:ST3_smx:INFO:	List of broken channels: []
13:44:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:44:50:febtest:INFO:	01-00 | XA-000-09-004-006-017-007-07 |  44.1 | 1159.7
13:44:50:febtest:INFO:	08-01 | XA-000-09-004-006-013-006-01 |  40.9 | 1177.4
13:44:50:febtest:INFO:	03-02 | XA-000-09-004-006-018-009-09 |  40.9 | 1177.4
13:44:50:febtest:INFO:	10-03 | XA-000-09-004-006-012-021-11 |  44.1 | 1171.5
13:44:51:febtest:INFO:	05-04 | XA-000-09-004-006-015-007-02 |  34.6 | 1189.2
13:44:51:febtest:INFO:	12-05 | XA-000-09-004-006-010-020-14 |  34.6 | 1201.0
13:44:51:febtest:INFO:	07-06 | XA-000-09-004-006-013-007-01 |  31.4 | 1218.6
13:44:51:febtest:INFO:	14-07 | XA-000-09-004-006-011-020-03 |  34.6 | 1206.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_22-13_41_12
OPERATOR  : Kerstin S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1313| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 17143 | SIZE: 62x62 | GRADE: 
MODULE_NAME: M4UR5B1011331B2

LADDER_NAME: 
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4990', '1.849', '2.7930', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0130', '1.850', '2.4250', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9750', '1.850', '0.5208', '0.000', '0.0000', '0.000', '0.0000']