14:30:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:50:ST3_Shared:INFO:	                         FEB-Sensor                         
14:30:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:53:ST3_Shared:INFO:	STS mode selected
14:30:55:ST3_ModuleSelector:DEBUG:	
14:30:55:ST3_ModuleSelector:DEBUG:	
14:30:55:ST3_ModuleSelector:DEBUG:	
14:30:55:ST3_ModuleSelector:DEBUG:	None
14:30:55:ST3_ModuleSelector:DEBUG:	
14:30:59:ST3_ModuleSelector:DEBUG:	M3DR4B3000133A2
14:30:59:ST3_ModuleSelector:DEBUG:	L3DR400013
14:30:59:ST3_ModuleSelector:DEBUG:	02294
14:30:59:ST3_ModuleSelector:DEBUG:	62x124
14:30:59:ST3_ModuleSelector:DEBUG:	B
14:30:59:ST3_ModuleSelector:DEBUG:	M3DR4B3000133A2
14:30:59:ST3_ModuleSelector:DEBUG:	L3DR400013
14:30:59:ST3_ModuleSelector:DEBUG:	02294
14:30:59:ST3_ModuleSelector:DEBUG:	62x124
14:30:59:ST3_ModuleSelector:DEBUG:	B
14:31:12:ST3_ModuleSelector:INFO:	M3DR4B3000133A2
14:31:12:ST3_ModuleSelector:INFO:	02294
14:31:12:febtest:INFO:	Testing FEB with SN 1314
14:31:14:smx_tester:INFO:	Scanning setup
14:31:14:elinks:INFO:	Disabling clock on downlink 0
14:31:14:elinks:INFO:	Disabling clock on downlink 1
14:31:14:elinks:INFO:	Disabling clock on downlink 2
14:31:14:elinks:INFO:	Disabling clock on downlink 3
14:31:14:elinks:INFO:	Disabling clock on downlink 4
14:31:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:31:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:31:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:31:14:elinks:INFO:	Disabling clock on downlink 0
14:31:14:elinks:INFO:	Disabling clock on downlink 1
14:31:14:elinks:INFO:	Disabling clock on downlink 2
14:31:14:elinks:INFO:	Disabling clock on downlink 3
14:31:14:elinks:INFO:	Disabling clock on downlink 4
14:31:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:31:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:31:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:31:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:31:14:elinks:INFO:	Disabling clock on downlink 0
14:31:14:elinks:INFO:	Disabling clock on downlink 1
14:31:14:elinks:INFO:	Disabling clock on downlink 2
14:31:14:elinks:INFO:	Disabling clock on downlink 3
14:31:14:elinks:INFO:	Disabling clock on downlink 4
14:31:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:31:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:31:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:31:15:elinks:INFO:	Disabling clock on downlink 0
14:31:15:elinks:INFO:	Disabling clock on downlink 1
14:31:15:elinks:INFO:	Disabling clock on downlink 2
14:31:15:elinks:INFO:	Disabling clock on downlink 3
14:31:15:elinks:INFO:	Disabling clock on downlink 4
14:31:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:31:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:31:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:31:15:elinks:INFO:	Disabling clock on downlink 0
14:31:15:elinks:INFO:	Disabling clock on downlink 1
14:31:15:elinks:INFO:	Disabling clock on downlink 2
14:31:15:elinks:INFO:	Disabling clock on downlink 3
14:31:15:elinks:INFO:	Disabling clock on downlink 4
14:31:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:31:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:31:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:31:15:setup_element:INFO:	Scanning clock phase
14:31:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:31:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:15:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:31:15:setup_element:INFO:	Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Clock Delay: 47
14:31:15:setup_element:INFO:	Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
Clock Delay: 47
14:31:15:setup_element:INFO:	Eye window for uplink 2 : XXXXXXXXXXXX____________________________________________________________XXXXXXXX
Clock Delay: 41
14:31:15:setup_element:INFO:	Eye window for uplink 3 : XXXXXXXXXXXX____________________________________________________________XXXXXXXX
Clock Delay: 41
14:31:15:setup_element:INFO:	Eye window for uplink 4 : X_______________________________________________________________________________
Clock Delay: 40
14:31:15:setup_element:INFO:	Eye window for uplink 5 : X_______________________________________________________________________________
Clock Delay: 40
14:31:15:setup_element:INFO:	Eye window for uplink 6 : XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
Clock Delay: 43
14:31:15:setup_element:INFO:	Eye window for uplink 7 : XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
Clock Delay: 43
14:31:15:setup_element:INFO:	Eye window for uplink 8 : XXXXX_X______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:31:15:setup_element:INFO:	Eye window for uplink 9 : XXXXX_X______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
14:31:15:setup_element:INFO:	Eye window for uplink 10: XXXXXXX_________________________________________________________________________
Clock Delay: 43
14:31:15:setup_element:INFO:	Eye window for uplink 11: XXXXXXX_________________________________________________________________________
Clock Delay: 43
14:31:15:setup_element:INFO:	Eye window for uplink 12: XXX___________________________________________________________________XXXXXXXXXX
Clock Delay: 36
14:31:15:setup_element:INFO:	Eye window for uplink 13: XXX___________________________________________________________________XXXXXXXXXX
Clock Delay: 36
14:31:15:setup_element:INFO:	Eye window for uplink 14: X_______________________________________________________________________________
Clock Delay: 40
14:31:15:setup_element:INFO:	Eye window for uplink 15: X_______________________________________________________________________________
Clock Delay: 40
14:31:15:setup_element:INFO:	Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
14:31:15:setup_element:INFO:	Scanning data phases
14:31:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:31:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:21:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:31:21:setup_element:INFO:	Eye window for uplink 0 : _XXXXXXX_______________________________X
Data delay found: 23
14:31:21:setup_element:INFO:	Eye window for uplink 1 : XXXX_____________________________X_XXXXX
Data delay found: 18
14:31:21:setup_element:INFO:	Eye window for uplink 2 : XXXXX_________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 9
14:31:21:setup_element:INFO:	Eye window for uplink 3 : X_____________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
14:31:21:setup_element:INFO:	Eye window for uplink 4 : XXX____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
14:31:21:setup_element:INFO:	Eye window for uplink 5 : _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
14:31:21:setup_element:INFO:	Eye window for uplink 6 : ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
14:31:21:setup_element:INFO:	Eye window for uplink 7 : ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
14:31:21:setup_element:INFO:	Eye window for uplink 8 : _XXXX________XXXXX______________________
Data delay found: 29
14:31:21:setup_element:INFO:	Eye window for uplink 9 : _XXXX____________XXXXXXXX_______________
Data delay found: 32
14:31:21:setup_element:INFO:	Eye window for uplink 10: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
14:31:21:setup_element:INFO:	Eye window for uplink 11: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
14:31:21:setup_element:INFO:	Eye window for uplink 12: ____________XXXXXXXXXX__________________
Data delay found: 36
14:31:21:setup_element:INFO:	Eye window for uplink 13: _______________XXXXXXXXXX_______________
Data delay found: 39
14:31:21:setup_element:INFO:	Eye window for uplink 14: ______________XXXXXXXXXXXX______________
Data delay found: 39
14:31:21:setup_element:INFO:	Eye window for uplink 15: _______________XXXXXXXXXXXXX____________
Data delay found: 1
14:31:21:setup_element:INFO:	Setting the data phase to 23 for uplink 0
14:31:21:setup_element:INFO:	Setting the data phase to 18 for uplink 1
14:31:21:setup_element:INFO:	Setting the data phase to 9 for uplink 2
14:31:21:setup_element:INFO:	Setting the data phase to 7 for uplink 3
14:31:21:setup_element:INFO:	Setting the data phase to 4 for uplink 4
14:31:21:setup_element:INFO:	Setting the data phase to 3 for uplink 5
14:31:21:setup_element:INFO:	Setting the data phase to 5 for uplink 6
14:31:21:setup_element:INFO:	Setting the data phase to 5 for uplink 7
14:31:21:setup_element:INFO:	Setting the data phase to 29 for uplink 8
14:31:21:setup_element:INFO:	Setting the data phase to 32 for uplink 9
14:31:21:setup_element:INFO:	Setting the data phase to 5 for uplink 10
14:31:21:setup_element:INFO:	Setting the data phase to 7 for uplink 11
14:31:21:setup_element:INFO:	Setting the data phase to 36 for uplink 12
14:31:21:setup_element:INFO:	Setting the data phase to 39 for uplink 13
14:31:21:setup_element:INFO:	Setting the data phase to 39 for uplink 14
14:31:21:setup_element:INFO:	Setting the data phase to 1 for uplink 15
==============================================OOO==============================================
14:31:21:setup_element:INFO:	Beginning SMX ASICs map scan
14:31:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:31:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:31:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:31:21:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:31:21:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:31:21:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:31:21:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:31:21:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:31:21:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:31:21:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:31:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:31:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:31:22:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:31:22:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:31:22:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:31:22:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:31:22:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:31:22:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:31:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:31:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:31:24:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 45
    Window Length: 46
    Eye Windows:
      Uplink  0: XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
      Uplink  1: XXXXXXXXXXXXXXXXXXXXXXX_________________________________________________XXXXXXXX
      Uplink  2: XXXXXXXXXXXX____________________________________________________________XXXXXXXX
      Uplink  3: XXXXXXXXXXXX____________________________________________________________XXXXXXXX
      Uplink  4: X_______________________________________________________________________________
      Uplink  5: X_______________________________________________________________________________
      Uplink  6: XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
      Uplink  7: XXXXXXXXXXXXXXXXX______________________________________________________XXXXXXXXX
      Uplink  8: XXXXX_X______________________________________________________________XXXXXXXXXXX
      Uplink  9: XXXXX_X______________________________________________________________XXXXXXXXXXX
      Uplink 10: XXXXXXX_________________________________________________________________________
      Uplink 11: XXXXXXX_________________________________________________________________________
      Uplink 12: XXX___________________________________________________________________XXXXXXXXXX
      Uplink 13: XXX___________________________________________________________________XXXXXXXXXX
      Uplink 14: X_______________________________________________________________________________
      Uplink 15: X_______________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 31
      Eye Window: _XXXXXXX_______________________________X
    Uplink 1:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________X_XXXXX
    Uplink 2:
      Optimal Phase: 9
      Window Length: 9
      Eye Window: XXXXX_________XXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 3:
      Optimal Phase: 7
      Window Length: 13
      Eye Window: X_____________XXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 4:
      Optimal Phase: 4
      Window Length: 4
      Eye Window: XXX____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 5:
      Optimal Phase: 3
      Window Length: 7
      Eye Window: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 6:
      Optimal Phase: 5
      Window Length: 11
      Eye Window: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 7:
      Optimal Phase: 5
      Window Length: 11
      Eye Window: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 8:
      Optimal Phase: 29
      Window Length: 23
      Eye Window: _XXXX________XXXXX______________________
    Uplink 9:
      Optimal Phase: 32
      Window Length: 16
      Eye Window: _XXXX____________XXXXXXXX_______________
    Uplink 10:
      Optimal Phase: 5
      Window Length: 12
      Eye Window: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 11:
      Optimal Phase: 7
      Window Length: 15
      Eye Window: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 12:
      Optimal Phase: 36
      Window Length: 30
      Eye Window: ____________XXXXXXXXXX__________________
    Uplink 13:
      Optimal Phase: 39
      Window Length: 30
      Eye Window: _______________XXXXXXXXXX_______________
    Uplink 14:
      Optimal Phase: 39
      Window Length: 28
      Eye Window: ______________XXXXXXXXXXXX______________
    Uplink 15:
      Optimal Phase: 1
      Window Length: 27
      Eye Window: _______________XXXXXXXXXXXXX____________

==============================================OOO==============================================
14:31:24:setup_element:INFO:	Performing Elink synchronization
14:31:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:31:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:31:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:31:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:31:24:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:31:24:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:31:24:febtest:INFO:	Init all SMX (CSA): 30
14:31:39:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:31:40:febtest:INFO:	01-00 | XA-000-09-004-007-014-008-07 |  28.2 | 1171.5
14:31:40:febtest:INFO:	08-01 | XA-000-09-004-007-014-003-07 |  47.3 | 1106.2
14:31:40:febtest:INFO:	03-02 | XA-000-09-004-007-013-007-09 |  34.6 | 1153.7
14:31:40:febtest:INFO:	10-03 | XA-000-09-004-012-006-015-05 |  21.9 | 1195.1
14:31:40:febtest:INFO:	05-04 | XA-000-09-004-012-008-025-11 |  31.4 | 1165.6
14:31:41:febtest:INFO:	12-05 | XA-000-09-004-012-005-015-11 |  21.9 | 1195.1
14:31:41:febtest:INFO:	07-06 | XA-000-09-004-012-004-015-06 |  18.7 | 1201.0
14:31:41:febtest:INFO:	14-07 | XA-000-09-004-007-015-007-10 |  21.9 | 1195.1
14:31:42:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:31:44:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1177.390875 mV
14:31:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:31:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:31:44:ST3_smx:INFO:		Electrons
14:31:44:ST3_smx:INFO:	# loops 0
14:31:46:ST3_smx:INFO:	# loops 1
14:31:48:ST3_smx:INFO:	# loops 2
14:31:49:ST3_smx:INFO:	# loops 3
14:31:51:ST3_smx:INFO:	# loops 4
14:31:53:ST3_smx:INFO:	Total # of broken channels: 0
14:31:53:ST3_smx:INFO:	List of broken channels: []
14:31:53:ST3_smx:INFO:	Total # of broken channels: 0
14:31:53:ST3_smx:INFO:	List of broken channels: []
14:31:54:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1112.140140 mV
14:31:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:31:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:31:54:ST3_smx:INFO:		Electrons
14:31:54:ST3_smx:INFO:	# loops 0
14:31:56:ST3_smx:INFO:	# loops 1
14:31:58:ST3_smx:INFO:	# loops 2
14:31:59:ST3_smx:INFO:	# loops 3
14:32:01:ST3_smx:INFO:	# loops 4
14:32:03:ST3_smx:INFO:	Total # of broken channels: 0
14:32:03:ST3_smx:INFO:	List of broken channels: []
14:32:03:ST3_smx:INFO:	Total # of broken channels: 0
14:32:03:ST3_smx:INFO:	List of broken channels: []
14:32:05:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1159.654860 mV
14:32:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:05:ST3_smx:INFO:		Electrons
14:32:05:ST3_smx:INFO:	# loops 0
14:32:06:ST3_smx:INFO:	# loops 1
14:32:08:ST3_smx:INFO:	# loops 2
14:32:10:ST3_smx:INFO:	# loops 3
14:32:11:ST3_smx:INFO:	# loops 4
14:32:13:ST3_smx:INFO:	Total # of broken channels: 0
14:32:13:ST3_smx:INFO:	List of broken channels: []
14:32:13:ST3_smx:INFO:	Total # of broken channels: 0
14:32:13:ST3_smx:INFO:	List of broken channels: []
14:32:15:ST3_smx:INFO:	chip: 10-3 	 21.902970 C 	 1200.969315 mV
14:32:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:15:ST3_smx:INFO:		Electrons
14:32:15:ST3_smx:INFO:	# loops 0
14:32:17:ST3_smx:INFO:	# loops 1
14:32:18:ST3_smx:INFO:	# loops 2
14:32:20:ST3_smx:INFO:	# loops 3
14:32:22:ST3_smx:INFO:	# loops 4
14:32:23:ST3_smx:INFO:	Total # of broken channels: 0
14:32:23:ST3_smx:INFO:	List of broken channels: []
14:32:23:ST3_smx:INFO:	Total # of broken channels: 0
14:32:23:ST3_smx:INFO:	List of broken channels: []
14:32:25:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1171.483840 mV
14:32:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:25:ST3_smx:INFO:		Electrons
14:32:25:ST3_smx:INFO:	# loops 0
14:32:27:ST3_smx:INFO:	# loops 1
14:32:29:ST3_smx:INFO:	# loops 2
14:32:30:ST3_smx:INFO:	# loops 3
14:32:32:ST3_smx:INFO:	# loops 4
14:32:34:ST3_smx:INFO:	Total # of broken channels: 0
14:32:34:ST3_smx:INFO:	List of broken channels: []
14:32:34:ST3_smx:INFO:	Total # of broken channels: 0
14:32:34:ST3_smx:INFO:	List of broken channels: []
14:32:35:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1200.969315 mV
14:32:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:35:ST3_smx:INFO:		Electrons
14:32:35:ST3_smx:INFO:	# loops 0
14:32:37:ST3_smx:INFO:	# loops 1
14:32:39:ST3_smx:INFO:	# loops 2
14:32:40:ST3_smx:INFO:	# loops 3
14:32:42:ST3_smx:INFO:	# loops 4
14:32:44:ST3_smx:INFO:	Total # of broken channels: 0
14:32:44:ST3_smx:INFO:	List of broken channels: []
14:32:44:ST3_smx:INFO:	Total # of broken channels: 0
14:32:44:ST3_smx:INFO:	List of broken channels: []
14:32:45:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1200.969315 mV
14:32:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:45:ST3_smx:INFO:		Electrons
14:32:45:ST3_smx:INFO:	# loops 0
14:32:47:ST3_smx:INFO:	# loops 1
14:32:49:ST3_smx:INFO:	# loops 2
14:32:51:ST3_smx:INFO:	# loops 3
14:32:52:ST3_smx:INFO:	# loops 4
14:32:54:ST3_smx:INFO:	Total # of broken channels: 0
14:32:54:ST3_smx:INFO:	List of broken channels: []
14:32:54:ST3_smx:INFO:	Total # of broken channels: 0
14:32:54:ST3_smx:INFO:	List of broken channels: []
14:32:56:ST3_smx:INFO:	chip: 14-7 	 25.062742 C 	 1200.969315 mV
14:32:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:32:56:ST3_smx:INFO:		Electrons
14:32:56:ST3_smx:INFO:	# loops 0
14:32:57:ST3_smx:INFO:	# loops 1
14:32:59:ST3_smx:INFO:	# loops 2
14:33:01:ST3_smx:INFO:	# loops 3
14:33:03:ST3_smx:INFO:	# loops 4
14:33:04:ST3_smx:INFO:	Total # of broken channels: 0
14:33:04:ST3_smx:INFO:	List of broken channels: []
14:33:04:ST3_smx:INFO:	Total # of broken channels: 1
14:33:04:ST3_smx:INFO:	List of broken channels: [12]
14:33:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:33:05:febtest:INFO:	01-00 | XA-000-09-004-007-014-008-07 |  31.4 | 1195.1
14:33:05:febtest:INFO:	08-01 | XA-000-09-004-007-014-003-07 |  50.4 | 1135.9
14:33:05:febtest:INFO:	03-02 | XA-000-09-004-007-013-007-09 |  37.7 | 1177.4
14:33:05:febtest:INFO:	10-03 | XA-000-09-004-012-006-015-05 |  21.9 | 1218.6
14:33:06:febtest:INFO:	05-04 | XA-000-09-004-012-008-025-11 |  34.6 | 1189.2
14:33:06:febtest:INFO:	12-05 | XA-000-09-004-012-005-015-11 |  25.1 | 1218.6
14:33:06:febtest:INFO:	07-06 | XA-000-09-004-012-004-015-06 |  25.1 | 1218.6
14:33:06:febtest:INFO:	14-07 | XA-000-09-004-007-015-007-10 |  28.2 | 1218.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_12_06-14_30_50
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1314| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 02294 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M3DR4B3000133A2
LADDER_NAME: L3DR400013
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4110', '1.848', '2.5460', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0090', '1.850', '2.3260', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5214', '0.000', '0.0000', '0.000', '0.0000']