
FEB_1321 19.12.24 14:23:17
TextEdit.txt
14:23:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:23:17:ST3_Shared:INFO: FEB-Microcable 14:23:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:23:23:ST3_Shared:INFO: STS mode selected 14:23:23:febtest:INFO: Testing FEB with SN 1321 14:23:24:smx_tester:INFO: Scanning setup 14:23:24:elinks:INFO: Disabling clock on downlink 0 14:23:24:elinks:INFO: Disabling clock on downlink 1 14:23:24:elinks:INFO: Disabling clock on downlink 2 14:23:24:elinks:INFO: Disabling clock on downlink 3 14:23:24:elinks:INFO: Disabling clock on downlink 4 14:23:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:25:elinks:INFO: Disabling clock on downlink 0 14:23:25:elinks:INFO: Disabling clock on downlink 1 14:23:25:elinks:INFO: Disabling clock on downlink 2 14:23:25:elinks:INFO: Disabling clock on downlink 3 14:23:25:elinks:INFO: Disabling clock on downlink 4 14:23:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 14:23:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 14:23:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:25:elinks:INFO: Disabling clock on downlink 0 14:23:25:elinks:INFO: Disabling clock on downlink 1 14:23:25:elinks:INFO: Disabling clock on downlink 2 14:23:25:elinks:INFO: Disabling clock on downlink 3 14:23:25:elinks:INFO: Disabling clock on downlink 4 14:23:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:23:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:25:elinks:INFO: Disabling clock on downlink 0 14:23:25:elinks:INFO: Disabling clock on downlink 1 14:23:25:elinks:INFO: Disabling clock on downlink 2 14:23:25:elinks:INFO: Disabling clock on downlink 3 14:23:25:elinks:INFO: Disabling clock on downlink 4 14:23:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:23:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:25:elinks:INFO: Disabling clock on downlink 0 14:23:25:elinks:INFO: Disabling clock on downlink 1 14:23:25:elinks:INFO: Disabling clock on downlink 2 14:23:25:elinks:INFO: Disabling clock on downlink 3 14:23:25:elinks:INFO: Disabling clock on downlink 4 14:23:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:23:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 14:23:25:setup_element:INFO: Scanning clock phase 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:23:25:setup_element:INFO: Clock phase scan results for group 0, downlink 1 14:23:25:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXXXX Clock Delay: 44 14:23:25:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXXXX Clock Delay: 44 14:23:25:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXX Clock Delay: 43 14:23:25:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXX Clock Delay: 43 14:23:25:setup_element:INFO: Eye window for uplink 6 : XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 7 : XXXXXX____________________________________________________________________XXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 8 : XXXXXXXX_______________________________________________________________XXXXXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 9 : XXXXXXXX_______________________________________________________________XXXXXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 10: XXXXXXXX______________________________________________________________XXXXXXXXXX Clock Delay: 38 14:23:25:setup_element:INFO: Eye window for uplink 11: XXXXXXXX______________________________________________________________XXXXXXXXXX Clock Delay: 38 14:23:25:setup_element:INFO: Eye window for uplink 12: XXXXXXXXX______________________________________________________________XXXXXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 13: XXXXXXXXX______________________________________________________________XXXXXXXXX Clock Delay: 39 14:23:25:setup_element:INFO: Eye window for uplink 14: XXXXXXXX________________________________________________________________________ Clock Delay: 43 14:23:25:setup_element:INFO: Eye window for uplink 15: XXXXXXXX________________________________________________________________________ Clock Delay: 43 14:23:25:setup_element:INFO: Setting the clock phase to 44 for group 0, downlink 1 ==============================================OOO============================================== 14:23:25:setup_element:INFO: Scanning data phases 14:23:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:23:31:setup_element:INFO: Data phase scan results for group 0, downlink 1 14:23:31:setup_element:INFO: Eye window for uplink 0 : _XXXXXXX________________________________ Data delay found: 24 14:23:31:setup_element:INFO: Eye window for uplink 1 : XXXX_______________________________XXXXX Data delay found: 19 14:23:31:setup_element:INFO: Eye window for uplink 2 : XX_________________XXXXXXXXXXXXXXXXXXXXX Data delay found: 10 14:23:31:setup_element:INFO: Eye window for uplink 3 : ___________________XXXXXXXXXXXXXXXXXXXXX Data delay found: 9 14:23:31:setup_element:INFO: Eye window for uplink 6 : ____________XXXXXX__XXXXX_XXXXXXXX______ Data delay found: 2 14:23:31:setup_element:INFO: Eye window for uplink 7 : ____________XXXXXX__XXXXXXXXXXX_________ Data delay found: 1 14:23:31:setup_element:INFO: Eye window for uplink 8 : XXXXXXXX_________XXXXXXXXXXXXXXX________ Data delay found: 12 14:23:31:setup_element:INFO: Eye window for uplink 9 : XXXXXXXX____________XXXXXXXXXXXX________ Data delay found: 13 14:23:31:setup_element:INFO: Eye window for uplink 10: ___________XX____XXXXXXX________________ Data delay found: 37 14:23:31:setup_element:INFO: Eye window for uplink 11: ___________XX_____XXXXXXXXXX____________ Data delay found: 39 14:23:31:setup_element:INFO: Eye window for uplink 12: ________________XXXXXXXXXXXXXXXXXXXXX___ Data delay found: 6 14:23:31:setup_element:INFO: Eye window for uplink 13: ____________________XXXXXXXXXXXXXXXXX___ Data delay found: 8 14:23:31:setup_element:INFO: Eye window for uplink 14: _________________XXXXXXXXX________XXXXXX Data delay found: 8 14:23:31:setup_element:INFO: Eye window for uplink 15: __________________XXXXXXXXXX______XXXXXX Data delay found: 8 14:23:31:setup_element:INFO: Setting the data phase to 24 for uplink 0 14:23:31:setup_element:INFO: Setting the data phase to 19 for uplink 1 14:23:31:setup_element:INFO: Setting the data phase to 10 for uplink 2 14:23:31:setup_element:INFO: Setting the data phase to 9 for uplink 3 14:23:31:setup_element:INFO: Setting the data phase to 2 for uplink 6 14:23:31:setup_element:INFO: Setting the data phase to 1 for uplink 7 14:23:31:setup_element:INFO: Setting the data phase to 12 for uplink 8 14:23:31:setup_element:INFO: Setting the data phase to 13 for uplink 9 14:23:31:setup_element:INFO: Setting the data phase to 37 for uplink 10 14:23:31:setup_element:INFO: Setting the data phase to 39 for uplink 11 14:23:31:setup_element:INFO: Setting the data phase to 6 for uplink 12 14:23:31:setup_element:INFO: Setting the data phase to 8 for uplink 13 14:23:31:setup_element:INFO: Setting the data phase to 8 for uplink 14 14:23:31:setup_element:INFO: Setting the data phase to 8 for uplink 15 ==============================================OOO============================================== 14:23:31:setup_element:INFO: Beginning SMX ASICs map scan 14:23:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:23:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:23:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:23:31:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 14:23:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 14:23:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 14:23:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 14:23:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 14:23:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 14:23:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 14:23:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 14:23:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 14:23:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 14:23:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 14:23:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 14:23:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 14:23:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 14:23:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 14:23:34:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 44 Window Length: 50 Eye Windows: Uplink 0: XXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXXXX Uplink 1: XXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXXXXX Uplink 2: XXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXX Uplink 3: XXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXXX Uplink 6: XXXXXX____________________________________________________________________XXXXXX Uplink 7: XXXXXX____________________________________________________________________XXXXXX Uplink 8: XXXXXXXX_______________________________________________________________XXXXXXXXX Uplink 9: XXXXXXXX_______________________________________________________________XXXXXXXXX Uplink 10: XXXXXXXX______________________________________________________________XXXXXXXXXX Uplink 11: XXXXXXXX______________________________________________________________XXXXXXXXXX Uplink 12: XXXXXXXXX______________________________________________________________XXXXXXXXX Uplink 13: XXXXXXXXX______________________________________________________________XXXXXXXXX Uplink 14: XXXXXXXX________________________________________________________________________ Uplink 15: XXXXXXXX________________________________________________________________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 33 Eye Window: _XXXXXXX________________________________ Uplink 1: Optimal Phase: 19 Window Length: 31 Eye Window: XXXX_______________________________XXXXX Uplink 2: Optimal Phase: 10 Window Length: 17 Eye Window: XX_________________XXXXXXXXXXXXXXXXXXXXX Uplink 3: Optimal Phase: 9 Window Length: 19 Eye Window: ___________________XXXXXXXXXXXXXXXXXXXXX Uplink 6: Optimal Phase: 2 Window Length: 18 Eye Window: ____________XXXXXX__XXXXX_XXXXXXXX______ Uplink 7: Optimal Phase: 1 Window Length: 21 Eye Window: ____________XXXXXX__XXXXXXXXXXX_________ Uplink 8: Optimal Phase: 12 Window Length: 9 Eye Window: XXXXXXXX_________XXXXXXXXXXXXXXX________ Uplink 9: Optimal Phase: 13 Window Length: 12 Eye Window: XXXXXXXX____________XXXXXXXXXXXX________ Uplink 10: Optimal Phase: 37 Window Length: 27 Eye Window: ___________XX____XXXXXXX________________ Uplink 11: Optimal Phase: 39 Window Length: 23 Eye Window: ___________XX_____XXXXXXXXXX____________ Uplink 12: Optimal Phase: 6 Window Length: 19 Eye Window: ________________XXXXXXXXXXXXXXXXXXXXX___ Uplink 13: Optimal Phase: 8 Window Length: 23 Eye Window: ____________________XXXXXXXXXXXXXXXXX___ Uplink 14: Optimal Phase: 8 Window Length: 17 Eye Window: _________________XXXXXXXXX________XXXXXX Uplink 15: Optimal Phase: 8 Window Length: 18 Eye Window: __________________XXXXXXXXXX______XXXXXX ==============================================OOO============================================== 14:23:34:setup_element:INFO: Performing Elink synchronization 14:23:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:23:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:23:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] ==============================================OOO============================================== 14:23:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 14:23:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 14:23:34:febtest:INFO: Init all SMX (CSA): 30 14:23:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:23:47:febtest:INFO: 01-00 | XA-000-09-004-002-013-013-10 | 34.6 | 1147.8 14:23:48:febtest:INFO: 08-01 | XA-000-09-004-002-014-026-03 | 28.2 | 1147.8 14:23:48:febtest:INFO: 03-02 | XA-000-09-004-002-013-015-10 | 28.2 | 1171.5 14:23:48:febtest:INFO: 10-03 | XA-000-09-004-012-002-016-04 | 37.7 | 1135.9 14:23:48:febtest:INFO: 12-05 | XA-000-09-004-012-005-022-12 | 31.4 | 1153.7 14:23:49:febtest:INFO: 07-06 | XA-000-09-004-002-013-016-13 | 21.9 | 1195.1 14:23:49:febtest:INFO: 14-07 | XA-000-09-004-012-006-022-02 | 37.7 | 1130.0 14:23:50:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 14:23:50:febtest:ERROR: HW addres 5 != 4 14:23:55:ST3_smx:INFO: chip: 1-0 34.556970 C 1153.732915 mV 14:23:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:23:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:23:55:ST3_smx:INFO: Electrons 14:23:55:ST3_smx:INFO: # loops 0 14:23:57:ST3_smx:INFO: # loops 1 14:23:58:ST3_smx:INFO: # loops 2 14:24:00:ST3_smx:INFO: Total # of broken channels: 1 14:24:00:ST3_smx:INFO: List of broken channels: [55] 14:24:00:ST3_smx:INFO: Total # of broken channels: 1 14:24:00:ST3_smx:INFO: List of broken channels: [127] 14:24:02:ST3_smx:INFO: chip: 8-1 28.225000 C 1159.654860 mV 14:24:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:02:ST3_smx:INFO: Electrons 14:24:02:ST3_smx:INFO: # loops 0 14:24:03:ST3_smx:INFO: # loops 1 14:24:05:ST3_smx:INFO: # loops 2 14:24:07:ST3_smx:INFO: Total # of broken channels: 3 14:24:07:ST3_smx:INFO: List of broken channels: [18, 46, 84] 14:24:07:ST3_smx:INFO: Total # of broken channels: 4 14:24:07:ST3_smx:INFO: List of broken channels: [18, 30, 46, 84] 14:24:09:ST3_smx:INFO: chip: 3-2 28.225000 C 1177.390875 mV 14:24:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:09:ST3_smx:INFO: Electrons 14:24:09:ST3_smx:INFO: # loops 0 14:24:10:ST3_smx:INFO: # loops 1 14:24:12:ST3_smx:INFO: # loops 2 14:24:14:ST3_smx:INFO: Total # of broken channels: 0 14:24:14:ST3_smx:INFO: List of broken channels: [] 14:24:14:ST3_smx:INFO: Total # of broken channels: 0 14:24:14:ST3_smx:INFO: List of broken channels: [] 14:24:15:ST3_smx:INFO: chip: 10-3 34.556970 C 1147.806000 mV 14:24:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:15:ST3_smx:INFO: Electrons 14:24:15:ST3_smx:INFO: # loops 0 14:24:17:ST3_smx:INFO: # loops 1 14:24:19:ST3_smx:INFO: # loops 2 14:24:20:ST3_smx:INFO: Total # of broken channels: 1 14:24:20:ST3_smx:INFO: List of broken channels: [85] 14:24:20:ST3_smx:INFO: Total # of broken channels: 0 14:24:20:ST3_smx:INFO: List of broken channels: [] 14:24:22:ST3_smx:INFO: chip: 12-5 31.389742 C 1165.571835 mV 14:24:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:22:ST3_smx:INFO: Electrons 14:24:22:ST3_smx:INFO: # loops 0 14:24:24:ST3_smx:INFO: # loops 1 14:24:25:ST3_smx:INFO: # loops 2 14:24:27:ST3_smx:INFO: Total # of broken channels: 0 14:24:27:ST3_smx:INFO: List of broken channels: [] 14:24:27:ST3_smx:INFO: Total # of broken channels: 0 14:24:27:ST3_smx:INFO: List of broken channels: [] 14:24:29:ST3_smx:INFO: chip: 7-6 21.902970 C 1206.851500 mV 14:24:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:29:ST3_smx:INFO: Electrons 14:24:29:ST3_smx:INFO: # loops 0 14:24:30:ST3_smx:INFO: # loops 1 14:24:32:ST3_smx:INFO: # loops 2 14:24:34:ST3_smx:INFO: Total # of broken channels: 0 14:24:34:ST3_smx:INFO: List of broken channels: [] 14:24:34:ST3_smx:INFO: Total # of broken channels: 0 14:24:34:ST3_smx:INFO: List of broken channels: [] 14:24:35:ST3_smx:INFO: chip: 14-7 37.726682 C 1141.874115 mV 14:24:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:24:36:ST3_smx:INFO: Electrons 14:24:36:ST3_smx:INFO: # loops 0 14:24:37:ST3_smx:INFO: # loops 1 14:24:39:ST3_smx:INFO: # loops 2 14:24:41:ST3_smx:INFO: Total # of broken channels: 0 14:24:41:ST3_smx:INFO: List of broken channels: [] 14:24:41:ST3_smx:INFO: Total # of broken channels: 0 14:24:41:ST3_smx:INFO: List of broken channels: [] 14:24:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:24:41:febtest:INFO: 01-00 | XA-000-09-004-002-013-013-10 | 34.6 | 1177.4 14:24:41:febtest:INFO: 08-01 | XA-000-09-004-002-014-026-03 | 31.4 | 1183.3 14:24:42:febtest:INFO: 03-02 | XA-000-09-004-002-013-015-10 | 28.2 | 1195.1 14:24:42:febtest:INFO: 10-03 | XA-000-09-004-012-002-016-04 | 37.7 | 1165.6 14:24:42:febtest:INFO: 12-05 | XA-000-09-004-012-005-022-12 | 34.6 | 1183.3 14:24:42:febtest:INFO: 07-06 | XA-000-09-004-002-013-016-13 | 25.1 | 1224.5 14:24:42:febtest:INFO: 14-07 | XA-000-09-004-012-006-022-02 | 40.9 | 1159.7 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_12_19-14_23_17 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 1321| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A AMP_MODE : STS ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.449', '1.3870', '1.849', '2.1210', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9140', '1.850', '2.1930', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.8910', '1.850', '0.6524', '0.000', '0.0000', '0.000', '0.0000']