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FEB_1322 20.01.25 13:41:52
Info
13:41:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:52:ST3_Shared:INFO: FEB-Microcable
13:41:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:54:ST3_Shared:INFO: STS mode selected
13:41:54:febtest:INFO: Testing FEB with SN 1322
13:41:55:smx_tester:INFO: Scanning setup
13:41:55:elinks:INFO: Disabling clock on downlink 0
13:41:55:elinks:INFO: Disabling clock on downlink 1
13:41:55:elinks:INFO: Disabling clock on downlink 2
13:41:55:elinks:INFO: Disabling clock on downlink 3
13:41:55:elinks:INFO: Disabling clock on downlink 4
13:41:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:56:elinks:INFO: Disabling clock on downlink 0
13:41:56:elinks:INFO: Disabling clock on downlink 1
13:41:56:elinks:INFO: Disabling clock on downlink 2
13:41:56:elinks:INFO: Disabling clock on downlink 3
13:41:56:elinks:INFO: Disabling clock on downlink 4
13:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:41:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:56:elinks:INFO: Disabling clock on downlink 0
13:41:56:elinks:INFO: Disabling clock on downlink 1
13:41:56:elinks:INFO: Disabling clock on downlink 2
13:41:56:elinks:INFO: Disabling clock on downlink 3
13:41:56:elinks:INFO: Disabling clock on downlink 4
13:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:56:elinks:INFO: Disabling clock on downlink 0
13:41:56:elinks:INFO: Disabling clock on downlink 1
13:41:56:elinks:INFO: Disabling clock on downlink 2
13:41:56:elinks:INFO: Disabling clock on downlink 3
13:41:56:elinks:INFO: Disabling clock on downlink 4
13:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:56:elinks:INFO: Disabling clock on downlink 0
13:41:56:elinks:INFO: Disabling clock on downlink 1
13:41:56:elinks:INFO: Disabling clock on downlink 2
13:41:56:elinks:INFO: Disabling clock on downlink 3
13:41:56:elinks:INFO: Disabling clock on downlink 4
13:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:41:56:setup_element:INFO: Scanning clock phase
13:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:41:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:41:57:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Clock Delay: 44
13:41:57:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Clock Delay: 44
13:41:57:setup_element:INFO: Eye window for uplink 4 : X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Eye window for uplink 5 : X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXXXX_______________________________________________________XXX______
Clock Delay: 43
13:41:57:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXXXX_______________________________________________________XXX______
Clock Delay: 43
13:41:57:setup_element:INFO: Eye window for uplink 8 : X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Eye window for uplink 9 : X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Eye window for uplink 10: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
13:41:57:setup_element:INFO: Eye window for uplink 11: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
13:41:57:setup_element:INFO: Eye window for uplink 12: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
13:41:57:setup_element:INFO: Eye window for uplink 13: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
13:41:57:setup_element:INFO: Eye window for uplink 14: X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Eye window for uplink 15: X_______________________________________________________________________________
Clock Delay: 40
13:41:57:setup_element:INFO: Setting the clock phase to 43 for group 0, downlink 1
==============================================OOO==============================================
13:41:57:setup_element:INFO: Scanning data phases
13:41:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:42:02:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:42:02:setup_element:INFO: Eye window for uplink 2 : XXXXXXX____________________________XXXXX
Data delay found: 20
13:42:02:setup_element:INFO: Eye window for uplink 3 : XXXX_______________________________XXXXX
Data delay found: 19
13:42:02:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXX_____________________XXXXXXXXXX
Data delay found: 19
13:42:02:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXX___________________XXXXXXXXXXXX
Data delay found: 18
13:42:02:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXXXXXXX
Data delay found: 13
13:42:02:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXXXXXXXXXX
Data delay found: 11
13:42:02:setup_element:INFO: Eye window for uplink 8 : ________________XXXXXXXX_______XXXXXXXXX
Data delay found: 7
13:42:02:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXXX__XXXXXXXXX
Data delay found: 10
13:42:02:setup_element:INFO: Eye window for uplink 10: XXXXXXX_XXXXX_XXXXXXXXXXXXXXX___________
Data delay found: 34
13:42:02:setup_element:INFO: Eye window for uplink 11: XXXXXXX_XXXXX___XXXXXXXXXXXXX___________
Data delay found: 34
13:42:02:setup_element:INFO: Eye window for uplink 12: _______________XXXXXXXXX________________
Data delay found: 39
13:42:02:setup_element:INFO: Eye window for uplink 13: ________________X__XXXXXXX______________
Data delay found: 0
13:42:02:setup_element:INFO: Eye window for uplink 14: XXXXXX__X______XXXXXXXXXXXXXXX__________
Data delay found: 34
13:42:02:setup_element:INFO: Eye window for uplink 15: XXXXXX__X______XXXXXXXXXXXXXXX__________
Data delay found: 34
13:42:02:setup_element:INFO: Setting the data phase to 20 for uplink 2
13:42:02:setup_element:INFO: Setting the data phase to 19 for uplink 3
13:42:02:setup_element:INFO: Setting the data phase to 19 for uplink 4
13:42:02:setup_element:INFO: Setting the data phase to 18 for uplink 5
13:42:02:setup_element:INFO: Setting the data phase to 13 for uplink 6
13:42:02:setup_element:INFO: Setting the data phase to 11 for uplink 7
13:42:02:setup_element:INFO: Setting the data phase to 7 for uplink 8
13:42:02:setup_element:INFO: Setting the data phase to 10 for uplink 9
13:42:02:setup_element:INFO: Setting the data phase to 34 for uplink 10
13:42:02:setup_element:INFO: Setting the data phase to 34 for uplink 11
13:42:02:setup_element:INFO: Setting the data phase to 39 for uplink 12
13:42:02:setup_element:INFO: Setting the data phase to 0 for uplink 13
13:42:02:setup_element:INFO: Setting the data phase to 34 for uplink 14
13:42:02:setup_element:INFO: Setting the data phase to 34 for uplink 15
==============================================OOO==============================================
13:42:02:setup_element:INFO: Beginning SMX ASICs map scan
13:42:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:42:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:42:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:42:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:42:02:uplink:INFO: Setting uplinks mask [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:42:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:42:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:42:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:42:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:42:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:42:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:42:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:42:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:42:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:42:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:42:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:42:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:42:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:42:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:42:05:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 43
Window Length: 50
Eye Windows:
Uplink 2: XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXX____________________________________________________XXXXXXXXX
Uplink 4: X_______________________________________________________________________________
Uplink 5: X_______________________________________________________________________________
Uplink 6: XXXXXXXXXXXXXXXX_______________________________________________________XXX______
Uplink 7: XXXXXXXXXXXXXXXX_______________________________________________________XXX______
Uplink 8: X_______________________________________________________________________________
Uplink 9: X_______________________________________________________________________________
Uplink 10: XXXXXX_______________________________________________________________XXXXXXXXXXX
Uplink 11: XXXXXX_______________________________________________________________XXXXXXXXXXX
Uplink 12: XXXXXX_______________________________________________________________XXXXXXXXXXX
Uplink 13: XXXXXX_______________________________________________________________XXXXXXXXXXX
Uplink 14: X_______________________________________________________________________________
Uplink 15: X_______________________________________________________________________________
Data phase characteristics:
Uplink 2:
Optimal Phase: 20
Window Length: 28
Eye Window: XXXXXXX____________________________XXXXX
Uplink 3:
Optimal Phase: 19
Window Length: 31
Eye Window: XXXX_______________________________XXXXX
Uplink 4:
Optimal Phase: 19
Window Length: 21
Eye Window: XXXXXXXXX_____________________XXXXXXXXXX
Uplink 5:
Optimal Phase: 18
Window Length: 19
Eye Window: XXXXXXXXX___________________XXXXXXXXXXXX
Uplink 6:
Optimal Phase: 13
Window Length: 28
Eye Window: ____________________________XXXXXXXXXXXX
Uplink 7:
Optimal Phase: 11
Window Length: 24
Eye Window: ________________________XXXXXXXXXXXXXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 16
Eye Window: ________________XXXXXXXX_______XXXXXXXXX
Uplink 9:
Optimal Phase: 10
Window Length: 22
Eye Window: ______________________XXXXXXX__XXXXXXXXX
Uplink 10:
Optimal Phase: 34
Window Length: 11
Eye Window: XXXXXXX_XXXXX_XXXXXXXXXXXXXXX___________
Uplink 11:
Optimal Phase: 34
Window Length: 11
Eye Window: XXXXXXX_XXXXX___XXXXXXXXXXXXX___________
Uplink 12:
Optimal Phase: 39
Window Length: 31
Eye Window: _______________XXXXXXXXX________________
Uplink 13:
Optimal Phase: 0
Window Length: 30
Eye Window: ________________X__XXXXXXX______________
Uplink 14:
Optimal Phase: 34
Window Length: 10
Eye Window: XXXXXX__X______XXXXXXXXXXXXXXX__________
Uplink 15:
Optimal Phase: 34
Window Length: 10
Eye Window: XXXXXX__X______XXXXXXXXXXXXXXX__________
==============================================OOO==============================================
13:42:05:setup_element:INFO: Performing Elink synchronization
13:42:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:42:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:42:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:42:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
13:42:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:42:05:uplink:INFO: Enabling uplinks [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:42:06:febtest:INFO: Init all SMX (CSA): 30
13:42:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:42:19:febtest:INFO: 08-01 | XA-000-09-004-007-004-008-08 | 34.6 | 1153.7
13:42:19:febtest:INFO: 03-02 | XA-000-09-004-007-004-014-08 | 31.4 | 1183.3
13:42:19:febtest:INFO: 10-03 | XA-000-09-004-007-006-009-11 | 28.2 | 1177.4
13:42:19:febtest:INFO: 05-04 | XA-000-09-004-007-004-015-08 | 28.2 | 1195.1
13:42:19:febtest:INFO: 12-05 | XA-000-09-004-007-005-015-05 | 37.7 | 1147.8
13:42:20:febtest:INFO: 07-06 | XA-000-09-004-007-006-016-12 | 40.9 | 1153.7
13:42:20:febtest:INFO: 14-07 | XA-000-09-004-006-011-010-04 | 37.7 | 1147.8
13:42:21:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:42:21:febtest:ERROR: HW addres 1 != 0
13:42:26:ST3_smx:INFO: chip: 8-1 34.556970 C 1165.571835 mV
13:42:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:26:ST3_smx:INFO: Electrons
13:42:26:ST3_smx:INFO: # loops 0
13:42:28:ST3_smx:INFO: # loops 1
13:42:29:ST3_smx:INFO: # loops 2
13:42:31:ST3_smx:INFO: Total # of broken channels: 0
13:42:31:ST3_smx:INFO: List of broken channels: []
13:42:31:ST3_smx:INFO: Total # of broken channels: 34
13:42:31:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69]
13:42:33:ST3_smx:INFO: chip: 3-2 31.389742 C 1195.082160 mV
13:42:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:33:ST3_smx:INFO: Electrons
13:42:33:ST3_smx:INFO: # loops 0
13:42:34:ST3_smx:INFO: # loops 1
13:42:36:ST3_smx:INFO: # loops 2
13:42:37:ST3_smx:INFO: Total # of broken channels: 0
13:42:37:ST3_smx:INFO: List of broken channels: []
13:42:37:ST3_smx:INFO: Total # of broken channels: 0
13:42:37:ST3_smx:INFO: List of broken channels: []
13:42:39:ST3_smx:INFO: chip: 10-3 28.225000 C 1189.190035 mV
13:42:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:39:ST3_smx:INFO: Electrons
13:42:39:ST3_smx:INFO: # loops 0
13:42:41:ST3_smx:INFO: # loops 1
13:42:43:ST3_smx:INFO: # loops 2
13:42:44:ST3_smx:INFO: Total # of broken channels: 0
13:42:44:ST3_smx:INFO: List of broken channels: []
13:42:44:ST3_smx:INFO: Total # of broken channels: 0
13:42:44:ST3_smx:INFO: List of broken channels: []
13:42:46:ST3_smx:INFO: chip: 5-4 28.225000 C 1206.851500 mV
13:42:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:46:ST3_smx:INFO: Electrons
13:42:46:ST3_smx:INFO: # loops 0
13:42:47:ST3_smx:INFO: # loops 1
13:42:49:ST3_smx:INFO: # loops 2
13:42:51:ST3_smx:INFO: Total # of broken channels: 0
13:42:51:ST3_smx:INFO: List of broken channels: []
13:42:51:ST3_smx:INFO: Total # of broken channels: 0
13:42:51:ST3_smx:INFO: List of broken channels: []
13:42:52:ST3_smx:INFO: chip: 12-5 37.726682 C 1159.654860 mV
13:42:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:52:ST3_smx:INFO: Electrons
13:42:52:ST3_smx:INFO: # loops 0
13:42:54:ST3_smx:INFO: # loops 1
13:42:56:ST3_smx:INFO: # loops 2
13:42:57:ST3_smx:INFO: Total # of broken channels: 0
13:42:57:ST3_smx:INFO: List of broken channels: []
13:42:57:ST3_smx:INFO: Total # of broken channels: 4
13:42:57:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6]
13:42:59:ST3_smx:INFO: chip: 7-6 44.073563 C 1159.654860 mV
13:42:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:42:59:ST3_smx:INFO: Electrons
13:42:59:ST3_smx:INFO: # loops 0
13:43:01:ST3_smx:INFO: # loops 1
13:43:02:ST3_smx:INFO: # loops 2
13:43:04:ST3_smx:INFO: Total # of broken channels: 0
13:43:04:ST3_smx:INFO: List of broken channels: []
13:43:04:ST3_smx:INFO: Total # of broken channels: 0
13:43:04:ST3_smx:INFO: List of broken channels: []
13:43:06:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV
13:43:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:43:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:43:06:ST3_smx:INFO: Electrons
13:43:06:ST3_smx:INFO: # loops 0
13:43:07:ST3_smx:INFO: # loops 1
13:43:09:ST3_smx:INFO: # loops 2
13:43:10:ST3_smx:INFO: Total # of broken channels: 0
13:43:10:ST3_smx:INFO: List of broken channels: []
13:43:10:ST3_smx:INFO: Total # of broken channels: 1
13:43:10:ST3_smx:INFO: List of broken channels: [16]
13:43:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:43:11:febtest:INFO: 08-01 | XA-000-09-004-007-004-008-08 | 34.6 | 1189.2
13:43:11:febtest:INFO: 03-02 | XA-000-09-004-007-004-014-08 | 31.4 | 1212.7
13:43:11:febtest:INFO: 10-03 | XA-000-09-004-007-006-009-11 | 31.4 | 1212.7
13:43:12:febtest:INFO: 05-04 | XA-000-09-004-007-004-015-08 | 31.4 | 1224.5
13:43:12:febtest:INFO: 12-05 | XA-000-09-004-007-005-015-05 | 37.7 | 1183.3
13:43:12:febtest:INFO: 07-06 | XA-000-09-004-007-006-016-12 | 44.1 | 1183.3
13:43:12:febtest:INFO: 14-07 | XA-000-09-004-006-011-010-04 | 40.9 | 1177.4
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_20-13_41_52
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1322| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.3050', '1.849', '1.7940', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.7660', '1.850', '2.1510', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.7270', '1.850', '0.4592', '0.000', '0.0000', '0.000', '0.0000']