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FEB_1323 28.01.25 14:28:21
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14:28:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:28:21:ST3_Shared:INFO: FEB-Sensor
14:28:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:28:26:ST3_ModuleSelector:DEBUG: M4UR5B2011332B2
14:28:26:ST3_ModuleSelector:DEBUG: L4UR501133
14:28:26:ST3_ModuleSelector:DEBUG: 30394
14:28:26:ST3_ModuleSelector:DEBUG: 62x124
14:28:26:ST3_ModuleSelector:DEBUG: B
14:28:26:ST3_ModuleSelector:DEBUG: M4UR5B2011332B2
14:28:26:ST3_ModuleSelector:DEBUG: L4UR501133
14:28:26:ST3_ModuleSelector:DEBUG: 30394
14:28:26:ST3_ModuleSelector:DEBUG: 62x124
14:28:26:ST3_ModuleSelector:DEBUG: B
14:28:31:ST3_ModuleSelector:INFO: M4UR5B2011332B2
14:28:31:ST3_ModuleSelector:INFO: 30394
14:28:31:febtest:INFO: Testing FEB with SN 1323
14:28:33:smx_tester:INFO: Scanning setup
14:28:33:elinks:INFO: Disabling clock on downlink 0
14:28:33:elinks:INFO: Disabling clock on downlink 1
14:28:33:elinks:INFO: Disabling clock on downlink 2
14:28:33:elinks:INFO: Disabling clock on downlink 3
14:28:33:elinks:INFO: Disabling clock on downlink 4
14:28:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:28:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:28:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:28:33:elinks:INFO: Disabling clock on downlink 0
14:28:33:elinks:INFO: Disabling clock on downlink 1
14:28:33:elinks:INFO: Disabling clock on downlink 2
14:28:33:elinks:INFO: Disabling clock on downlink 3
14:28:33:elinks:INFO: Disabling clock on downlink 4
14:28:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:28:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:28:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:28:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:28:33:elinks:INFO: Disabling clock on downlink 0
14:28:33:elinks:INFO: Disabling clock on downlink 1
14:28:33:elinks:INFO: Disabling clock on downlink 2
14:28:33:elinks:INFO: Disabling clock on downlink 3
14:28:33:elinks:INFO: Disabling clock on downlink 4
14:28:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:28:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:28:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:28:34:elinks:INFO: Disabling clock on downlink 0
14:28:34:elinks:INFO: Disabling clock on downlink 1
14:28:34:elinks:INFO: Disabling clock on downlink 2
14:28:34:elinks:INFO: Disabling clock on downlink 3
14:28:34:elinks:INFO: Disabling clock on downlink 4
14:28:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:28:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:28:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:28:34:elinks:INFO: Disabling clock on downlink 0
14:28:34:elinks:INFO: Disabling clock on downlink 1
14:28:34:elinks:INFO: Disabling clock on downlink 2
14:28:34:elinks:INFO: Disabling clock on downlink 3
14:28:34:elinks:INFO: Disabling clock on downlink 4
14:28:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:28:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:28:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
14:28:34:setup_element:INFO: Scanning clock phase
14:28:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:28:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:28:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:28:34:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Clock Delay: 47
14:28:34:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Clock Delay: 47
14:28:34:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXX
Clock Delay: 45
14:28:34:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXX
Clock Delay: 45
14:28:34:setup_element:INFO: Eye window for uplink 4 : XXXXXX_________________________________________________________________XXX______
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 5 : XXXXXX_________________________________________________________________XXX______
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 6 : XXXXXXXXXXXXXXXX_______________________________________________________X_XXXXXXX
Clock Delay: 43
14:28:34:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXXXXX_______________________________________________________X_XXXXXXX
Clock Delay: 43
14:28:34:setup_element:INFO: Eye window for uplink 8 : XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 9 : XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 10: XXXXXXX_______________________________________________________________XXXXXXXXXX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 11: XXXXXXX_______________________________________________________________XXXXXXXXXX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 12: XXXXXX_________________________________________________________________XXXXX__XX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 13: XXXXXX_________________________________________________________________XXXXX__XX
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 14: XXXXXX_________________________________________________________________XXXXX____
Clock Delay: 38
14:28:34:setup_element:INFO: Eye window for uplink 15: XXXXXX_________________________________________________________________XXXXX____
Clock Delay: 38
14:28:34:setup_element:INFO: Setting the clock phase to 45 for group 0, downlink 1
==============================================OOO==============================================
14:28:34:setup_element:INFO: Scanning data phases
14:28:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:28:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:28:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:28:39:setup_element:INFO: Eye window for uplink 0 : __XXXXXXXX______________________________
Data delay found: 25
14:28:39:setup_element:INFO: Eye window for uplink 1 : XXXXXX______________________________XXXX
Data delay found: 20
14:28:39:setup_element:INFO: Eye window for uplink 2 : XXXXX______________________________XXXXX
Data delay found: 19
14:28:39:setup_element:INFO: Eye window for uplink 3 : XX________________________________XXXXXX
Data delay found: 17
14:28:39:setup_element:INFO: Eye window for uplink 4 : X__________________XXX________XXXXXXXXX_
Data delay found: 9
14:28:39:setup_element:INFO: Eye window for uplink 5 : ___________________XXX_____XXXXXXXXX____
Data delay found: 7
14:28:39:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXXX____
Data delay found: 11
14:28:39:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXX________
Data delay found: 7
14:28:39:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXXX__________________
Data delay found: 38
14:28:39:setup_element:INFO: Eye window for uplink 9 : ___________________XXXXXXX______________
Data delay found: 2
14:28:40:setup_element:INFO: Eye window for uplink 10: ________________XXXXXXXX________________
Data delay found: 39
14:28:40:setup_element:INFO: Eye window for uplink 11: ___________________XXXXXXXX_____________
Data delay found: 2
14:28:40:setup_element:INFO: Eye window for uplink 12: _____XXXX_____XXXXXXXXXXX_____XXXX_XXXXX
Data delay found: 2
14:28:40:setup_element:INFO: Eye window for uplink 13: _____XXXX_____XXXXXXXXXXXXXX__XXXX_XXXXX
Data delay found: 2
14:28:40:setup_element:INFO: Eye window for uplink 14: _____________XXXXXXXXXXX_________XXXXXXX
Data delay found: 6
14:28:40:setup_element:INFO: Eye window for uplink 15: _______________XXXXXXXXXXXX______XXXXXXX
Data delay found: 7
14:28:40:setup_element:INFO: Setting the data phase to 25 for uplink 0
14:28:40:setup_element:INFO: Setting the data phase to 20 for uplink 1
14:28:40:setup_element:INFO: Setting the data phase to 19 for uplink 2
14:28:40:setup_element:INFO: Setting the data phase to 17 for uplink 3
14:28:40:setup_element:INFO: Setting the data phase to 9 for uplink 4
14:28:40:setup_element:INFO: Setting the data phase to 7 for uplink 5
14:28:40:setup_element:INFO: Setting the data phase to 11 for uplink 6
14:28:40:setup_element:INFO: Setting the data phase to 7 for uplink 7
14:28:40:setup_element:INFO: Setting the data phase to 38 for uplink 8
14:28:40:setup_element:INFO: Setting the data phase to 2 for uplink 9
14:28:40:setup_element:INFO: Setting the data phase to 39 for uplink 10
14:28:40:setup_element:INFO: Setting the data phase to 2 for uplink 11
14:28:40:setup_element:INFO: Setting the data phase to 2 for uplink 12
14:28:40:setup_element:INFO: Setting the data phase to 2 for uplink 13
14:28:40:setup_element:INFO: Setting the data phase to 6 for uplink 14
14:28:40:setup_element:INFO: Setting the data phase to 7 for uplink 15
==============================================OOO==============================================
14:28:40:setup_element:INFO: Beginning SMX ASICs map scan
14:28:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:28:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:28:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:28:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:28:40:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:28:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:28:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:28:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:28:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:28:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:28:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:28:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:28:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:28:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:28:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:28:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:28:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:28:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:28:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:28:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:28:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:28:42:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 45
Window Length: 46
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXX__________________________________________________XXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXX
Uplink 4: XXXXXX_________________________________________________________________XXX______
Uplink 5: XXXXXX_________________________________________________________________XXX______
Uplink 6: XXXXXXXXXXXXXXXX_______________________________________________________X_XXXXXXX
Uplink 7: XXXXXXXXXXXXXXXX_______________________________________________________X_XXXXXXX
Uplink 8: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Uplink 9: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Uplink 10: XXXXXXX_______________________________________________________________XXXXXXXXXX
Uplink 11: XXXXXXX_______________________________________________________________XXXXXXXXXX
Uplink 12: XXXXXX_________________________________________________________________XXXXX__XX
Uplink 13: XXXXXX_________________________________________________________________XXXXX__XX
Uplink 14: XXXXXX_________________________________________________________________XXXXX____
Uplink 15: XXXXXX_________________________________________________________________XXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 32
Eye Window: __XXXXXXXX______________________________
Uplink 1:
Optimal Phase: 20
Window Length: 30
Eye Window: XXXXXX______________________________XXXX
Uplink 2:
Optimal Phase: 19
Window Length: 30
Eye Window: XXXXX______________________________XXXXX
Uplink 3:
Optimal Phase: 17
Window Length: 32
Eye Window: XX________________________________XXXXXX
Uplink 4:
Optimal Phase: 9
Window Length: 18
Eye Window: X__________________XXX________XXXXXXXXX_
Uplink 5:
Optimal Phase: 7
Window Length: 23
Eye Window: ___________________XXX_____XXXXXXXXX____
Uplink 6:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 7:
Optimal Phase: 7
Window Length: 32
Eye Window: ________________________XXXXXXXX________
Uplink 8:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 9:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
Uplink 10:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
Uplink 11:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
Uplink 12:
Optimal Phase: 2
Window Length: 5
Eye Window: _____XXXX_____XXXXXXXXXXX_____XXXX_XXXXX
Uplink 13:
Optimal Phase: 2
Window Length: 5
Eye Window: _____XXXX_____XXXXXXXXXXXXXX__XXXX_XXXXX
Uplink 14:
Optimal Phase: 6
Window Length: 13
Eye Window: _____________XXXXXXXXXXX_________XXXXXXX
Uplink 15:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXXXXXXXX______XXXXXXX
==============================================OOO==============================================
14:28:42:setup_element:INFO: Performing Elink synchronization
14:28:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:28:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:28:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:28:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
14:28:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:28:42:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:28:43:febtest:INFO: Init all SMX (CSA): 30
14:28:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:28:58:febtest:INFO: 01-00 | XA-000-09-004-007-004-022-15 | 34.6 | 1153.7
14:28:58:febtest:INFO: 08-01 | XA-000-09-004-007-005-022-02 | 37.7 | 1141.9
14:28:58:febtest:INFO: 03-02 | XA-000-09-004-006-014-005-15 | 37.7 | 1147.8
14:28:59:febtest:INFO: 10-03 | XA-000-09-004-007-005-020-02 | 37.7 | 1135.9
14:28:59:febtest:INFO: 05-04 | XA-000-09-004-007-005-021-02 | 31.4 | 1171.5
14:28:59:febtest:INFO: 12-05 | XA-000-09-004-007-004-020-15 | 25.1 | 1195.1
14:28:59:febtest:INFO: 07-06 | XA-000-09-004-007-005-023-02 | 28.2 | 1189.2
14:29:00:febtest:INFO: 14-07 | XA-000-09-004-007-006-021-12 | 40.9 | 1147.8
14:29:01:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:29:02:ST3_smx:INFO: chip: 1-0 34.556970 C 1159.654860 mV
14:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:03:ST3_smx:INFO: Electrons
14:29:03:ST3_smx:INFO: # loops 0
14:29:04:ST3_smx:INFO: # loops 1
14:29:06:ST3_smx:INFO: # loops 2
14:29:08:ST3_smx:INFO: # loops 3
14:29:09:ST3_smx:INFO: # loops 4
14:29:11:ST3_smx:INFO: Total # of broken channels: 0
14:29:11:ST3_smx:INFO: List of broken channels: []
14:29:11:ST3_smx:INFO: Total # of broken channels: 0
14:29:11:ST3_smx:INFO: List of broken channels: []
14:29:13:ST3_smx:INFO: chip: 8-1 37.726682 C 1153.732915 mV
14:29:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:13:ST3_smx:INFO: Electrons
14:29:13:ST3_smx:INFO: # loops 0
14:29:14:ST3_smx:INFO: # loops 1
14:29:16:ST3_smx:INFO: # loops 2
14:29:18:ST3_smx:INFO: # loops 3
14:29:19:ST3_smx:INFO: # loops 4
14:29:21:ST3_smx:INFO: Total # of broken channels: 0
14:29:21:ST3_smx:INFO: List of broken channels: []
14:29:21:ST3_smx:INFO: Total # of broken channels: 0
14:29:21:ST3_smx:INFO: List of broken channels: []
14:29:23:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
14:29:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:23:ST3_smx:INFO: Electrons
14:29:23:ST3_smx:INFO: # loops 0
14:29:24:ST3_smx:INFO: # loops 1
14:29:26:ST3_smx:INFO: # loops 2
14:29:28:ST3_smx:INFO: # loops 3
14:29:29:ST3_smx:INFO: # loops 4
14:29:31:ST3_smx:INFO: Total # of broken channels: 0
14:29:31:ST3_smx:INFO: List of broken channels: []
14:29:31:ST3_smx:INFO: Total # of broken channels: 0
14:29:31:ST3_smx:INFO: List of broken channels: []
14:29:32:ST3_smx:INFO: chip: 10-3 37.726682 C 1147.806000 mV
14:29:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:32:ST3_smx:INFO: Electrons
14:29:33:ST3_smx:INFO: # loops 0
14:29:34:ST3_smx:INFO: # loops 1
14:29:36:ST3_smx:INFO: # loops 2
14:29:38:ST3_smx:INFO: # loops 3
14:29:39:ST3_smx:INFO: # loops 4
14:29:41:ST3_smx:INFO: Total # of broken channels: 0
14:29:41:ST3_smx:INFO: List of broken channels: []
14:29:41:ST3_smx:INFO: Total # of broken channels: 0
14:29:41:ST3_smx:INFO: List of broken channels: []
14:29:42:ST3_smx:INFO: chip: 5-4 31.389742 C 1183.292940 mV
14:29:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:42:ST3_smx:INFO: Electrons
14:29:42:ST3_smx:INFO: # loops 0
14:29:44:ST3_smx:INFO: # loops 1
14:29:46:ST3_smx:INFO: # loops 2
14:29:47:ST3_smx:INFO: # loops 3
14:29:49:ST3_smx:INFO: # loops 4
14:29:51:ST3_smx:INFO: Total # of broken channels: 0
14:29:51:ST3_smx:INFO: List of broken channels: []
14:29:51:ST3_smx:INFO: Total # of broken channels: 0
14:29:51:ST3_smx:INFO: List of broken channels: []
14:29:52:ST3_smx:INFO: chip: 12-5 25.062742 C 1206.851500 mV
14:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:29:52:ST3_smx:INFO: Electrons
14:29:52:ST3_smx:INFO: # loops 0
14:29:54:ST3_smx:INFO: # loops 1
14:29:56:ST3_smx:INFO: # loops 2
14:29:57:ST3_smx:INFO: # loops 3
14:29:59:ST3_smx:INFO: # loops 4
14:30:01:ST3_smx:INFO: Total # of broken channels: 0
14:30:01:ST3_smx:INFO: List of broken channels: []
14:30:01:ST3_smx:INFO: Total # of broken channels: 0
14:30:01:ST3_smx:INFO: List of broken channels: []
14:30:02:ST3_smx:INFO: chip: 7-6 28.225000 C 1189.190035 mV
14:30:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:30:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:30:02:ST3_smx:INFO: Electrons
14:30:02:ST3_smx:INFO: # loops 0
14:30:04:ST3_smx:INFO: # loops 1
14:30:06:ST3_smx:INFO: # loops 2
14:30:07:ST3_smx:INFO: # loops 3
14:30:09:ST3_smx:INFO: # loops 4
14:30:11:ST3_smx:INFO: Total # of broken channels: 0
14:30:11:ST3_smx:INFO: List of broken channels: []
14:30:11:ST3_smx:INFO: Total # of broken channels: 0
14:30:11:ST3_smx:INFO: List of broken channels: []
14:30:12:ST3_smx:INFO: chip: 14-7 40.898880 C 1153.732915 mV
14:30:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:30:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:30:12:ST3_smx:INFO: Electrons
14:30:12:ST3_smx:INFO: # loops 0
14:30:14:ST3_smx:INFO: # loops 1
14:30:16:ST3_smx:INFO: # loops 2
14:30:17:ST3_smx:INFO: # loops 3
14:30:19:ST3_smx:INFO: # loops 4
14:30:21:ST3_smx:INFO: Total # of broken channels: 0
14:30:21:ST3_smx:INFO: List of broken channels: []
14:30:21:ST3_smx:INFO: Total # of broken channels: 0
14:30:21:ST3_smx:INFO: List of broken channels: []
14:30:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:30:21:febtest:INFO: 01-00 | XA-000-09-004-007-004-022-15 | 37.7 | 1183.3
14:30:21:febtest:INFO: 08-01 | XA-000-09-004-007-005-022-02 | 37.7 | 1177.4
14:30:22:febtest:INFO: 03-02 | XA-000-09-004-006-014-005-15 | 40.9 | 1183.3
14:30:22:febtest:INFO: 10-03 | XA-000-09-004-007-005-020-02 | 40.9 | 1171.5
14:30:22:febtest:INFO: 05-04 | XA-000-09-004-007-005-021-02 | 34.6 | 1201.0
14:30:22:febtest:INFO: 12-05 | XA-000-09-004-007-004-020-15 | 25.1 | 1230.3
14:30:22:febtest:INFO: 07-06 | XA-000-09-004-007-005-023-02 | 28.2 | 1212.7
14:30:23:febtest:INFO: 14-07 | XA-000-09-004-007-006-021-12 | 40.9 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_28-14_28_21
OPERATOR : Kerstin S.; Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1323| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 30394 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M4UR5B2011332B2
LADDER_NAME: L4UR501133
------------------------------------------------------------
VI_before_Init : ['2.449', '2.0870', '1.849', '2.6730', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0770', '1.850', '2.3850', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.5170', '0.000', '0.0000', '0.000', '0.0000']